[Bug binutils/28684] [RISCV] 32-bit --enable-targets=all build breakage issue

2021-12-14 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=28684 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/28441] [RISCV] ld linker relaxation is really slow

2021-10-11 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=28441 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug binutils/27764] RISC-V: Test cases for A extension instructions are missing

2021-05-03 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27764 Jim Wilson changed: What|Removed |Added Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org

[Bug binutils/27814] objdump crashes when disassembling a non-ELF RISC-V binary

2021-05-03 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27814 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/27566] [RISC-V] relocation truncated to fit: R_RISCV_GPREL_I against aymbol

2021-03-17 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27566 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug gas/27215] as: Error: non-constant .uleb128 is not supported on riscv64

2021-02-26 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27215 --- Comment #6 from Jim Wilson --- There is a problem if at least one label is in the text section. So yes, we could support this for debug info sections. On the compiler side, there is no way currently to tell the compiler that uleb128 is

[Bug gas/27436] RISC-V inconsistent handling of rv32 shift with count > 31

2021-02-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27436 --- Comment #1 from Jim Wilson --- that should be > 31 not > 32 -- You are receiving this mail because: You are on the CC list for the bug.

[Bug gas/27436] RISC-V inconsistent handling of rv32 shift with count > 31

2021-02-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27436 Jim Wilson changed: What|Removed |Added Summary|RISC-V inconsistent |RISC-V inconsistent

[Bug gas/27436] RISC-V inconsistent handling of rv32 shift with count > 32

2021-02-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27436 Jim Wilson changed: What|Removed |Added Target||riscv*-*-* -- You are receiving this

[Bug gas/27436] New: RISC-V inconsistent handling of rv32 shift with count > 32

2021-02-18 Thread wilson at gcc dot gnu.org
mal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: wilson at gcc dot gnu.org Target Milestone: --- rohan:2255$ cat tmp.s slli a0,a0,63 rohan:2256$ riscv32-unknown-elf-as -march=rv64g tmp.s rohan:2257$ riscv32-unknown-elf-as -ma

[Bug binutils/27348] obsolete Xcustom support in riscv port

2021-02-05 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27348 Jim Wilson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug binutils/27348] obsolete Xcustom support in riscv port

2021-02-04 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27348 Jim Wilson changed: What|Removed |Added Target||riscv*-*-* -- You are receiving this

[Bug binutils/27348] New: obsolete Xcustom support in riscv port

2021-02-04 Thread wilson at gcc dot gnu.org
: binutils Assignee: unassigned at sourceware dot org Reporter: wilson at gcc dot gnu.org Target Milestone: --- Andrew Waterman removed the Xcustom extension support Oct 11 2016 before the code was upstreamed to the FSF in Nov 2016. https://github.com/riscv/riscv-binutils-gdb

[Bug gas/27215] as: Error: non-constant .uleb128 is not supported on riscv64

2021-02-03 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27215 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug binutils/27158] New: RISC-V port still has UJ instruction type references

2021-01-07 Thread wilson at gcc dot gnu.org
Component: binutils Assignee: unassigned at sourceware dot org Reporter: wilson at gcc dot gnu.org Target Milestone: --- RISC-V ISA v2.1 has a UJ instruction format that got renamed to J in ISA v2.2. But the source code still has references to the obsolete UJ instruction

[Bug gold/27035] gold: add RISC-V support

2020-12-09 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=27035 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/25354] On RISCV64 LD, with EXACTLY 72 headers/sections, PhysAddr for first Program Header is wrong

2020-10-22 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25354 --- Comment #2 from Jim Wilson --- Sorry, that is the wrong commit id, it is the one immediately after commit 64029e93683a266c38d19789e780f3748bd6a188 Author: Alan Modra

[Bug ld/25354] On RISCV64 LD, with EXACTLY 72 headers/sections, PhysAddr for first Program Header is wrong

2020-10-22 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25354 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug gas/26400] Internal error when using .offset with jumps in RISC-V as

2020-09-24 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26400 Jim Wilson changed: What|Removed |Added Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org

[Bug gas/26400] Internal error when using .offset with jumps in RISC-V as

2020-09-24 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26400 --- Comment #3 from Jim Wilson --- A linker script is the normal GNU ld solution for putting code at specific addresses. I see that there is an option --section-start=SECTIONNAME=ORG but I have no experience using that. Yes we need to

[Bug gas/26400] Internal error when using .offset with jumps in RISC-V as

2020-09-22 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26400 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug gas/26051] [RISCV] .insn documentation update

2020-06-02 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26051 Jim Wilson changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug gas/26051] [RISCV] .insn documentation update

2020-06-01 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26051 --- Comment #3 from Jim Wilson --- I added my proposed fix as an attachment. -- You are receiving this mail because: You are on the CC list for the bug.

[Bug gas/26051] [RISCV] .insn documentation update

2020-06-01 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26051 --- Comment #2 from Jim Wilson --- Created attachment 12579 --> https://sourceware.org/bugzilla/attachment.cgi?id=12579=edit my proposed fix -- You are receiving this mail because: You are on the CC list for the bug.

[Bug gas/26051] [RISCV] .insn documentation update

2020-06-01 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26051 Jim Wilson changed: What|Removed |Added Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org

[Bug gas/26025] riscv gas inserts relocation for BFD_RELOC_RISCV_CFA in last section of file, instead of relevant section

2020-05-24 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26025 Jim Wilson changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug gas/26025] riscv gas inserts relocation for BFD_RELOC_RISCV_CFA in last section of file, instead of relevant section

2020-05-24 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=26025 --- Comment #4 from Jim Wilson --- The FSF requires a copyright assignment, unless the patch is small enough and obvious enough, but even then there are limits on how much we can accept without assignments. I think it is questionable whether

[Bug gas/26025] riscv gas inserts relocation for BFD_RELOC_RISCV_CFA in last section of file, instead of relevant section

2020-05-23 Thread wilson at gcc dot gnu.org
||wilson at gcc dot gnu.org Ever confirmed|0 |1 Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org Last reconfirmed||2020-05-24 --- Comment #2 from Jim Wilson --- I see that the frag code

[Bug ld/25900] RISC-V: null pointer dereference in ld

2020-05-07 Thread wilson at gcc dot gnu.org
|RESOLVED CC||wilson at gcc dot gnu.org --- Comment #4 from Jim Wilson --- I got a bug report pointing at this code once, I think from the RISC-V FreeBSD folks, but unfortunately didn't get a testcase or a good enough description

[Bug ld/25527] [RISC-V] -static-pie not producing relocations

2020-04-30 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25527 --- Comment #3 from Jim Wilson --- I don't know of anyone working on any of these problems. So no progress. -- You are receiving this mail because: You are on the CC list for the bug.

[Bug binutils/22941] binutils build fails if intl/plural.y is newer than intl/plural.c

2020-04-16 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22941 --- Comment #6 from Jim Wilson --- This is the same bug as https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92008 and a patch has been added to fix that bug. Merging that patch into the binutils git tree should fix this bug. There is also a

[Bug ld/24685] [RISCV] R_RISCV_CALL_PLT should not create a canonical PLT in -no-pie mode

2020-04-07 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24685 --- Comment #3 from Jim Wilson --- This is on my todo list along with hundreds of other things. I don't know of any reason why this needs priority attention, so it may be a while before I have a chance to work on it. -- You are receiving

[Bug ld/25694] R_RISCV_TPREL_HI20 relocations cause riscv64 to add TEXTREL bit on executables

2020-03-19 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25694 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/25501] STT_GNU_IFUNC causes assertion on 64-bit RISC-V

2020-03-06 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25501 --- Comment #9 from Jim Wilson --- The glibc configure script has been fixed so that it no longer tries to use ifunc on targets that don't support it. We still need to add ifunc support to the binutils RISC-V port though. -- You are

[Bug ld/25527] [RISC-V] -static-pie not producing relocations

2020-02-10 Thread wilson at gcc dot gnu.org
||2020-02-11 CC||wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- I see two problems here. The first problem is that the RISC-V GCC port isn't handling the --static-pie option

[Bug ld/25501] STT_GNU_IFUNC causes assertion on 64-bit RISC-V

2020-02-04 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25501 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/25205] relocation truncated to fit: R_RISCV_JAL against undefined symbol `pthread_once'

2020-01-06 Thread wilson at gcc dot gnu.org
|--- |FIXED Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org --- Comment #11 from Jim Wilson --- Fixed on mainline. -- You are receiving this mail because: You are on the CC list for the bug.

[Bug gprof/25314] Duplicate Shares

2019-12-24 Thread wilson at gcc dot gnu.org
-shares/ | CC||wilson at gcc dot gnu.org --- Comment #2 from Jim Wilson --- removed SEO URL, and reported it to Google -- You are receiving this mail because: You are on the CC list for the bug.

[Bug ld/25205] relocation truncated to fit: R_RISCV_JAL against undefined symbol `pthread_once'

2019-12-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25205 --- Comment #8 from Jim Wilson --- Created attachment 12134 --> https://sourceware.org/bugzilla/attachment.cgi?id=12134=edit untested patch that works for testcase -- You are receiving this mail because: You are on the CC list for the

[Bug ld/25205] relocation truncated to fit: R_RISCV_JAL against undefined symbol `pthread_once'

2019-12-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25205 --- Comment #7 from Jim Wilson --- I can reproduce with your object files. I had to add a -B option to find crtbegin.o and libgcc.a. Maybe something wrong with clang on my system. Anyways, what I see is that in _bfd_riscv_relax_section, if

[Bug ld/25205] relocation truncated to fit: R_RISCV_JAL against undefined symbol `pthread_once'

2019-12-10 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25205 --- Comment #2 from Jim Wilson --- I made an attempt to reproduce this, but I don't build llvm very often (cough) so I don't really know what I'm doing. I can build llvm in a one stage build on a riscv fedora system. When I tried a two

[Bug ld/25258] RISC-V: relocation truncated to fit: R_RISCV_GPREL_I against `.LANCHOR2'

2019-12-10 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25258 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug gas/25264] RISC-V option norvc: linker complains "14 bytes required for alignment to 16-byte boundary, but only 12 present"

2019-12-10 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25264 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/23825] Linker creates COPY relocs for reference to TLS symbols

2019-11-19 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23825 --- Comment #9 from Jim Wilson --- This is being discussed in https://github.com/riscv/riscv-elf-psabi-doc/issues/122 which is the proper place to discuss RISC-V ABI issues. -- You are receiving this mail because: You are on the CC list

[Bug binutils/25181] RISC-V: Linker relaxation may fail if there are R_RISCV_ALIGN type relocations

2019-11-12 Thread wilson at gcc dot gnu.org
|--- |FIXED Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org --- Comment #9 from Jim Wilson --- Fixed on mainline. -- You are receiving this mail because: You are on the CC list for the bug.

[Bug binutils/25181] RISC-V: Linker relaxation may fail if there are R_RISCV_ALIGN type relocations

2019-11-11 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25181 --- Comment #6 from Jim Wilson --- You can create a patch with git diff and then attach it to the bug report. It needs to be mailed to the binutils list if it gets checked in, but you can always ask someone else to do that for you.

[Bug binutils/25181] RISC-V: Linker relaxation may fail if there are R_RISCV_ALIGN type relocations

2019-11-11 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=25181 --- Comment #5 from Jim Wilson --- Created attachment 12071 --> https://sourceware.org/bugzilla/attachment.cgi?id=12071=edit untested patch to fix _bfd_riscv_relax_call -- You are receiving this mail because: You are on the CC list for

[Bug binutils/25181] RISC-V: Linker relaxation may fail if there are R_RISCV_ALIGN type relocations

2019-11-11 Thread wilson at gcc dot gnu.org
||2019-11-12 CC||wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #4 from Jim Wilson --- The way that this should work is that if the call crosses section boundaries, then we need to use the max

[Bug ld/24992] RISC-V: partial relaxing against global pointer with sdata section alignment

2019-09-17 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24992 --- Comment #6 from Jim Wilson --- See comment #4 that says "Unless gp and the variable are in the same section, in which case we can ignore the problem." -- You are receiving this mail because: You are on the CC list for the bug.

[Bug binutils/24993] RISC-V: Address 0x00000000000xxxxx is out of bounds when "objdump -D"

2019-09-12 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24993 Jim Wilson changed: What|Removed |Added Status|RESOLVED|REOPENED Last reconfirmed|

[Bug ld/24983] RISC-V GP linker relaxation is not performed with -nostdlib

2019-09-12 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24983 --- Comment #3 from Jim Wilson --- There is another related problem reported here https://github.com/riscv/riscv-gnu-toolchain/issues/497 -- You are receiving this mail because: You are on the CC list for the bug.

[Bug ld/24992] RISC-V: partial relaxing against global pointer with sdata section alignment

2019-09-12 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24992 --- Comment #4 from Jim Wilson --- It is the same underlying problem. Addresses can increase by up to section alignment after relaxation, so we have to reduce gp range by the alignment of the largest section in between gp and the variable,

[Bug ld/24992] RISC-V: partial relaxing against global pointer with sdata section alignment

2019-09-11 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24992 Jim Wilson changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug ld/24983] RISC-V GP linker relaxation is not performed with -nostdlib

2019-09-11 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24983 Jim Wilson changed: What|Removed |Added CC||yitingwang16 at outlook dot com ---

[Bug binutils/24993] RISC-V: Address 0x00000000000xxxxx is out of bounds when "objdump -D"

2019-09-11 Thread wilson at gcc dot gnu.org
||wilson at gcc dot gnu.org Resolution|--- |INVALID --- Comment #1 from Jim Wilson --- the problem is that you are using objdump -D, and this is almost always the wrong thing to do. The correct option is "-d". -D will dump dat

[Bug ld/24992] RISC-V: partial relaxing against global pointer with sdata section alignment

2019-09-11 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24992 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/24983] RISC-V GP linker relaxation is not performed with -nostdlib

2019-09-10 Thread wilson at gcc dot gnu.org
||2019-09-10 CC||wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- Commentary copied from the gcc bug report... This is an edge condition and an accident of circumstances. When

[Bug ld/23825] Linker creates COPY relocs for reference to TLS symbols

2019-09-03 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23825 Jim Wilson changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #5 from Jim Wilson

[Bug ld/23825] Linker creates COPY relocs for reference to TLS symbols

2019-08-31 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23825 --- Comment #3 from Jim Wilson --- I got an internal bug report with a simplified testcase related to this, took another look, and found the problem. hifiveu017:1097$ cat tmp.c #include extern __thread int a; int main (void) {printf ("a =

[Bug binutils/24029] Failure to compile plural.c (libintl) on Mojave.

2019-07-07 Thread wilson at gcc dot gnu.org
||wilson at gcc dot gnu.org Resolution|--- |DUPLICATE --- Comment #1 from Jim Wilson --- Duplicate of 22941. intl does't build with bison-3.0.4. *** This bug has been marked as a duplicate of bug 22941 *** -- You are receiving this mail because

[Bug binutils/22941] binutils build fails if intl/plural.y is newer than intl/plural.c

2019-07-07 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22941 Jim Wilson changed: What|Removed |Added CC||pjb at informatimago dot com ---

[Bug binutils/24739] RISC-V Disassembler should default to little endian

2019-06-26 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24739 Jim Wilson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug binutils/24739] RISC-V Disassembler should default to little endian

2019-06-26 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24739 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/24685] [RISCV] R_RISCV_CALL_PLT should not create a canonical PLT in -no-pie mode

2019-06-24 Thread wilson at gcc dot gnu.org
||2019-06-25 CC||wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- Looks like the problem is in riscv_elf_finish_dynamic_symbol where we have /* If the symbol is weak, we

[Bug ld/24683] New: RISC-V call and callplt reloc handling

2019-06-14 Thread wilson at gcc dot gnu.org
Assignee: unassigned at sourceware dot org Reporter: wilson at gcc dot gnu.org Target Milestone: --- Another one from the lld folks. Given .global test, foo, bar, baz test: call foo call bar call bar@plt call baz@plt and compiling it with gcc -o call-plt

[Bug ld/24678] RISC-V pcrel relocs and abs global pointer variable

2019-06-13 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24678 --- Comment #1 from Jim Wilson --- The section for linker script defined variables is set in set_sym_sections, via update_definedness, which uses section_for_dot. Since we are computing the __global_pointer$ value near the end of the linker

[Bug ld/24678] New: RISC-V pcrel relocs and abs global pointer variable

2019-06-13 Thread wilson at gcc dot gnu.org
Component: ld Assignee: unassigned at sourceware dot org Reporter: wilson at gcc dot gnu.org Target Milestone: --- Reported via IRC. Compiling a trivial program as PIE, I get hifiveu017:1201$ gcc -pie -fpic tmp.c hifiveu017:1202$ readelf -s a.out | grep global_pointer 65

[Bug ld/24678] RISC-V pcrel relocs and abs global pointer variable

2019-06-13 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24678 Jim Wilson changed: What|Removed |Added Target||riscv*-*-* -- You are receiving this

[Bug ld/24673] [RISCV] -fPIC -pie and -fPIC -no-pie create unexpected R_RISCV_NONE R_RISCV_DTPMOD64 relocations

2019-06-13 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24673 Jim Wilson changed: What|Removed |Added Blocks||24676 Referenced Bugs:

[Bug ld/24676] [RISCV] Redundant R_RISCV_DTPMOD* R_RISCV_DTPREL* resulted from Glocal Dynamic -> Local Exec relaxation

2019-06-13 Thread wilson at gcc dot gnu.org
||2019-06-13 CC||wilson at gcc dot gnu.org Depends on||24673 Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- Assuming that the MIPS port is handling this right

[Bug ld/24673] [RISCV] -fPIC -pie and -fPIC -no-pie create unexpected R_RISCV_NONE R_RISCV_DTPMOD64 relocations

2019-06-13 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24673 --- Comment #3 from Jim Wilson --- Via IRC, elfnn-riscv.c circa line 563 has case R_RISCV_TLS_GOT_HI20: if (bfd_link_pic (info)) info->flags |= DF_STATIC_TLS; where this should be bfd_link_dll instead of

[Bug ld/24673] [RISCV] -fPIC -pie and -fPIC -no-pie create unexpected R_RISCV_NONE R_RISCV_DTPMOD64 relocations

2019-06-12 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24673 --- Comment #2 from Jim Wilson --- The issue with the R_RISCV_NONE appears to be that we are pre-allocating space for dynamic relocs, and accidentally allocating one more than we need. This space is apparently cleared someplace. So it ends

[Bug ld/24426] Binutils 2.28.1 segfault when presented (any) linker script on riscv64

2019-04-09 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24426 --- Comment #9 from Jim Wilson --- RISC-V is an ISA. The amount of memory that can be accessed depends on the ISA implementation that you are using. This varies from one implementation to another. But most 64-bit processors do not have 64

[Bug ld/24426] Binutils 2.28.1 segfault when presented (any) linker script on riscv64

2019-04-09 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24426 --- Comment #7 from Jim Wilson --- An empty linker script isn't expected to work. This will probably fail for every linker target. It fails for x86_64-linux for instance. rohan:2037$ uname -a Linux rohan 4.15.0-47-generic #50-Ubuntu SMP

[Bug ld/24426] Binutils 2.28.1 segfault when presented (any) linker script on riscv64

2019-04-09 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24426 --- Comment #3 from Jim Wilson --- I tried to reproduce with no luck. I think that there are too many things broken on your end. I had to hack up crt0.S to remove the required support for __global_pointer$, and I had to hack your linker

[Bug ld/24426] Binutils 2.28.1 segfault when presented (any) linker script on riscv64

2019-04-08 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24426 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug ld/24389] can't link soft-float modules with double-float modules

2019-04-02 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24389 Jim Wilson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug ld/24389] can't link soft-float modules with double-float modules

2019-04-01 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24389 Jim Wilson changed: What|Removed |Added Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org

[Bug ld/24389] can't link soft-float modules with double-float modules

2019-03-28 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24389 --- Comment #4 from Jim Wilson --- I don't see a way to specify this in the linker either. I looked at gas, and noticed that it is broken also, but slightly differently. Gas is defaulting to rv64g/lp64d when configured for 64-bit, and

[Bug ld/24389] can't link soft-float modules with double-float modules

2019-03-27 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24389 --- Comment #1 from Jim Wilson --- David Abdurachmanov reported the same problem with Fedora over the weekend, but I wasn't able to look at it at the time as SiFive building power was off for maintenance. Building glib to reproduce, I see

[Bug binutils/24365] Crash due to RISC-V relocation

2019-03-21 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24365 Jim Wilson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug binutils/24365] Crash due to RISC-V relocation

2019-03-20 Thread wilson at gcc dot gnu.org
||2019-03-20 Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- I never tried this with a global symbol. This only works for local symbols. sym is only set for local

[Bug ld/24226] Need advise on the binutils problem that generating wrong instruction like lw a3,-2048(a5) on RISC-V backend

2019-02-19 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24226 --- Comment #4 from Jim Wilson --- Yes, I'd call this a compiler bug. It is triggered when we have a long long inside a packed structure compiled for a 32-bit target, where the long long must be partially contained in the first word of the

[Bug ld/24226] Need advise on the binutils problem that generating wrong instruction like lw a3,-2048(a5) on RISC-V backend

2019-02-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24226 --- Comment #2 from Jim Wilson --- Another possibility here is a broken linker script that isn't respecting section alignment. -- You are receiving this mail because: You are on the CC list for the bug.

[Bug ld/24226] Need advise on the binutils problem that generating wrong instruction like lw a3,-2048(a5) on RISC-V backend

2019-02-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24226 Jim Wilson changed: What|Removed |Added CC||wilson at gcc dot gnu.org --- Comment

[Bug gas/23954] Use of unknown relocation function causes segfault

2018-12-10 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23954 Jim Wilson changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug gas/23954] Use of unknown relocation function causes segfault

2018-12-07 Thread wilson at gcc dot gnu.org
||2018-12-08 Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- The problem is the extra register, not the unknown relocation function. I get the same error

[Bug gas/23956] RISC-V 4-operand add doesn't check for %tprel_add

2018-12-07 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23956 Jim Wilson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug gas/23956] RISC-V 4-operand add doesn't check for %tprel_add

2018-12-06 Thread wilson at gcc dot gnu.org
||2018-12-07 Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- I consider it a bug, but not serious enough that I had gotten around to trying to fix it yet

[Bug ld/23825] Linker creates COPY relocs for reference to TLS symbols

2018-10-25 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23825 Jim Wilson changed: What|Removed |Added Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org

[Bug ld/23825] Linker creates COPY relocs for reference to TLS symbols

2018-10-25 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23825 --- Comment #1 from Jim Wilson --- This is a feature of the RISC-V toolchain, which apparently isn't supported by any other toolchain, and which is known to be broken, but we don't yet know if it is a gcc, binutils, ld.so, or something else

[Bug gas/23451] RISC-V gas aborts with "Error: unknown default architecture `'" in GCC configure tests

2018-07-27 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23451 Jim Wilson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug gas/23451] RISC-V gas aborts with "Error: unknown default architecture `'" in GCC configure tests

2018-07-27 Thread wilson at gcc dot gnu.org
||2018-07-27 Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Jim Wilson --- I did a build test, but I see now that it builds but doesn't run. Annoying, but this is easy to fix. I

[Bug gas/23305] RISC-V illegal operands with lla and .set

2018-06-19 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23305 Jim Wilson changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug gas/23305] RISC-V illegal operands with lla and .set

2018-06-18 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23305 --- Comment #2 from Jim Wilson --- lla is only valid for symbol addresses. It isn't meant to be used for constants. But that is an interesting testcase. Did this come from real code? If so then we need to fix this. You can make medlow

[Bug ld/23244] RISC-V 64 relocation truncated to fit in case of undefined weak references

2018-06-03 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23244 Jim Wilson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug ld/22756] Linker relaxation miscalculates symbol addresses on riscv

2018-06-01 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22756 --- Comment #8 from Jim Wilson --- Linker relaxation that deletes code is O(m*n) where m is the number of relocations and n is the number of symbols. There have been complaints about this. This makes the RISC-V linker slower than other

[Bug ld/23244] RISC-V 64 relocation truncated to fit in case of undefined weak references

2018-05-29 Thread wilson at gcc dot gnu.org
||2018-05-30 CC||wilson at gcc dot gnu.org Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- I see the problem

[Bug gas/23219] [RISCV] Internal error with .align and .option norelax

2018-05-24 Thread wilson at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=23219 Jim Wilson changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug gas/23219] [RISCV] Internal error with .align and .option norelax

2018-05-23 Thread wilson at gcc dot gnu.org
||2018-05-24 CC||wilson at gcc dot gnu.org Assignee|unassigned at sourceware dot org |wilson at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jim Wilson --- I see several problems

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