Hi all
I am trying to black-box a 2^13 fft_biplex, but it is failing with a
non-specific error (reported by: unspecified, error 0001: caught standard
exception).
It is simulating / updating OK, but the system generator step fails after a
few hours.
It compiles fine for 2^10, and 2^12 points,
Hi all,
Should such software (simulink) features as subsystems and and gotos
have any affect on the final circuit created when I build my bof file?
I am compiling models on Roach I that use almost all of the available
Logic Slices (~97%). That the subsequent build should contain timing
On 01/29/2014 01:03 PM, Paul Marganian wrote:
Hi all,
Should such software (simulink) features as subsystems and and gotos
have any affect on the final circuit created when I build my bof file?
I am compiling models on Roach I that use almost all of the available
Logic Slices (~97%). That
On 01/29/2014 01:03 PM, Paul Marganian wrote:
Hi all,
Should such software (simulink) features as subsystems and and gotos
have any affect on the final circuit created when I build my bof file?
I am compiling models on Roach I that use almost all of the available
Logic Slices (~97%). That
I'm not sure what, if any, difference a subsystem will make to the
mapped design (I thought none), but I believe it's the case that
changing module names etc. can affect the place and route algorithm's
start seed. I seem to remember seeing this mentioned in a Xilinx doc
under the heading I've
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