Which part of the CASPER source code parses the "pins:" section of the yaml
files found in mlib_devel/jasper_library/platforms/*.yaml ?
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Hi Wei,
The issue might be that the PDI you are attempting to use with `fpga_manager`
is considered a “base” PDI that is part of the BOOT PDI image loaded by the PLM
during boot. Since this PDI contains the PLM/PPU information these cores cannot
be reconfigured at run time (as indicated by
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