Re: [casper] Reading many ADC samples from PowerPC/KATCP

2015-07-21 Thread Vertatschitsch, Laura E.
Danny, We routinely fill snapshots with 250k ADC samples, then read them out with the get_snapshot command. If you are interested I can point you to the R2DBE github design (so you can see how we use the snapshots) and I can get you some scripts I was using quite recently in the lab to buffer up

Re: [casper] DRAM on ROACH2?

2015-02-13 Thread Vertatschitsch, Laura E.
Hi Brad, Myself and Rurik Primiani did some work on the PPC interface to the DDR3 module over a year ago, but had to stop before completion. I think I have some files around in github in the ddr3-devel branch of the sma-wideband repo, but it is in a state where I was not getting error-free reads

Re: [casper] software register

2014-11-19 Thread Vertatschitsch, Laura E.
registers with more than one output or does it happen on all software registers? Which mlib_devel commit are you using? Dave On Nov 9, 2014, at 9:04 PM, Vertatschitsch, Laura E. wrote: Hi Homin, I have a hunch that the new software registers may need the fixed point toolset to work. I

Re: [casper] software register

2014-11-09 Thread Vertatschitsch, Laura E.
Hi Homin, I have a hunch that the new software registers may need the fixed point toolset to work. I can compile fine, but can't simulate and can't change the parameters. The fixed point toolset seems to be the main difference between myself and Rurik's set up, and he seems to have no issues.

Re: [casper] about tut3 input ports

2014-10-21 Thread Vertatschitsch, Laura E.
Hi Oliver, It is a bit tough to tell where your signals are coming from with the picture you have included. I see a few issues though. When connecting Xilinx blocks to Simulink/Matlab blocks, you need to go through a special block. Connecting your delay blocks directly to a scope will cause

Re: [casper] Problem with the overflow

2014-10-20 Thread Vertatschitsch, Laura E.
Hey Peter, I'm bumping this up to the listserve. I am unfamiliar with PAPER. Perhaps someone with that project can help. If you haven't yet, you should complete Tutorial 2 https://casper.berkeley.edu/wiki/Tutorials with your toolflow to learn about the 10 GbE interface and how it is

Re: [casper] How do you cause the one_GbE to send a packet on a ROACH-2

2014-03-13 Thread Vertatschitsch, Laura E.
Hey Joe, Casperites, Can you log into the powerpc and run ifconfig on a roach 2? I've done this to troubleshoot 10 gbe on a roach1, and I was able to see that I truly did enable the ten gbe using tap start, as it is listed in the ifconfig output and then there is some data about packets sent and

Re: [casper] Signal Processing Blockset by Matlab 2012b

2013-10-14 Thread Vertatschitsch, Laura E.
Katty, The licenses for blocksets and toolboxes that come with Matlab can be purchased the same way you purchased your Matlab license (varies by institution). You can download them from the mathworks website but in order to use them you must have the licenses in place. On Mon, Oct 14, 2013 at

Re: [casper] Report of experience with KatADC

2013-09-19 Thread Vertatschitsch, Laura E.
Gary, Can you confirm the same mlib_devel checkout was used for both compiles? --Laura On Thu, Sep 19, 2013 at 11:12 AM, Gary, Dale E. dale.e.g...@njit.eduwrote: Hi All, I am not sure how many out there are using or planning to use the KatADC boards in their projects, but I thought I

Re: [casper] Report of experience with KatADC

2013-09-19 Thread Vertatschitsch, Laura E.
answer). So, as a caveat to what Dale has mentioned in his email, the problem could be between yellow blocks and not necessarily the toolflow, though I do not know if yellow block has changed significantly. Thanks, Nimish On Thu, Sep 19, 2013 at 1:03 PM, Vertatschitsch, Laura E