[casper] X-engine resource requirements

2011-01-17 Thread G Jones
Hello, I am trying to understand the resource requirements for the CASPER X-engine. To reduce confusion, I'm going to consider dual polarization antennas Looking at the xeng block in simulink, it appears that an X engine with no demux will require about acc_len * ceil(Nant/2 + 1) memory locations

Re: [casper] X-engine resource requirements

2011-01-17 Thread Jack Hickish
Hi Glenn, I noticed the same thing as you re. DSP use in the X-engine, and went about making a new complex multiply block which performs two 4x4 bit multiplies per DSP slice by concatenating inputs together, and therefore uses 2 DSPs per Cmult. This was pretty simple, though I suspect the adders n

Re: [casper] X-engine resource requirements

2011-01-17 Thread Jason Manley
Hi Jack and Glen For the existing packetised designs, I run out of logic resources long before BRAM or DSP slices in the X engine. This is mostly due to have control and monitoring (nearly 100 software registers in the design). So I haven't much worried about optimising the DSP usage yet. I'l

Re: [casper] X-engine resource requirements

2011-01-18 Thread David MacMahon
Hi, Glenn, One thing you didn't mention is bandwidth/data rate. This matters because it affects how many inputs you have per F "board" (i.e. iBOB or ROACH). The PAPER correlator processes 100 MHz of bandwidth, so it uses 2 quad ADCs (i.e. 8 inputs) per F board (currently iBOBs, but eventually