Re: Plane of core memory

2019-04-18 Thread Andrew Luke Nesbit via cctalk
On 18/04/2019 05:47, Grant Taylor via cctalk wrote: > If you just want core memory, check out the following link: > > Link - Core Memory Shield for Arduino >  - https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/ > > You can actually use Core Memory on a modern computer.  }:-

Re: Plane of core memory

2019-04-18 Thread Brent Hilpert via cctalk
On 2019-Apr-17, at 9:47 PM, Grant Taylor via cctalk wrote: > On 4/17/19 10:30 PM, Andrew Luke Nesbit via cctalk wrote: >> Hello all, > > Hi, > >> I have been wanting to acquire a plane of magnetic core memory as a piece of >> computing history. My partner actually thinks they look very beautifu

Re: Plane of core memory

2019-04-18 Thread Will Cooke via cctalk
> > > Does anybody here have any ideas? For example, what is it? Or, if you > > > don't know, could you point me in the right direction so I can do the > > > research myself? Thanks!! > > I have no idea. > > > > The connectors remind me of a DEC machine bus, but I don't know what the > > bus

Re: PDP-11/83 w/FPU?

2019-04-18 Thread Noel Chiappa via cctalk
> From: W2HX > i have a few CPUs available to me, a 11/23+, an 11/73 and I also have > available to me an 11/83 > I would like to try to run as many different OS's as may interest me, > including some unixes as possible (bsd...etc). Early Unixes in general will run on those ma

Re: Plane of core memory

2019-04-18 Thread Jon Elson via cctalk
On 04/18/2019 04:49 AM, Brent Hilpert via cctalk wrote: It's a 4-wire 3D planar array. By topology and construction I would guess it date it from the 60s. Make that EARLY '60s. As soon as somebody figured out that you could combine the sense and inhibit wires, everybody immediately went to 3-w

Re: Plane of core memory

2019-04-18 Thread Jim Manley via cctalk
Jussi Kilpelainen's page cited above ( https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/) refers to the work of Ben North and Oliver Nash to create another core memory shield for Arduino Unos. Their site inspired Jussi to create his shield kit, which can be viewed at: http:

Re: Plane of core memory

2019-04-18 Thread Chuck Guzis via cctalk
On 4/18/19 9:02 AM, Jim Manley via cctalk wrote: > Jussi Kilpelainen's page cited above ( > https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/) > refers to the work of Ben North and Oliver Nash to create another core > memory shield for Arduino Unos. Their site inspired Jussi

Re: Plane of core memory

2019-04-18 Thread Al Kossow via cctalk
On 4/18/19 9:30 AM, Chuck Guzis via cctalk wrote: > Anyone with a Williams tube project? The 1401 guys at CHM were working on one using a real 701 tube. I don't think it was ever finished. @tubetimeus built a small core array with Bulgarian cores https://twitter.com/TubeTimeUS/status/10534244

Re: Plane of core memory

2019-04-18 Thread Bob Smith via cctalk
Not any dec core memory stack board I know of, - fingers are not gold plated. - it is 8 bit. I could speculate it might be from a low cost system from the late 70s or early 80s but in that time, everything core was in the many thousands of dollars. On Thu, Apr 18, 2019 at 12:30 PM Chuck Guzis via

Re: Plane of core memory

2019-04-18 Thread dwight via cctalk
My understanding was that the mercury delay lines needed periodic repairs ( not sure what the cause was but mercury does dissolve into many metals ). If I were going to make a delay line memory, I'd go with the magnetostrictive. These are practical to make. One just needs a little ingenuity and

Re: Plane of core memory

2019-04-18 Thread Grant Taylor via cctalk
On 4/18/19 2:08 AM, Andrew Luke Nesbit wrote: This is great and I will look into this. I'm generally not into SBCs. (I do more with virtualization than have SBCs proliferate.) But the idea of having core memory, and it working, is quite appealing to me. But my original request was for so

Re: Plane of core memory

2019-04-18 Thread Chuck Guzis via cctalk
On 4/18/19 9:42 AM, Al Kossow via cctalk wrote: > > The 1401 guys at CHM were working on one using a real 701 tube. > I don't think it was ever finished. I don't expect that any EBAM has survived--I think all of the stuff I saw at CDC ADL was scrapped. Seems that the technology is all but forgot

Re: Plane of core memory

2019-04-18 Thread Paul Koning via cctalk
> On Apr 18, 2019, at 11:47 AM, Jon Elson via cctalk > wrote: > > On 04/18/2019 04:49 AM, Brent Hilpert via cctalk wrote: >> It's a 4-wire 3D planar array. By topology and construction I would guess it >> date it from the 60s. > Make that EARLY '60s. As soon as somebody figured out that you

Re: Plane of core memory

2019-04-18 Thread Brian L. Stuart via cctalk
On Thu, 4/18/19, dwight via cctalk wrote: > My understanding was that the mercury delay lines > needed periodic repairs ( not sure what the cause > was but mercury does dissolve into many metals ). > If I were going to make a delay line memory, I'd go with > the magnetostrictive. These are practic

Re: Plane of core memory

2019-04-18 Thread Jim Brain via cctalk
I am the enviable owners of a plane of memory (procured a few years back at VCF-East, when there were a bunch of 32K? boards int he consignment pile. (Sorry, not currently interested in selling :-) But, I am thankful for the links, as I have wanted to interface this with a CPU or PC of some ki

Re: Plane of core memory

2019-04-18 Thread Chuck Guzis via cctalk
My mention of electron-beam memory devices left off GE's BEAMOS and RCA's Selectron. WikiPedia has a nice article on the Selectron, but BEAMOS took a bit of looking: http://rcaselectron.com/GEBEAMOS.html Too bad that neither RCA nor GE were in the computer business in 1978. --Chuck

Re: Plane of core memory

2019-04-18 Thread William Donzelli via cctalk
> I don't expect that any EBAM has survived--I think all of the stuff I > saw at CDC ADL was scrapped. Seems that the technology is all but > forgotten today: > > https://bit.ly/2KOOl82 How was the CDC EBAM different from the other memory tubes, like the Radechon? -- Will

Re: Plane of core memory

2019-04-18 Thread William Donzelli via cctalk
> (Sorry, not currently interested in selling :-) Well, I am. And I have a LOT of 8K core system modules (planes and drivers) from old Stewart-Warner (I think) vector graphics terminals from the 1960s. Check Ebay in a week or three... -- Will

Re: Plane of core memory

2019-04-18 Thread William Donzelli via cctalk
> Or still do a fluid one, but take Turing's suggestion > and use gin as the medium. Better use some good error correction. -- Will

Re: Plane of core memory

2019-04-18 Thread dwight via cctalk
I don't believe there is a simple non-destructive way to read the state. If you could remove the cores, I believe you could put each core in a weak magnetic field. As the field passes from side to side, one should be able to determine the direction of the saturated cores because one side would a

Re: Plane of core memory

2019-04-18 Thread Al Kossow via cctalk
On 4/18/19 10:33 AM, dwight via cctalk wrote: > I don't believe there is a simple non-destructive way to read the state. https://patents.google.com/patent/US3924248

Digital Standard Mumps

2019-04-18 Thread Bill Gunshannon via cctalk
Does anyone know what the current status of this might be? I am fairly certain Mentec didn't get this and I am not sure anyone did. Did it merely die when everyone thought Mumps was on the down hill slide? Was it ever really a DEC product or was it something DEC picked up along the way after Mas

Re: Plane of core memory

2019-04-18 Thread Dennis Boone via cctalk
> * Is there a way to "read" the core non destructively using any kind > of passive method (I know, it would be tedious, no doubt, but I just > feel like I should "backup" the core before I go messing with it)? I'm having trouble figuring out what typical magnetic field strengths on t

Re: PDP-11/83 w/FPU?

2019-04-18 Thread allison via cctalk
On 04/18/2019 10:56 AM, Noel Chiappa via cctalk wrote: > > From: W2HX > > > i have a few CPUs available to me, a 11/23+, an 11/73 and I also have > > available to me an 11/83 > > I would like to try to run as many different OS's as may interest me, > > including some unixes as p

Re: Digital Standard Mumps

2019-04-18 Thread Paul Koning via cctalk
> On Apr 18, 2019, at 1:56 PM, Bill Gunshannon via cctalk > wrote: > > > Does anyone know what the current status of this might be? I am > fairly certain Mentec didn't get this and I am not sure anyone > did. Did it merely die when everyone thought Mumps was on the > down hill slide? Was i

Re: PDP-11/83 w/FPU?

2019-04-18 Thread Paul Koning via cctalk
> On Apr 18, 2019, at 2:19 PM, allison via cctalk wrote: > > ... > There may be other versions that place less of a burden on requiring I&D. > However I've not encountered a need for FPU connected to OS. Also > the assumption for many unix is MMU support but not all DEC OS have > that require

Re: Digital Standard Mumps

2019-04-18 Thread Dan Veeneman via cctalk
On 4/18/2019 2:27 PM, Paul Koning via cctalk wrote: > my memory is that DSM-11 is an operating system all its own, not just a > language processor running on top of a standard OS like RSTS. In the late 1980s and early 1990s, we used DSM running on VMS 4.7 for a nationwide (United States) mortgage

Re: Digital Standard Mumps

2019-04-18 Thread Warner Losh via cctalk
On Thu, Apr 18, 2019 at 12:41 PM Dan Veeneman via cctalk < cctalk@classiccmp.org> wrote: > On 4/18/2019 2:27 PM, Paul Koning via cctalk wrote: > > my memory is that DSM-11 is an operating system all its own, not just a > language processor running on top of a standard OS like RSTS. > > In the late

Re: Digital Standard Mumps

2019-04-18 Thread Bill Gunshannon via cctalk
On 4/18/19 2:41 PM, Dan Veeneman wrote: > On 4/18/2019 2:27 PM, Paul Koning via cctalk wrote: >> my memory is that DSM-11 is an operating system all its own, not just a >> language processor running on top of a standard OS like RSTS. > > In the late 1980s and early 1990s, we used DSM running on V

Re: Plane of core memory

2019-04-18 Thread Brent Hilpert via cctalk
On 2019-Apr-18, at 8:47 AM, Jon Elson wrote: > On 04/18/2019 04:49 AM, Brent Hilpert via cctalk wrote: >> It's a 4-wire 3D planar array. By topology and construction I would guess it >> date it from the 60s. > Make that EARLY '60s. As soon as somebody figured out that you could combine > the sen

Re: Plane of core memory

2019-04-18 Thread Brent Hilpert via cctalk
On 2019-Apr-18, at 9:30 AM, Chuck Guzis via cctalk wrote: > On 4/18/19 9:02 AM, Jim Manley via cctalk wrote: >> Jussi Kilpelainen's page cited above ( >> https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/) >> refers to the work of Ben North and Oliver Nash to create another co

Re: Plane of core memory

2019-04-18 Thread Noel Chiappa via cctalk
> From: Jon Elson > As soon as somebody figured out that you could combine the sense and > inhibit wires, everybody immediately went to 3-wire planes. I"m suprised the idea wasn't patented. Or maybe it was, and they made the license widely available at modest terms? Noel

Re: PDP-11/83 w/FPU?

2019-04-18 Thread Noel Chiappa via cctalk
> From: Allison > Experience is that an 11/23 or 23+ will run V6 as mine does. What changes did you make to get it to run? (I assume the stock binary wouldn't run.) Noel

Re: PDP-11/83 w/FPU?

2019-04-18 Thread allison via cctalk
On 04/18/2019 04:19 PM, Noel Chiappa via cctalk wrote: > > From: Allison > > > Experience is that an 11/23 or 23+ will run V6 as mine does. > > What changes did you make to get it to run? (I assume the stock binary > wouldn't run.) > > Noel The hardest part was was getting it on a RL

RE: Plane of core memory

2019-04-18 Thread Dave Wade via cctalk
> -Original Message- > From: cctalk On Behalf Of Chuck Guzis via > cctalk > Sent: 18 April 2019 17:30 > To: Jim Manley via cctalk > Subject: Re: Plane of core memory > > On 4/18/19 9:02 AM, Jim Manley via cctalk wrote: > > Jussi Kilpelainen's page cited above ( > > https://www.tindie.com

Re: Plane of core memory

2019-04-18 Thread William Donzelli via cctalk
>Stewart-Warner (I think) vector graphics terminals > from the 1960s. Check Ebay in a week or three... Correction: Hazeltine. -- Will

Re: Digital Standard Mumps

2019-04-18 Thread Paul Koning via cctalk
> On Apr 18, 2019, at 3:06 PM, Warner Losh wrote: > > On Thu, Apr 18, 2019 at 12:41 PM Dan Veeneman via cctalk > wrote: > On 4/18/2019 2:27 PM, Paul Koning via cctalk wrote: > > my memory is that DSM-11 is an operating system all its own, not just a > > language processor running on top of

Re: Digital Standard Mumps

2019-04-18 Thread Warner Losh via cctalk
On Thu, Apr 18, 2019 at 5:11 PM Paul Koning wrote: > > > > On Apr 18, 2019, at 3:06 PM, Warner Losh wrote: > > > > On Thu, Apr 18, 2019 at 12:41 PM Dan Veeneman via cctalk < > cctalk@classiccmp.org> wrote: > > On 4/18/2019 2:27 PM, Paul Koning via cctalk wrote: > > > my memory is that DSM-11 is

Re: Digital Standard Mumps

2019-04-18 Thread John Willis via cctalk
DSM went to InterSystems Corp. during their spree of buying up every MUMPS implementation vendor they could get their hands on. They got DataTree (DTM), Micronetics (MSM), and DSM. They already had ISM. They merged ISM and features from the others into OpenM, which evolved into Caché, their curr

Re: Digital Standard Mumps

2019-04-18 Thread Paul Koning via cctalk
> On Apr 18, 2019, at 7:41 PM, Warner Losh wrote: > > > >> On Thu, Apr 18, 2019 at 5:11 PM Paul Koning wrote: >> >> ... >> Poor man's hypervisor, I like that. >> >> That's reasonably accurate. RSTS/E had "run-time systems", originally the >> interpreter, support library, and user interf

Re: Plane of core memory

2019-04-18 Thread Anders Nelson via cctalk
I believe I read they weaved the planes this way to minimize crosstalk, EMI or heat. =] On Thu, Apr 18, 2019, 1:13 PM Paul Koning via cctalk wrote: > > > > On Apr 18, 2019, at 11:47 AM, Jon Elson via cctalk < > cctalk@classiccmp.org> wrote: > > > > On 04/18/2019 04:49 AM, Brent Hilpert via ccta

PDP-11/93 and PMI Memory

2019-04-18 Thread Bill Gunshannon via cctalk
Well, I was finally able to get a PMI memory board to expand my 11/93 to the full 4 Meg. (Thanks Paul!) I thought it would be as simple as configuring what bank I wanted it to fill and inserting it (in front of the CPU). Sadly, that didn't work. First problem is the only document i could find

that AGC DSKY auction

2019-04-18 Thread Brent Hilpert via cctalk
So it appears it went for 168 K$ at hammer. With buyer's premium, that puts the sale price at 210 K$. https://www.rrauction.com/bidtracker_detail.cfm?IN=5222

Re: that AGC DSKY auction

2019-04-18 Thread Adrian Stoness via cctalk
weird this only went for 220 bucks https://www.rrauction.com/bidtracker_detail.cfm?IN=5109 On Thu, Apr 18, 2019 at 9:03 PM Brent Hilpert via cctalk < cctalk@classiccmp.org> wrote: > So it appears it went for 168 K$ at hammer. > > With buyer's premium, that puts the sale price at 210 K$. > >

Re: Plane of core memory

2019-04-18 Thread Jon Elson via cctalk
On 04/18/2019 03:15 PM, Noel Chiappa via cctalk wrote: > From: Jon Elson > As soon as somebody figured out that you could combine the sense and > inhibit wires, everybody immediately went to 3-wire planes. I"m suprised the idea wasn't patented. Or maybe it was, and they made the

Re: Plane of core memory

2019-04-18 Thread dwight via cctalk
Although, after written, there is little magnetism lost out side of the ring, while being magnetized, there is quite a bit of stray magnetism. By placing the the rings at 90 degrees, it minimizes the magnetism induced in the adjacent ring. The fields follow the inverse square law so the effect d

Re: PDP-11/93 and PMI Memory

2019-04-18 Thread Jerry Weiss via cctalk
The second memory boards CSR should be viable in ODT. The toggle switch internal contacts may be tarnished with age. Cycle each switch, that is used in the on position, multiple times and see if the CSR appears. Try another CSR if necessary to confirm the memory board is responsive to Q-bus re

Re: that AGC DSKY auction

2019-04-18 Thread Jim Manley via cctalk
Bidding hasn't ended on the display electronics, but, it's not clear when bidding will end, so, bid high and often! :D On Thu, Apr 18, 2019 at 8:05 PM Adrian Stoness via cctalk < cctalk@classiccmp.org> wrote: > weird this only went for 220 bucks > https://www.rrauction.com/bidtracker_detail.cfm?I

Re: Plane of core memory

2019-04-18 Thread Curious Marc via cctalk
I believe 3 wire memory was first introduced by IBM in their 360 systems, and it was a very large development effort. They would almost certainly have patented their way to do it, but I have not checked. Marc From: cctalk on behalf of "cctalk@classiccmp.org" Reply-To: Jon Elson , "cctalk@