[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

4vtomat added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVCallingConv.td:52 // Same as CSR_Interrupt, but including all 64-bit FP registers. def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add CSR_Interrupt, (sequence

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

wangpc added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVCallingConv.td:52 // Same as CSR_Interrupt, but including all 64-bit FP registers. def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add CSR_Interrupt, (sequence

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

4vtomat updated this revision to Diff 556995. 4vtomat added a comment. Add VRM2, VRM4 and VRM8 to CalleeSaved register list. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154576/new/ https://reviews.llvm.org/D154576 Files:

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

asb added a comment. Putting this behind an attribute for now makes sense given that we don't seem to have consensus on https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/389 let alone how to manage any migration. I'm slightly wary of merging this with a generic attribute (currently

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

aaron.ballman added a comment. The clang bits LGTM, but I'll leave final sign-off to the LLVM reviewers. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154576/new/ https://reviews.llvm.org/D154576 ___

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

4vtomat updated this revision to Diff 545413. 4vtomat marked 2 inline comments as done. 4vtomat added a comment. Resolved Aaron's comments. Also group some code and refactoring some code to make it much clear. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

4vtomat marked 2 inline comments as done. 4vtomat added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3267 case CC_PreserveAll: + case CC_RISCVVectorCall: // FIXME: we should be mangling all of the above. aaron.ballman wrote: > Is it

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

4vtomat added a comment. In D154576#4483919 , @lhtin wrote: > In D154576#4476300 , @4vtomat wrote: > >> In D154576#4476291 , @craig.topper >> wrote: >> >>> Does this

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

aaron.ballman added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3267 case CC_PreserveAll: + case CC_RISCVVectorCall: // FIXME: we should be mangling all of the above. Is it possible to use this calling convention on Windows where we'd

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

lhtin added a comment. In D154576#4476300 , @4vtomat wrote: > In D154576#4476291 , @craig.topper > wrote: > >> Does this only change the calling convention when >> `__attribute__((riscv_vector_cc))` is used?

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

4vtomat added a comment. In D154576#4476291 , @craig.topper wrote: > Does this only change the calling convention when > `__attribute__((riscv_vector_cc))` is used? The attribute should be mentioned > in the patch description. Yes it only changes

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

craig.topper added a comment. Does this only change the calling convention when `__attribute__((riscv_vector_cc))` is used? The attribute should be mentioned in the patch description. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154576/new/

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

4vtomat created this revision. Herald added subscribers: jobnoorman, luke, VincentWu, ormris, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, steven_wu, edward-jones, zzheng, jrtc27, shiva0217,