[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -618,187 +618,210 @@ def TuneAmpere1B : SubtargetFeature<"ampere1b", "ARMProcFamily", "Ampere1B", def ProcessorFeatures { - list A53 = [HasV8_0aOps, FeatureCRC, FeatureCrypto, + list A53 = [HasV8_0aOps, FeatureCRC, FeatureSHA2, FeatureAES,

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff ee54c86ef70d7809e7d67cd44de2d3153b31c46e 51701f25e30aea995a8a38127f0e80cb37e85f8d --

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -812,178 +812,270 @@ def ProcessorFeatures { list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE]; } +class AArch64Processor< + string n, + Architecture64 arch, + SchedMachineModel m, + list f, + list tunef, + list default_extensions +> : ProcessorModel { + //

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -812,178 +812,270 @@ def ProcessorFeatures { list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE]; } +class AArch64Processor< + string n, + Architecture64 arch, + SchedMachineModel m, + list f, + list tunef, + list default_extensions +> : ProcessorModel { + //

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -812,178 +812,270 @@ def ProcessorFeatures { list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE]; } +class AArch64Processor< + string n, + Architecture64 arch, + SchedMachineModel m, + list f, + list tunef, + list default_extensions +> : ProcessorModel { + //

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -812,178 +835,192 @@ def ProcessorFeatures { list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE]; } +class AArch64Processor< + string n, + Architecture64 arch, + SchedMachineModel m, + list f, + list tunef +> : ProcessorModel { + // The base architecture for

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -618,187 +618,210 @@ def TuneAmpere1B : SubtargetFeature<"ampere1b", "ARMProcFamily", "Ampere1B", def ProcessorFeatures { - list A53 = [HasV8_0aOps, FeatureCRC, FeatureCrypto, + list A53 = [HasV8_0aOps, FeatureCRC, FeatureSHA2, FeatureAES,

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -812,178 +812,270 @@ def ProcessorFeatures { list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE]; } +class AArch64Processor< + string n, + Architecture64 arch, + SchedMachineModel m, + list f, + list tunef, + list default_extensions +> : ProcessorModel { + //

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -108,6 +111,101 @@ static void EmitARMTargetDef(RecordKeeper , raw_ostream ) { << "#undef EMIT_EXTENSIONS\n" << "#endif // EMIT_EXTENSIONS\n" << "\n"; + + // Emit architecture information + OS << "#ifdef EMIT_ARCHITECTURES\n"; + + // Return the C++ name

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

tmatheson-arm wrote: Summary of the PR after the recent changes: - `CPUInfo` in `TargetParser` is now generated from `AArch64Processors.td` - The printed order of CPUs has changed, due to definition order. - `+perfmon` now appears in `target-features` for some CPUs. This is because

[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)

@@ -812,178 +812,270 @@ def ProcessorFeatures { list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE]; } +class AArch64Processor< + string n, + Architecture64 arch, + SchedMachineModel m, + list f, + list tunef, + list default_extensions +> : ProcessorModel { + //