The only rule for building c_start.o from c_start.S is the following
in build/arch/i386/lib/c_start.d:
build/arch/i386/lib/c_start.o: src/arch/i386/lib/c_start.S \
/root/build/coreboot/coreboot-v4/build/config.h \
src/include/cpu/x86/post_code.h
The question is that what rule is making the file,
ali hagigat wrote:
what rule is making the file, c_start.d itself?
It's very strange that you are so obsessed with the build system so
many months after starting to look at coreboot.
I first looked at coreboot nearly 10 years ago, and while I am not
super active in the codebase there are still
agree with peter. if you want to learn more about the building process of
opensource project.
i think coreboot is too complex for the beginner. You can choose some small
project.
PS: the file %.d is created by gcc with the parameter -MMD, if you want to
know about
this, check the gcc man page.
Author: oxygene
Date: Tue Oct 26 17:11:45 2010
New Revision: 5989
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5989
Log:
reg is only used inside the #if clause, so declare it there. trivial.
Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de
Acked-by: Patrick Georgi
Convert all ck804-based boards to tiny bootblock.
Signed-off-by: Jonathan Kollasch jakll...@kollasch.net
---
Index: src/southbridge/nvidia/ck804/Kconfig
===
--- src/southbridge/nvidia/ck804/Kconfig(revision 5989)
+++
Hello all,
I'm using coreboot4 + seabios to boot a K8/RS780/SB710 based board,
my SATA disk and DVD-drive connects to SB710's SATA0/SATA1 port.
Now the board can boot Ubuntu-10.10-i386 and FedoraCore-13-i686, and
everything seems ok, but with 64bit linux OS, including SUSE11-X86_64/
Author: oxygene
Date: Tue Oct 26 17:51:57 2010
New Revision: 5990
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5990
Log:
Move bcm5785_enable_rom.c include to where it's used.
Right now, it breaks the build of bootblock enabled boards
with that chipset.
Signed-off-by: Patrick Georgi
Hi,
attached patch fixes boot on my bcm5785-based board with low loglevels.
I guess without some serial text early on (which is slow), the devices
aren't readily available, and so things go wrong and finally hang on the
last write operation in the modified function.
I opted against a timeout +
Thanks for the suggestion. What I am really looking for is the
special handling that a commercial BIOS does for legacy video
devices. Say you have a typical desktop UMA board. If you add a
PCI video card, Windows resource manager will not report any
resource conflicts. The same is not true
Am 26.10.2010 17:36, schrieb Jonathan A. Kollasch:
Convert all ck804-based boards to tiny bootblock.
Signed-off-by: Jonathan Kollasch jakll...@kollasch.net
Acked-by: Patrick Georgi patrick.geo...@coresystems.de
--
coreboot mailing list: coreboot@coreboot.org
Author: jakllsch
Date: Tue Oct 26 18:10:20 2010
New Revision: 5991
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5991
Log:
Convert all ck804-based boards to tiny bootblock.
Signed-off-by: Jonathan Kollasch jakll...@kollasch.net
Acked-by: Patrick Georgi patrick.geo...@coresystems.de
Patrick Georgi wrote:
attached patch fixes boot on my bcm5785-based board with low loglevels.
I guess without some serial text early on (which is slow), the devices
aren't readily available, and so things go wrong and finally hang on the
last write operation in the modified function.
I
This fixes a FIXME in src/cpu/amd/mtrr/amd_mtrr.c and shuts up the
Linux kernel, which was previously complaining that the MTRR setup
is wrong, if the cpu supports more than CONFIG_CPU_ADDR_BITS bits of
address space.
Shamelessly copied from Linux arch/x86/kernel/cpu/mtrr/main.c
Signed-off-by:
We need to call smp_write_lintsrc instead of smp_write_intsrc for
local ints. This is wrong in most coreboot mptables, probably all
generated by util/mptable.c
After fixing this now XP can boot in MPS mode on my M2V.
Signed-off-by: Tobias Diedrich ranma+coreb...@tdiedrich.de
---
Index:
] Thanks for the suggestion. What I am really looking for is the
] special handling that a commercial BIOS does for legacy video
] devices. Say you have a typical desktop UMA board. If you add a
] PCI video card, Windows resource manager will not report any
] resource conflicts. The same is not
Some 440BX SMP activity! Woot! :-D
There is a note in northbridge/intel/i440bx/raminit.c about a bit in a
440BX register that needs configured for SMP machines (NBXCFG I think?
don't recall off my head - could be myself who left the note there).
You will want to make sure that gets addressed.
Author: uwe
Date: Wed Oct 27 00:40:16 2010
New Revision: 5992
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5992
Log:
We need to call smp_write_lintsrc() instead of smp_write_intsrc() for
local ints. This is wrong in most coreboot mptables, probably all
generated by
On Tue, Oct 26, 2010 at 07:27:09PM +0200, Tobias Diedrich wrote:
We need to call smp_write_lintsrc instead of smp_write_intsrc for
local ints. This is wrong in most coreboot mptables, probably all
generated by util/mptable.c
After fixing this now XP can boot in MPS mode on my M2V.
On Tue, Oct 26, 2010 at 03:44:05PM -0400, Keith Hui wrote:
Some 440BX SMP activity! Woot! :-D
There is a note in northbridge/intel/i440bx/raminit.c about a bit in a
440BX register that needs configured for SMP machines (NBXCFG I think?
don't recall off my head - could be myself who left the
* Peter Stuge pe...@stuge.se [101026 18:36]:
Patrick Georgi wrote:
attached patch fixes boot on my bcm5785-based board with low loglevels.
I guess without some serial text early on (which is slow), the devices
aren't readily available, and so things go wrong and finally hang on the
last
Marc Jones wrote:
]Would it be better for the option to call a romstage.c function to set
]the swaplist?
]
]Marc
]
]--
]http://se-eng.com
That is not a bad idea. It avoids adding anything to kconfig, and
avoids any length limit on the swap list.
All it takes is this:
1) Remove the swap list
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