is CONFIG_COREINFO_SECONDARY_PAYLOAD supposed to work?
I tried to add this option in kconfig, but the coreboot table is flushed. I
tried to fix it. But it seems to be hard. Anyone got idea? Or I have to work
really hard to fix it? :(
Zheng
Date: Sun, 20 Mar 2016 20:07:34 -0700
From: nochristre
Hi all,
I'm Alberto, a budding c++ programmer. Right now I grasp the basics of c++;
I'm studying with "Programming
principles and practices with C++" by Stroustroup and I want to start doing
something more practical, contributing
to a real life project like Coreboot. I'm also studying C, as it is t
On Sat, Mar 19, 2016 at 7:14 PM, Zir Blazer wrote:
> Fix: Added xen-users as CC.
>
>
> > From: nos...@kota.moe
> > To: xen-us...@lists.xen.org
> > Date: Sat, 19 Mar 2016 07:30:40 +
> > Subject: [Xen-users] Enabling AMD-Vi IOMMU panics Xen
> >
> > Note that the
Hi, all,
I am trying to use the nvramcui.
If the serial cable is plugged in, both the serial console and VGA console are
stable.
but if the serial cable is unplugged, the VGA console are flashing. The
flashing part is the text inside the frame "Press F1 when done", i.e., the CMOS
entries.
Zhe
It can be fixed by this change.
diff --git a/payloads/nvramcui/nvramcui.c b/payloads/nvramcui/nvramcui.c
index a4d28c1..27fcb0d6 100644
--- a/payloads/nvramcui/nvramcui.c
+++ b/payloads/nvramcui/nvramcui.c
@@ -190,16 +190,19 @@ int main()
post_form(form);
done = 0;
+render_form(for
The coreinfo as secondary payload should work under SeaBIOS. if it's having
problems, let me know and I'll try to get any issues fixed. I did just
test it under qemu, and it booted into coreinfo correctly when it didn't
find another payload.
Martin
On Mon, Mar 21, 2016 at 1:36 AM, Zheng Bao wro
Hi Martin,
Autoport wasn't much use to me since it didn't recognize anything.
However it left behind all kinds of logs like the full lspci output and
stuff like that -> that's why I shared it.
https://github.com/rnplus/test-coreboot-for-asus-p5g41t-m-lx/blob/maste
r/superiodump
https://github.co
Ok, looking at the differences between your code ant the GA-G41M code, I
think you might want to add back in the ich7_enable_lpc() function (or
something equivalent) . My guess is that you're not sending the necessary
IO ports out to LPC.
Martin
On Mon, Mar 21, 2016 at 2:25 PM, Renze Nicolai wr
Hi Martin,
I added back that function and tried changing / adding some other stuff
and guess what? Serial console works! Thank you for pointing in the
right direction.
Now the next problem: this motherboard uses an Intel X4X northbridge
with DDR3 RAM.
This is the serial console output:
=
After a re-test, the coreboot table is back. Maybe my fault, but I don't know
what it is.
Hope it will not come up again.
Zheng
From: gauml...@gmail.com
Date: Mon, 21 Mar 2016 12:24:56 -0600
To: fishb...@hotmail.com
Subject: Re: [coreboot] Multiple payloads support?
CC: rminn...@gmail.com; nochr
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