Hi Jose,
On 20.09.2018 15:58, Jose Trujillo via coreboot wrote:
> I will follow your advise of checking EC and about the base FW I am
> using the original UEFI AMI FW but, if still doesn't boot I will replace
> ME and descriptor as you suggested.
Better don't. The Firmware Descriptor and ME are
Hi Antony,
On 20.09.2018 09:28, Antony AbeePrakash X V wrote:
> Thanks for the response , we extracted the flash descriptor from the
> BIOS Image using the ifdtool as below
if you already have a working firmware combination for your board (I
assume the BIOS Image you mention is one), I can only
Dear Naresh,
I choose the RVP8 board because is the only match in terms of CPU and memory,
other templates made by google supports kabylake U/Y only processors and no
DDR4.
My system has differences and I will check them after I finish GPIO.
I already determined the proper VR settings and set
RVP8 is known to boot. GPIO config should be fine unless you are modifying HW.
In logs you provided, ec communication seems to fail. Thus can you
make sure right EC is flashed in the RVP8.
In my board, it looks like this:
recv_ec_data: 0x10
recv_ec_data: 0x69
Also make sure that you have right
On Thu, Sep 20, 2018 at 01:49:57PM +0530, galla rao wrote:
> Hi All,
>
> This is my first email to coreboot open source team
Hi and welcome!
> Does coreboot 4.8/4.9 support
> *Specific absorption rate* (*SAR*)
>
> How does Linux or Kernel driver uses the SAR Tx Power limits, Anyone
> working
Hi Gallo,
coreboot does not do anything with SAR, as far as I know. There may be some
data (e.g. regulatory domain setting) that you need to provide to the
modem, though. You should check the driver and documentation for the modem
to get more details.
On Thu, Sep 20, 2018 at 1:21 AM galla rao
Hi All,
Thanks for the response , we extracted the flash descriptor from the BIOS Image
using the ifdtool as below
./ifdtool -x ~/.bin
Peculiar firmware descriptor, assuming Ibex Peak compatibility.
Flash Region 0 (Flash Descriptor): - 0fff
Flash Region 1 (BIOS): 1000 -
Hi Ben,
Adding the 'generic' board it's an interesting option as a starting point to
develop/porting to new boards.
I'll try your suggestion to incorporate the changes from dsc and fdf files to
my current working Tianocore coreboot payload.
I'll report back the results!
Thanks!
Jorge
Hi Jorge,
You could use UEFI Payload's .dsc and .fdf files as a reference and modify the
TianoCore CorebootPayload's .dsc and .fdf files accordingly for those TPM
related modules.
UEFI Payload is under development (in staging area) and hasn't reached the
quality standard required by EDKII
Hi All,
This is my first email to coreboot open source team
Does coreboot 4.8/4.9 support
*Specific absorption rate* (*SAR*)
How does Linux or Kernel driver uses the SAR Tx Power limits, Anyone
working on this task, Kindly respond
regards
Galla
--
coreboot mailing list: coreboot@coreboot.org
Hello Nico,
Yes, I am using Intel Kabylake DDR4 RVP8 board.
> Never use another board's GPIO settings.
Reading the mail list yesterday I saw that warning maybe from you and I will do
the correct changes to GPIO just after editing VR settings.
I am just started coreboot several months ago and
Hi Ben!
Thanks for the info! I have one question. Have I to implement a
CustomizationSample/Boards for my board? With the current
tianocore payload I don't have to implement nothing to have a working UEFI...
Thanks!
Jorge
De: You, Benjamin
Enviado:
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