[coreboot] Re: ASUS AM1I-A and AM1M-A, ECC

On Thu, Sep 26, 2019 at 4:34 AM Matt B wrote: > > Hello, > > This might be a dumb question, but not having a manual to go off of, would > the ECC ram have to be buffered or unbuffered? (if it can be made to work > with the AM1I-A at all) Any other important specifications? > > I bought a AM1I-A

[coreboot] Re: ASUS AM1I-A and AM1M-A, ECC

Hello, This might be a dumb question, but not having a manual to go off of, would the ECC ram have to be buffered or unbuffered? (if it can be made to work with the AM1I-A at all) Any other important specifications? I bought a AM1I-A (I've had my eye on a good deal on ebay) and it should be here

[coreboot] Fixing Hidden PCI devices on Intel common SoCs

Commit 903b40a [soc/intel: Replace uses of dev_find_slot()] replaced calls to dev_find_slot() with calls to pcidev_path_on_root() for all Intel common SoCs, but it seems unclear exactly what problem this was intended to fix, and has created problems with locating hidden PCI devices. Commit

[coreboot] Beaglebone Black support

Hi All, I see that we can build coreboot for Beaglebone. Has anyone successfully booted it. I copied over the MLO generated but no logs on UART. Any help is appreciated. BTW, I have a BBB RevC. Thanks, Vijai Kumar K ___ coreboot mailing list --

[coreboot] Re: Mainboard porting assistance

Hi again, I've been working on this over at https://review.coreboot.org/c/coreboot/+/35523 and I've found that Tianocore doesn't seem to be logging (or doesn't start, but there's no error, so there's no reason to assume that) and SeaBIOS crashed for me. Without a display, how can I find out

[coreboot] Re: graphic preallocated memory

Dear Jief, dear Michał, On 25.09.19 14:39, Michal Zygowski wrote: […] DVMT... this terminology is so confusing. I think it refers to the UMA memory which is configured here for x220: https://github.com/coreboot/coreboot/blob/master/src/northbridge/intel/sandybridge/early_init.c#L116 Also,

[coreboot] Re: KGPE-D16 maintainership

On September 23, 2019 8:42:04 AM UTC, Arthur Heymans wrote: >Hi > >Thanks for wanting to maintain this platform! > >There are a issues with the amdfam10 codebase that could be improved >upon. I'll try to list a few of them, to give an idea of what >maintaining this code in 2019 could mean.

[coreboot] Re: graphic preallocated memory

Hi and welcome to coreboot, First of all please use coreboot container: https://hub.docker.com/r/coreboot/coreboot-sdk/ You are guaranteed to have no errors during compilation. DVMT... this terminology is so confusing. I think it refers to the UMA memory which is configured here for x220:

[coreboot] graphic preallocated memory

Hi, I'm new to coreboot and this list, so please forgive and tell me if I'm doing something wrong. I've successfully compile coreboot and flash it to a Lenovo x220. I tried seabios and tianocore as a payload and it works. So strange compile errors as I'm used to when I compile an opensource