[coreboot] Re: Including a video BIOS

2020-11-11 Thread Naresh G. Solanki
Yes I had faced problem with VGA bios for Atom Z520 platform due to the interrupt dependency. so had to move graphic init to SeaBios. Also VBT is good option since you are already using fsps for silicon init. On Thu, 12 Nov, 2020, 11:56 am Benjamin Doron, wrote: > Hi, > Personally, I would recom

[coreboot] Re: Including a video BIOS

2020-11-11 Thread Benjamin Doron
Hi, Personally, I would recommend to use the FSP GOP, which should/could work with even the stock VBT in "*FspBinPkg/SampleCode/Vbt/". You can also customise it for your board using Intel BMP (Binary Modification Program) available online. However, if you want to use the VGABIOS, you shouldn't n

[coreboot] Re: ALC256 datasheet

2020-11-11 Thread Benjamin Doron
Hi, If the verbs are not enough, you might want to try searching for the azalia function reset verb in the vendor firmware, using UEFITool, for example. I know of at least my laptop, as well as one or more Thinkpads, that needed the additinal verbs there (not in Linux's "init_pin_verbs") to get the

[coreboot] Re: System gcc requirements

2020-11-11 Thread Julius Werner
>> Whenever I want a build without vboot I get really annoyed about this >> hardcoded dependency, even when vboot is disabled in Kconfig. >> >> Would a patch to make the dependency conditional on Kconfig get accepted? > > I should hope so, though I recommend starting a new thread to see if experts

[coreboot] Re: Including a video BIOS

2020-11-11 Thread Andy Pont
Angel wrote… This means you're going to use libgfxinit instead of a video BIOS. libgfxinit is a graphics modesetting library written in SPARK, a OK, so that isn’t the way I want to go (I don’t think). Using the romheaders utility on the file I have extracted gives me: Image 1: PCI Expansion

[coreboot] Re: Including a video BIOS

2020-11-11 Thread Angel Pons
Hi Andy, Naresh, On Wed, Nov 11, 2020 at 5:10 PM Andy Pont wrote: > > Naresh wrote… > > Looking at kconfig, the mainboard should select MAINBOARD_HAS_LIBGFXINIT. > For example see "grep -rsn MAINBOARD_HAS_LIBGFXINIT src/" > > I haven't used this, so not sure what else might be needed. > > In or

[coreboot] Re: Including a video BIOS

2020-11-11 Thread Andy Pont
Naresh wrote… Looking at kconfig, the mainboard should select MAINBOARD_HAS_LIBGFXINIT. For example see "grep -rsn MAINBOARD_HAS_LIBGFXINIT src/" I haven't used this, so not sure what else might be needed. In order to get the build to progress I have needed to select MAINBOARD_HAS_LIBGFXINI

[coreboot] Re: Including a video BIOS

2020-11-11 Thread Naresh G. Solanki
Looking at kconfig, the mainboard should select MAINBOARD_HAS_LIBGFXINIT. For example see "grep -rsn MAINBOARD_HAS_LIBGFXINIT src/" I haven't used this, so not sure what else might be needed. On Wed, Nov 11, 2020 at 9:18 PM Andy Pont wrote: > Naresh wrote… > > 2. Open file -> > vim src/driver

[coreboot] Re: Including a video BIOS

2020-11-11 Thread Andy Pont
Naresh wrote… 2. Open file -> vim src/drivers/intel/gma/Kconfig +90 Add like so that it looks like: || SOC_INTEL_WHISKEYLAKE || SOC_INTEL_COMETLAKE So, I have made the change to src/drivers/intel/gma/Kconfig and when I run the build it now gives the error: warning: (BOARD_SPECIFIC_OPTIONS) se

[coreboot] Re: Including a video BIOS

2020-11-11 Thread Naresh G. Solanki
1. vga bios: You need to rename the extracted vga bios binary to pci8086,ABCD.rom . Here ABCD is device ID of Integrated Graphic of the cometlake SoC To get the device ID, just run lspci -vvvk -s 00:02.0 # This is typically bus 0, dev 2 func 0. Also place the file in the coreboot folder & not i

[coreboot] Including a video BIOS

2020-11-11 Thread Andy Pont
Hello, Using the instructions in the old Wiki page [1] I have used the UEFI method and UEFI tool to extract the video BIOS from the standard binary that comes with the board. I have followed the layout of some of the other Kconfig files in the mainboard directory and added the following to my

[coreboot] Re: Flashing coreboot and Intel Flash Descriptor Erase Issue

2020-11-11 Thread Naresh G. Solanki
It's possible that there are different device ids. Example for baytrail there are multiple ids. You need to add the did specific to your soc & build flashrom & use that. Did you figureout where is BIOS_CNTRL.LE bit is getting set. FSPS or in Coreboot ? We need to prevent the bit from setting. As

[coreboot] Re: Flashing coreboot and Intel Flash Descriptor Erase Issue

2020-11-11 Thread Balaji Sivakumar
Naresh, Regarding adding support for denverton soc in flashrom, I could see a patch in flashrom but device id seems to be incorrect one. Any comments on this patch, as per soc device id should be 0x19e0. https://github.com/flashrom/flashrom/pull/58/commits Thanks Bealaji On Thu, Oct 22, 2020 at