Hi! Thank you. Just in case, can you please also attach the full output
of inteltool -g.
On 04.12.2021 13:30, Mariusz Grabarczyk wrote:
Hi
I would like to have memory support added for mb/apple: MacBook Air
5,2 (A1466)
Per
So, it's been three weeks, no hangs, no crashes, everything's fine on my
W530 (which is my primary working machine) with 5.4.28-gentoo kernel and
HT disabled by coreboot patch. CPU is i7-3940XM.
On 20.06.2020 14:46, Evgeny Zinoviev via coreboot wrote:
Could be... Thanks for testing!
I've
Hi again. There's another patch that fits to the topic that you will
probably want to try out: https://review.coreboot.org/c/coreboot/+/42547/
On 12/15/19 3:57 PM, Lars Hochstetter wrote:
Hi everyone,
I'm looking for an option to configure my Intel IvyBridge CPU (enable
/ disable
s/code/core/, lol.
On 6/20/20 2:46 PM, Evgeny Zinoviev via coreboot wrote:
Could be... Thanks for testing!
I've also put it on some of my daily work machines: a quad-code Ivy
and a dual-code Sandy in order to see how it works in a real world...
Works so far. So if it doesn't end up crashing
Could be... Thanks for testing!
I've also put it on some of my daily work machines: a quad-code Ivy and
a dual-code Sandy in order to see how it works in a real world... Works
so far. So if it doesn't end up crashing in a week or two I'd say it's
stable. We'll see.
On 6/20/20 1:42 PM, Lars
Hi!
Thank you for the report.
If you're still on it, can you try the latest update? There was
seemingly incorrect reset sequence after setting the HT disable bit. I'm
not sure if it was the reason of problems, but would be good to test again.
On 6/16/20 12:31 PM, Lars Hochstetter wrote:
coreboot doesn't boot the OS, it performs hardware initialization and
passes control to a payload (SeaBIOS, GRUB, Tianocore, etc. - these are
payloads). So you would have to use something like clover anyway.
On 6/8/20 6:22 PM, lol wrote:
Hi, I wanted to ask if coreboot is capable of booting
Is [1] the current, most recent work on supporting nvidia Optimus?
Yes! Needs rebasing, though.
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On 2/21/20 9:16 PM, Matt DeVillier wrote:
if you want to disable
the ME [...], hardware flashing is
mandatory).
You can also disable ME without external flashing with this patch:
https://review.coreboot.org/c/coreboot/+/37115
It will not unlock FD and you can't use more space for coreboot,
Hi. You can just use flashrom and flash internally, unless you
specifically modified libreboot to set flash protections.
It's recommended to flash only bios region (use --ifd -i bios -N), as
it's generally safer.
On 2/16/20 12:31 PM, Human Human wrote:
Hello, I am wondering what steps do I
Sorry for a long reply too. About mrc.bin: no, it's actually possible
to use mrc blob on Sandy/Ivy, but as I see it's not supported across
all boards. X220 has support, other boards needs patching (or maybe
patches are already on gerrit, I'm not sure). It shouldn't be hard to
get it working,
No, they have Intel Boot Guard, which prevents running custom firmware.
On 2/11/20 12:47 PM, Eero Volotinen wrote:
Hi,
is the thinkpad x250 .. x260 supported in coreboot?
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I personally don't think that libgfxinit instead of vgabios or vice
versa will make any difference in this case. I'd recommend to test
native raminit vs mrc.bin instead.
Correct me if I'm wrong but isn't the mrc.bin Haswell specific [1]?
From what I recall I never saw an option in "make
From what I recall, the last coreboot master I tried resulted in
crashes without your patch.
If it's so, then the HT patch is not to blame... But we'll see after
your tests.
I intend to run following tests with the latest coreboot master (I'll
note the commit hash and use the same commit for
Hi, Lars.
Update: I flashed the original Lenovo BIOS v2.81 (with keyboard EC
mod) and the issues seem to be gone.
Do you have any freezes/crashes while running latest coreboot (from
master) without the HT patch?
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I however also noticed severe freezes / crashes (OS Debian 10.2) but
I'm unsure if they are related to the patch or something different.
Have you got any logs? Do these crashes/freezes look like
https://ticket.coreboot.org/issues/121?
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it as CMOS option.
Thank you
Jose.
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‐‐‐ Original Message ‐‐‐
On Tuesday, December 17, 2019 5:12 PM, Evgeny Zinoviev via coreboot
wrote:
Hi.
As for HT, there's this patch:
https://review.coreboot.org/c/coreboot/+/29669 but it needs polishing
and testing. L
Hi.
As for HT, there's this patch:
https://review.coreboot.org/c/coreboot/+/29669 but it needs polishing
and testing. Last time I touched it, it worked good (or so it seemed to
me) on X220. If you have an interest and wish help to test, we could
finish it.
(We also need to decide, whether
On 13.10.2019 10:27, Mike Banon wrote:
With a couple of FT232H from china/aliexpress and two USB extension cables
for them
Actually, even just one FT232H plus one USB-UART (pl2303, for example)
will work.
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There is unfinished hyperthreading patch for Sandy/Ivy:
https://review.coreboot.org/c/coreboot/+/29669
On 7/2/19 9:33 AM, ashmita.chakrabo...@ltts.com wrote:
> Does the coreboot support the following options to enable/disable:
>
>
> HyperThreading- Disabled
> Execute Disable Bit -
Your plan worked, I've just uploaded board status for 4 more boards.
On 6/2/19 9:26 PM, Mike Banon wrote:
> I've just added a "Recently tested mainboards:" section to the end of
> https://piratenpad.de/p/coreboot4.10-release-checklist . I think its'
> existence could encourage the people to
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