Issue #387 has been updated by Raul Rangel.
Just FYI, the board schematics are here:
https://github.com/FrameworkComputer/Mainboard/blob/main/Electrical/Mainboard_Interfaces_Schematic.pdf
Support #387: Support Framework Laptop
https
Hey all,
If you use Sublime Text, I wanted to point out the [Coreboot
Syntax](https://packagecontrol.io/packages/Coreboot%20syntax) package.
It includes Device Tree support and I recently added ASL support. Let
me know if you encounter any strange highlighting issues.
Raul
should be a given
> anyway, and in romstage it can probably still be easily done on most
> (particularly recent) platforms. For an optional performance
> enhancement feature, I think that trade-off makes sense.
>
> On Wed, Jul 7, 2021 at 1:18 PM Raul Rangel wrote:
> >
> &g
On Wed, Jul 7, 2021 at 12:49 PM Peter Stuge wrote:
>
> Raul Rangel wrote:
> > I'm currently working on improving the boot time for the AMD Cezanne
> > platform.
> ..
> > Another difference between the latest AMD SoCs (Picasso, Cezanne), is
> > that RAM is
Hello coreboot community,
One of coreboot's goals (according to the home page) is to be
lightning fast! I'm currently working on improving the boot time for
the AMD Cezanne platform. One place where we spend a decent amount of
time is reading from SPI flash. We have the SPI speed/modes set to the
You might also want to try https://github.com/al3xtjames/ghidra-firmware-utils
From what I remember it allows browsing the .bin.
On Sat, Jun 5, 2021 at 5:12 PM Paul Menzel wrote:
>
> Dear se7enge,
>
>
> Am 05.06.21 um 19:52 schrieb se7enge via coreboot:
>
> > I am about to embark on a mission to
> Do you have the failed DSDT table dumped? Even there's recent change around
> NVSA, but looks that's different.
Here is the DSDT before any of my changes: https://0paste.com/158902
> Do you see any ways to preempt this entire class of errors (Windows
> unhappy with ACPI tables) within coreboot
Over the weekend I had the realization that SMI logging was enabled
and interfering with WinDbg. Once I flashed a non-serial firmware
WinDbg became a lot more stable and I was able to reliably attach to
the boot loader debugger i.e., `/bootdebug {default}`. The OS debugger
(`/debug {default} on`) w
ure out how to decode them.
On Wed, Jan 13, 2021 at 7:37 PM Lance Zhao wrote:
> Highly possible you don't need to connect live sessions using windbg, you
> can analysis the generated dump file to simply open with windbg.
>
>
> Raul Rangel 于2021年1月14日周四 上午6:21写道：
>
>>
I'm trying to boot the Windows 10 Installer on a picasso based device using
coreboot + tianocore. I keep getting a BSOD after the windows logo shows
with the very descriptive stop code `ACPI BIOS ERROR`.
I've enabled bootdebug on the USB stick using the following:
bcdedit /store H:\boot\bcd /
Which board are you testing with? Picasso support is still undergoing
heavy development and we are working on getting parity with the
chromiumos fork:
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/master:src/third_party/coreboot-zork/
On Sun, May 3, 2020 at 9:28 AM Zheng Bao wrot
Yeah, we can place the stack at the bottom of a page so if it overflows we
get a page fault. I'm assuming that will work in SMM?
On Tue, Oct 1, 2019 at 10:27 AM Aaron Durbin wrote:
>
>
> On Tue, Oct 1, 2019 at 9:42 AM Raul Rangel wrote:
>
>> That's exciting. Tha
That's exciting. That means we can finally catch stack overflows in SMM.
On Sun, Sep 29, 2019 at 5:42 AM Patrick Rudolph wrote:
> Dear coreboot community,
> Please test and review the patch series [1].
>
> It adds support for x86 long mode on qemu and allows to build test
> most of coreboot's co
You can grep for commits containing b:65442212 or b:111610455 to see the
work required to remove AGESA from bootblock.
On Wed, Aug 21, 2019 at 10:22 AM Kyösti Mälkki
wrote:
> On Wed, Aug 21, 2019 at 6:53 PM Michal Zygowski
> wrote:
> >> I get the overall idea of C bootblock. The most fun is abo
If you have the source code to build a binaryPI, I think you can `cd
binarypi/stoney-pi/AmdAgesaPkg && make Agesa_B2_Target`. I've never
tried it though.
On Wed, Jul 3, 2019 at 4:58 AM Jorge Fernandez Monteagudo
wrote:
>
> Hi again,
>
> A clarification. From the StoneyPI_1_3_0_A.ZIP file I've go
Just out of curiosity, I checked the Google C++ style guide, but it
doesn't really help:
> In general, curly braces are not required for single-line statements, but
> they are allowed if you like them;
When I first started doing firmware, I was kind of annoyed having to
go back and remove the bra
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