Peter Stuge wrote:
> Tobias Diedrich wrote:
> > >> +/*
> > >> + * Northbridge pcie bridge 3.3 is not connected to anything,
> > >> hide it.
> > >> + */
> > >> +tmp = pci_cf8_conf1.read8(NULL, 0, PCI_DEVFN(0x0, 5), 0xf0);
> > >> +tmp&= ~0x10; /* hide pcie bri
Tobias Diedrich wrote:
> >> + /*
> >> + * Northbridge pcie bridge 3.3 is not connected to anything, hide it.
> >> + */
> >> + tmp = pci_cf8_conf1.read8(NULL, 0, PCI_DEVFN(0x0, 5), 0xf0);
> >> + tmp&= ~0x10; /* hide pcie bridge 0:3.3 */
> >> + tmp&= ~0x40; /* hide scratch register function 0
Rudolf Marek wrote:
> On 29.10.2010 14:14, Tobias Diedrich wrote:
>> This adds the m2v directory to src/mainboards/asus and adjusts the Kconfig.
>> Note:
>>
>> I added pci irq routing setup based on pirq tables:
>> pci_fixup_irqs() in irq_tables.c
>>
>> I didn't see any existing functionality that
Hi,
On 29.10.2010 14:14, Tobias Diedrich wrote:
This adds the m2v directory to src/mainboards/asus and adjusts the Kconfig.
Note:
I added pci irq routing setup based on pirq tables:
pci_fixup_irqs() in irq_tables.c
I didn't see any existing functionality that will just take the pirq
informati
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