2011/10/19 Stefan Reinauer stefan.reina...@coreboot.org
By the way all I get is \0x00 when I open the board and another \0x00
when I
close it..
Do you have your CMC binary at the location it's strapped to by
hardware?
Hi, thanks a lot..
So yes I removed the uart_init() call from
2011/10/19 Alp Eren Köse alperenk...@buyutech.com.tr
Ok now so i need the CMC binary, but I have no idea what is a CMC binary,
how can i get it? I googled it, but didn't help me much..
Will I need to extract it from the proprietary bios somehow??
Well that's the Chipset MicroCode right, so
Hi thanks all for your help,
I have arranged the devicetree.cb as suggested, you can see it at the
attachment.
Put the superio chip under the LPC bridge section, but I didn't get how did
you know it?
Added those to the romstage.c:
#include superio/winbond/w83627hf/early_serial.c
#define
Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x41) at 0x2e
Register dump:
idx 02 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f
val ff 52 41 ff fe c0 00 00 00 00 fe c0 ff 00 ff
def 00 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00
CR24 (idx 24, in the above output) means control register 24, here
2011/10/18 Alp Eren Köse alperenk...@buyutech.com.tr
Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x41) at 0x2e
Register dump:
idx 02 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f
val ff 52 41 ff fe c0 00 00 00 00 fe c0 ff 00 ff
def 00 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00
CR24
By the way I do not have a CMC state machine binary, which it says:
#We don't ship that, but booting without it is bound to fail
in the src/southbridge/intel/sch/Makefile.inc file. What is it, how can get
it?
Is it likely for that to cause this serial output problem??
Thanks in advance.
* Alp Eren Köse alperenk...@buyutech.com.tr [111018 11:25]:
Hi thanks all for your help,
I have arranged the devicetree.cb as suggested, you can see it at the
attachment.
Put the superio chip under the LPC bridge section, but I didn't get how did
you
know it?
Added those to the
* Alp Eren Köse alperenk...@buyutech.com.tr [111018 17:02]:
By the way I do not have a CMC state machine binary, which it says:
#We don't ship that, but booting without it is bound to fail
in the src/southbridge/intel/sch/Makefile.inc file. What is it, how can get
it?
Is it likely for that
Hi all,
I can't get serial output from the board I am trying to put coreboot on, so
I am not able to go any further to see whats going on..
The board has a Winbond W83627HF/F/HG/G (id=0x52, rev=0x41) at 0x2e.
I couldn't figure out where to put the chip superio/winbond/w83627hf
section in the
the superio part should placed under the LCP bridge.
for your mainboard,
it should under
device pci 1f.0 on end # LPC bridge
add the superio things like:
device pci 1f.0 on end # LPC bridge
chip superio/winbond/w83627hf
device pnp 2e.0 on #
Comments inline:
2011/10/17 Idwer Vollering vid...@gmail.com
2011/10/17 Alp Eren Köse alperenk...@buyutech.com.tr
Hi all,
I can't get serial output from the board I am trying to put coreboot on,
so I am not able to go any further to see whats going on..
The board has a Winbond
QingPei Wang wrote:
the superio part should placed under the LCP bridge.
for your mainboard,
it should under
device pci 1f.0 on end # LPC bridge
The end on this line goes after the newly introduced chip block.
add the superio things like:
device pci 1f.0 on
2011/10/17 Alp Eren Köse alperenk...@buyutech.com.tr
Hi all,
I can't get serial output from the board I am trying to put coreboot on, so
I am not able to go any further to see whats going on..
The board has a Winbond W83627HF/F/HG/G (id=0x52, rev=0x41) at 0x2e.
It is likely that you need
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