We try to refine default RSS for IP fragment packets. However,
the change will lead to more serious errors. The scenario that
there is overlap/conflict between the new characteristics and the
existing ones has not been supported, so non-fragment packets
and fragment packets cannot share the same ha
On Tue, Sep 7, 2021 at 9:05 AM Wenjun Wu wrote:
>
> We try to refine default RSS for IP fragment packets. However,
> the change will lead to more serious errors. The scenario that
> there is overlap/conflict between the new characteristics and the
> existing ones has not been supported, so non-fra
Default RSS for outer src/dst IP address field in iavf is not supported before,
so it does not cause any error.
However, if it can be dropped, I suggest to do so. It seems to be safer to add
IPID field here.
> -Original Message-
> From: David Marchand
> Sent: Tuesday, September 7, 2021
DPDK sched library is equipped with mechanism that secures it from the
bufferbloat problem
which is a situation when excess buffers in the network cause high latency and
latency
variation. Currently, it supports RED for active queue management (which is
designed
to control the queue length but i
Implement PIE based congestion management based on rfc8033
Signed-off-by: Liguzinski, WojciechX
---
drivers/net/softnic/rte_eth_softnic_tm.c | 6 +-
lib/sched/meson.build| 10 +-
lib/sched/rte_pie.c | 82 +
lib/sched/rte_pie.h
patch add support enable PIE or RED by
parsing config file.
Signed-off-by: Liguzinski, WojciechX
---
config/rte_config.h | 1 -
examples/qos_sched/app_thread.c | 1 -
examples/qos_sched/cfg_file.c | 82 ++---
examples/qos_sched/init.c | 7 +-
examples/qos_sched
Adding the PIE support for IP Pipeline
Signed-off-by: Liguzinski, WojciechX
---
examples/ip_pipeline/tmgr.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/examples/ip_pipeline/tmgr.c b/examples/ip_pipeline/tmgr.c
index e4e364cbc0..73da2da870 100644
--- a/examples/ip_pi
Added PIE related information to documentation.
Signed-off-by: Liguzinski, WojciechX
---
doc/guides/prog_guide/glossary.rst | 3 +
doc/guides/prog_guide/qos_framework.rst | 60 +---
doc/guides/prog_guide/traffic_management.rst | 13 -
3 files changed, 66 inser
Tests for PIE code added to test application.
Signed-off-by: Liguzinski, WojciechX
---
app/test/autotest_data.py | 18 +
app/test/meson.build |4 +
app/test/test_pie.c | 1076 +
lib/sched/rte_pie.c |6 +-
lib/sched/rte_pie.h |
v3: adjust the commit title.
v2: update the commit message.
Alvin Zhang (1):
common/iavf: enable hash calculation based on L4 checksum
Haiyue Wang (2):
common/iavf: remove the FDIR query opcode
common/iavf: update the driver version
Junfeng Guo (1):
common/iavf: add QFI fields for GTPU U
From: Junfeng Guo
The QFI is 6-bit "QoS Flow Identifier" within the GTPU Extension Header.
Add virtchnl fields QFI of GTPU UL/DL for supporting the AVF FDIR.
Signed-off-by: Junfeng Guo
Signed-off-by: Haiyue Wang
---
drivers/common/iavf/virtchnl.h | 5 +
1 file changed, 5 insertions(+)
di
From: Alvin Zhang
Add TCP/UDP/SCTP header checksum field selectors, they can be used in
creating FDIR or RSS rules related to TCP/UDP/SCTP header checksum.
Signed-off-by: Alvin Zhang
Signed-off-by: Haiyue Wang
---
drivers/common/iavf/virtchnl.h | 3 +++
1 file changed, 3 insertions(+)
diff -
The VIRTCHNL_OP_QUERY_FDIR_FILTER opcode is not used, so remove it.
Signed-off-by: Haiyue Wang
Acked-by: Qi Zhang
---
drivers/common/iavf/virtchnl.h | 38 --
1 file changed, 38 deletions(-)
diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtch
Update the driver version to trace the change.
Signed-off-by: Haiyue Wang
Acked-by: Qi Zhang
---
drivers/common/iavf/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/common/iavf/README b/drivers/common/iavf/README
index 611fdcea94..89bdbc827e 100644
--- a/drive
This patch series adds support for raw vector API in dpaax_sec drivers
This also enhances the raw vector APIs to support OOP and security
protocol support.
v2: fix aesni compilation and add release notes.
Gagandeep Singh (11):
crypto: add total raw buffer length
crypto: fix raw process for mu
This patch renames the sgl to src_sgl to help differentiating
between source and destination sgl.
Signed-off-by: Hemant Agrawal
Acked-by: Akhil Goyal
---
app/test/test_cryptodev.c | 6 ++---
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 12 +-
drivers/crypto/aesni_mb/rt
From: Gagandeep Singh
The current crypto raw data vectors is extended to support
rte_security usecases, where we need total data length to know
how much additional memory space is available in buffer other
than data length so that driver/HW can write expanded size
data after encryption.
Signed-o
The structure rte_crypto_sym_vec is updated to
add dest_sgl to support out of place processing.
Signed-off-by: Hemant Agrawal
Acked-by: Akhil Goyal
---
lib/cryptodev/rte_crypto_sym.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_
From: Gagandeep Singh
If no next segment available the “for” loop will fail and it still
returns i+1 i.e. 2, which is wrong as it has filled only 1 buffer.
Fixes: 7adf992fb9bf ("cryptodev: introduce CPU crypto API")
Cc: marcinx.smoczyn...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Gagandeep S
From: Gagandeep Singh
This path add framework for raw API support.
The initial patch only test cipher only part.
Signed-off-by: Hemant Agrawal
Signed-off-by: Gagandeep Singh
---
doc/guides/rel_notes/release_21_11.rst | 4 +
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 13 +-
drivers/
From: Gagandeep Singh
Auth only with raw buffer APIs has been supported in this patch.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 21
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 114 ++--
2 files changed, 108 insertions(+), 27 delet
From: Gagandeep Singh
This patch supports AUTHENC with raw buufer APIs
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 128 ++--
1 file changed, 121 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drive
From: Gagandeep Singh
add raw vector API support for AEAD algos.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 249 +---
1 file changed, 214 insertions(+), 35 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drivers/cr
From: Gagandeep Singh
add support for out of order processing with raw vector APIs.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 1 +
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 156 +++-
2 files changed, 116 insertions(+), 41 deletions(-
This patch add support for raw API tests for
dpaa_sec and dpaa2_sec platforms.
Signed-off-by: Gagandeep Singh
Signed-off-by: Hemant Agrawal
---
app/test/test_cryptodev.c | 116 +++---
1 file changed, 109 insertions(+), 7 deletions(-)
diff --git a/app/test/test_c
This patch add support for RAW API testing with ZUC
and SNOW test cases.
Signed-off-by: Gagandeep Singh
Signed-off-by: Hemant Agrawal
---
app/test/test_cryptodev.c | 57 ++-
1 file changed, 51 insertions(+), 6 deletions(-)
diff --git a/app/test/test_cryptode
From: Gagandeep Singh
This add support for AEAD and proto offload with raw APIs
for dpaa_sec driver.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c | 293 ++
1 file changed, 293 insertions(+)
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec_raw_d
From: Gagandeep Singh
This patch improves the raw vector support in dpaa_sec driver
for authonly and chain usecase.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa_sec/dpaa_sec.h| 3 +-
drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c | 296 +-
2 files changed, 28
> -Original Message-
> From: Zhang, AlvinX
> Sent: Tuesday, September 7, 2021 10:25
> To: Li, Xiaoyun ; Ananyev, Konstantin
>
> Cc: dev@dpdk.org; sta...@dpdk.org
> Subject: RE: [PATCH] app/testpmd: fix random number of Tx segments
>
> > -Original Message-
> > From: Li, Xiaoyun
From: Gagandeep Singh
This patch improves error conditions and support of
Wireless algos with raw buffers.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 31 -
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/dp
From: Gagandeep Singh
This patch add raw vector API framework for dpaa_sec driver.
Signed-off-by: Gagandeep Singh
---
doc/guides/rel_notes/release_21_11.rst| 4 +
drivers/crypto/dpaa_sec/dpaa_sec.c| 23 +-
drivers/crypto/dpaa_sec/dpaa_sec.h| 39 +-
drivers/crypto/dpaa_s
in
On Tue, Sep 7, 2021 at 12:15 PM Ganapati Kundapura
wrote:
>
> Added rte_event_eth_rx_adapter_queue_info_get() API to get rx queue
> information - event queue identifier, flags for handling received packets,
> schedular type, event priority, polling frequency of the receive queue
> and flow id
On Tue, Aug 10, 2021 at 12:52 PM Hanumanth Reddy Pothula
wrote:
>
> Update MTU value based on PTP enable status and reserve eight
> bytes in TX path to accommodate VLAN tags.
>
> If PTP is enabled maximum allowed MTU is 9200 otherwise it's 9208.
>
> Signed-off-by: Hanumanth Reddy Pothula
Update
On Fri, Aug 20, 2021 at 1:04 PM Naga Harish K, S V
wrote:
>
>
>
> -Original Message-
> From: Jayatheerthan, Jay
> Sent: Wednesday, August 18, 2021 1:53 PM
> To: pbhagavat...@marvell.com; jer...@marvell.com; Ray Kinsella
> ; Shijith Thotton ; Naga Harish K, S V
>
> Cc: dev@dpdk.org
> Su
On Tue, Aug 31, 2021 at 1:27 PM Shijith Thotton wrote:
>
> In crypto adapter metadata, reserved bytes in request info structure is
> a space holder for response info. It enforces an order of operation if
> the structures are updated using memcpy to avoid overwriting response
> info. It is logical
> On Tue, Aug 31, 2021 at 1:27 PM Shijith Thotton
> wrote:
> >
> > In crypto adapter metadata, reserved bytes in request info structure is
> > a space holder for response info. It enforces an order of operation if
> > the structures are updated using memcpy to avoid overwriting response
> > info.
From: Gagandeep Singh
add DES-CBC support and enable available cipher-only
test cases.
Signed-off-by: Gagandeep Singh
---
doc/guides/cryptodevs/features/dpaa_sec.ini | 1 +
drivers/crypto/dpaa_sec/dpaa_sec.c | 13 +
drivers/crypto/dpaa_sec/dpaa_sec.h | 20 +++
From: Gagandeep Singh
This patch add support for non-HMAC, md5, shax algos.
Signed-off-by: Gagandeep Singh
---
doc/guides/cryptodevs/features/dpaa_sec.ini | 8 +-
drivers/crypto/dpaa_sec/dpaa_sec.c | 55 +++--
drivers/crypto/dpaa_sec/dpaa_sec.h | 126 ++
From: Gagandeep Singh
This patch adds support for AES-XCBC-MAC algo.
Signed-off-by: Gagandeep Singh
---
doc/guides/cryptodevs/features/dpaa_sec.ini | 1 +
drivers/crypto/dpaa_sec/dpaa_sec.c | 21 -
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/doc
From: Gagandeep Singh
This patch adds support for AES_CMAC integrity in non-security mode.
Signed-off-by: Gagandeep Singh
---
doc/guides/cryptodevs/features/dpaa_sec.ini | 1 +
drivers/crypto/dpaa_sec/dpaa_sec.c | 10 +
drivers/crypto/dpaa_sec/dpaa_sec.h | 43 +++
From: Franck LENORMAND
The offset of the HFn word and Bearer/Dir word is different
depending on type of PDB.
The wrong value was used.
This patch address this issue
Signed-off-by: Franck LENORMAND
---
drivers/common/dpaax/caamflib/desc/pdcp.h | 7 +-
drivers/common/dpaax/caamflib/desc/sdap.
From: Franck LENORMAND
For SDAP, we are not using the protocol operation to perform
4G/LTE operation so the DPOVRD option is not used.
Removing it save some space in the descriptor buffer and
execution time.
Signed-off-by: Franck LENORMAND
---
drivers/common/dpaax/caamflib/desc/pdcp.h | 14 ++
From: Franck LENORMAND
The space in descriptor buffer is scarce as it is limited to
64 words for platforms except ERA10 (which has 128).
As the descriptors are processed with QI, it adds some words
to the descriptor which is passed.
Some descriptors used for SDAP were using too much words reach
From: Gagandeep Singh
The logic was incorecly doing conditional swap. It need to
be bit swap always.
Fixes: 73a24060cd70 ("crypto/dpaa2_sec: add sample PDCP descriptor APIs")
Cc: sta...@dpdk.org
Signed-off-by: Gagandeep Singh
---
drivers/common/dpaax/caamflib/desc/pdcp.h | 7 ---
1 file c
From: Gagandeep Singh
This patch improve storage and performance by force inline
of the keys.
Signed-off-by: Franck LENORMAND
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa_sec/dpaa_sec.c | 35 ++
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git
This patch add support to also counter err pkt counter per queue.
This also enhances few related debug prints.
Signed-off-by: Hemant Agrawal
---
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_se
On 8/23/2021 11:02 AM, Akhil Goyal wrote:
> Reassembly is a costly operation if it is done in
> software, however, if it is offloaded to HW, it can
> considerably save application cycles.
> The operation becomes even more costlier if IP fragmants
> are encrypted.
>
> To resolve above two issues, a
Added rte_event_eth_rx_adapter_queue_info_get() API to get rx queue
information - event queue identifier, flags for handling received packets,
schedular type, event priority, polling frequency of the receive queue
and flow identifier in rte_event_eth_rx_adapter_queue_info structure
Signed-off-by:
Add unit tests for rte_event_eth_rx_adapter_queue_info_get()
in rx adapter autotest
Signed-off-by: Ganapati Kundapura
---
app/test/test_event_eth_rx_adapter.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/app/test/test_event_eth_rx_adapter.c
b/app/test/test_event_e
> -Original Message-
> From: Jerin Jacob
> Sent: 07 September 2021 13:42
> To: Kundapura, Ganapati
> Cc: Jayatheerthan, Jay ; dpdk-dev
> ; Pavan Nikhilesh
> Subject: Re: [PATCH v3 1/3] eventdev: add rx queue info get api
>
> in
>
> On Tue, Sep 7, 2021 at 12:15 PM Ganapati Kundapura
07/09/2021 05:41, Huisong Li:
> Calling rte_eth_dev_close() will release resources of eth device and close
> it. But rte_pci_device struct isn't released when app exit, which will lead
> to memory leak.
That's a PMD issue.
When the last port of a PCI device is closed, the device should be freed.
This series add support of Message Authentication Code
- Integrity on DPAAX platforms.
v2-change-log:
* update commit message
* merged an existing patch with this series:
https://patches.dpdk.org/project/dpdk/patch/20210825081837.23830-1-hemant.agra...@nxp.com/mbox/
Gagandeep Singh (4):
common/
The logic was incorecly doing conditional swap. It need to
be bit swap always.
Fixes: 73a24060cd70 ("crypto/dpaa2_sec: add sample PDCP descriptor APIs")
Cc: sta...@dpdk.org
Signed-off-by: Gagandeep Singh
---
drivers/common/dpaax/caamflib/desc/pdcp.h | 7 ---
1 file changed, 4 insertions(+),
From: Hemant Agrawal
This patch add support to handle PDCP short MAC-I domain
along with standard control and data domains as it has to
be treated as special case with PDCP protocol offload support.
ShortMAC-I is the 16 least significant bits of calculated MAC-I. Usually
when a RRC message is ex
This patch add support to test the pdcp short mac
packets support in crypto.
Signed-off-by: Gagandeep Singh
---
app/test/test_cryptodev.c | 48
...est_cryptodev_security_pdcp_test_vectors.h | 105 +-
2 files changed, 152 insertions(+), 1 deletion(-)
This patch add PDCP short mac support in dpaa2_sec driver.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 4
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 9 +
2 files changed, 13 insertions(+)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci
This patch add pdcp security short MAC-I support for
dpaa_sec driver.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa_sec/dpaa_sec.c | 3 +++
drivers/crypto/dpaa_sec/dpaa_sec.h | 11 ++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/dpaa_sec/dpaa_s
Hi Shijith,
> -Original Message-
> From: Shijith Thotton
> Sent: Tuesday, August 31, 2021 1:27 PM
> To: dev@dpdk.org
> Cc: Shijith Thotton ; jer...@marvell.com;
> ano...@marvell.com; pbhagavat...@marvell.com; gak...@marvell.com;
> Gujjar, Abhinandan S ; Ray Kinsella
> ; Ankur Dwivedi
> S
Added rte_event_eth_rx_adapter_queue_info_get() API to get rx queue
information - event queue identifier, flags for handling received packets,
schedular type, event priority, polling frequency of the receive queue
and flow identifier in rte_event_eth_rx_adapter_queue_info structure
Signed-off-by:
Add unit tests for rte_event_eth_rx_adapter_queue_info_get()
in rx adapter autotest
Signed-off-by: Ganapati Kundapura
---
app/test/test_event_eth_rx_adapter.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/app/test/test_event_eth_rx_adapter.c
b/app/test/test_event_e
Add support for 192 bit keys for AES CCM algorithm.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
---
drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 6 ++
drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c | 2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drive
Add support for NULL/NULL xform.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
---
drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c| 3 ++
.../crypto/aesni_mb/rte_aesni_mb_pmd_ops.c| 38 +++
2 files changed, 41 insertions(+)
diff --git a/drivers/crypto/aesni_mb/r
Add support for AES CCM.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
---
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 8 +++---
drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 30
2 files changed, 34 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto
On Tue, Sep 7, 2021 at 2:20 PM Kundapura, Ganapati
wrote:
>
>
>
> > -Original Message-
> > From: Jerin Jacob
> > Sent: 07 September 2021 13:42
> > To: Kundapura, Ganapati
> > Cc: Jayatheerthan, Jay ; dpdk-dev
> > ; Pavan Nikhilesh
> > Subject: Re: [PATCH v3 1/3] eventdev: add rx queue i
On 9/6/2021 5:25 PM, Power, Ciara wrote:
Hi Radu,
-Original Message-
From: Nicolau, Radu
Sent: Friday 3 September 2021 11:57
To: Power, Ciara
Cc: dev@dpdk.org; Nicolau, Radu ; Doherty, Declan
Subject: [PATCH] telemetry: add support for dicts of dicts
Add support for dicts of dict
On 03/09/2021 12:17, Conor Walsh wrote:
Add the basic device probe/remove skeleton code and initial documentation
for new IOAT DMA driver. Maintainers update is also included in this
patch.
Signed-off-by: Conor Walsh
---
MAINTAINERS| 6 +++
doc/guides/dmadevs/ind
On 03/09/2021 12:17, Conor Walsh wrote:
Move Intel IOAT devices on Ice Lake systems from Misc to DMA devices.
Signed-off-by: Conor Walsh
---
usertools/dpdk-devbind.py | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
Reviewed-by: Kevin Laatz
On 03/09/2021 12:17, Conor Walsh wrote:
When a suitable device is found during the PCI probe, create a dmadev
instance for each channel. Internal structures and HW definitions required
for device creation are also included.
Signed-off-by: Conor Walsh
---
drivers/dma/ioat/ioat_dmadev.c | 108
On 03/09/2021 12:17, Conor Walsh wrote:
Add data structures required for the data path of IOAT devices.
Signed-off-by: Conor Walsh
Signed-off-by: Bruce Richardson
---
drivers/dma/ioat/ioat_dmadev.c | 61 -
drivers/dma/ioat/ioat_hw_defs.h | 214
2
On 03/09/2021 12:17, Conor Walsh wrote:
Add functions for device configuration. The info_get and close functions
are included here also. info_get can be useful for checking successful
configuration and close is used by the dmadev api when releasing a
configured device.
Signed-off-by: Conor Walsh
On 03/09/2021 12:17, Conor Walsh wrote:
Add start, stop and recover functions for IOAT devices.
Signed-off-by: Conor Walsh
Signed-off-by: Bruce Richardson
---
doc/guides/dmadevs/ioat.rst| 3 ++
drivers/dma/ioat/ioat_dmadev.c | 87 ++
2 files changed, 90 i
On 03/09/2021 12:17, Conor Walsh wrote:
Add data path functions for enqueuing and submitting operations to
IOAT devices.
Signed-off-by: Conor Walsh
---
doc/guides/dmadevs/ioat.rst| 54
drivers/dma/ioat/ioat_dmadev.c | 92 ++
2 files c
On 03/09/2021 12:17, Conor Walsh wrote:
Add support for the rte_dmadev_vchan_idle API call.
Signed-off-by: Conor Walsh
---
drivers/dma/ioat/ioat_dmadev.c | 14 ++
1 file changed, 14 insertions(+)
Reviewed-by: Kevin Laatz
On 03/09/2021 12:17, Conor Walsh wrote:
Add statistic tracking for operations in IOAT.
Signed-off-by: Conor Walsh
---
doc/guides/dmadevs/ioat.rst| 23 +++
drivers/dma/ioat/ioat_dmadev.c | 40 ++
2 files changed, 63 insertions(+)
Reviewed
On 8/23/2021 11:55 AM, Raslan Darawsheh wrote:
> Define new rte header for gtp PDU session container
> based on RFC 38415-g30
>
> Signed-off-by: Raslan Darawsheh
Acked-by: Ferruh Yigit
Patch title can be updated to have abbreviations uppercase, but it can be done
while merging I guess.
@Oliv
On 8/23/2021 11:55 AM, Raslan Darawsheh wrote:
> This updates the gtp_psc item to use the net hdr
> definition of the gtp_psc to be based on RFC 38415-g30
>
> Signed-off-by: Raslan Darawsheh
Acked-by: Ferruh Yigit
> > +/* Stop a configured device. */
> > +static int
> > +ioat_dev_stop(struct rte_dmadev *dev)
> > +{
> > + struct ioat_dmadev *ioat = dev->dev_private;
> > +
> > + ioat->regs->chancmd = IOAT_CHANCMD_SUSPEND;
> > + /* Allow the device time to suspend itself. */
> > + rte_delay_ms(1);
> >
Hi Abhinandan,
>> In crypto adapter metadata, reserved bytes in request info structure is a
>> space holder for response info. It enforces an order of operation if the
>> structures are updated using memcpy to avoid overwriting response info. It
>> is logical to move the reserved space out of requ
Preparation of the headers for the hardware offload
misses the outer IPv4 checksum offload.
It results in bad checksum computed by hardware NIC.
This patch fixes the issue by setting the outer IPv4
checksum field to 0.
Fixes: 4fb7e803eb1a ("ethdev: add Tx preparation")
Cc: sta...@dpdk.org
Signed
> Do you think all the asym APIs are not eligible for promoting it to stable
> APIs?
> I haven't seen any changes for quite some time and we cannot have it
> experimental Forever.
> The APIs which you think are expected to change, we can leave them as
> experimental And mark the others as stable.
> > Do you think all the asym APIs are not eligible for promoting it to stable
> APIs?
> > I haven't seen any changes for quite some time and we cannot have it
> > experimental Forever.
> > The APIs which you think are expected to change, we can leave them as
> > experimental And mark the others as
Enable AES-XTS legacy mode in gen4 devices of Intel QuickAssist
Technology PMD.
Signed-off-by: Arek Kusztal
---
drivers/crypto/qat/qat_sym_capabilities.h | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/crypto/qat/qat_sym_capabilities.h
b/drivers/crypto/qat/qat_
> --
> This series add support of Message Authentication Code
> - Integrity on DPAAX platforms.
>
> v2-change-log:
> * update commit message
> * merged an existing patch with this series:
> https://urldefense.proofpoint.com/v2/url
> From: Gagandeep Singh
>
> add DES-CBC support and enable available cipher-only
> test cases.
>
> Signed-off-by: Gagandeep Singh
> ---
Release notes missing for the new features added in PMDs.
Please update sequentially in each of the patches.
> Enable AES-XTS legacy mode in gen4 devices of Intel QuickAssist
> Technology PMD.
>
> Signed-off-by: Arek Kusztal
> ---
>
Does it need update to .ini file for the algos supported?
Release notes update?
> -Original Message-
> From: Akhil Goyal
> Sent: Tuesday, September 7, 2021 1:48 PM
> To: Kusztal, ArkadiuszX ; dev@dpdk.org
> Cc: Zhang, Roy Fan
> Subject: RE: [EXT] [PATCH] crypto/qat: enable aes xts in gen4
>
> > Enable AES-XTS legacy mode in gen4 devices of Intel QuickAssist
> > T
On 8/23/2021 8:54 PM, pbhagavat...@marvell.com wrote:
> From: Pavan Nikhilesh
>
> Due to Linux kernel dependency, only enable build for 64-bit Linux.
>
> Signed-off-by: Pavan Nikhilesh
> Acked-by: Jerin Jacob
patches looks good, but can you please add more details related to the
dependency in
Problems:
1) Existing item PORT_ID and action PORT_ID are ambiguous because
one can consider the port in question as either an ethdev or
an embedded switch entity wired to it, as per the use case,
which is not expressed clearly in code and documentation.
2) Attributes "ingress" and "egre
Hi Gagandeep,
Based on the following considerations, it was decided not to support "ANY
direction on a channel".
As we previously analyze [1], many hardware (like dpaa2/octeontx2/Kunpeng)
supports multiple directions on a hardware channel.
Based on the consideration of smooth migration of existi
> -Original Message-
> From: Wang, Haiyue
> Sent: Monday, September 6, 2021 7:15 PM
> To: Elena Agostini ; Jerin Jacob
>
> Cc: NBU-Contact-Thomas Monjalon ; Jerin Jacob
> ; dpdk-dev ; Stephen Hemminger
> ; David Marchand
> ; Andrew Rybchenko
> ; Honnappa Nagarahalli
> ; Yigit, Ferruh ;
The 'dmadevice' is a generic type of DMA device.
This patch introduce the 'dmadevice' public APIs which expose generic
operations that can enable configuration and I/O with the DMA devices.
Maintainers update is also included in this patch.
Signed-off-by: Chengwen Feng
Acked-by: Bruce Richardso
This patch introduce DMA device library implementation which includes
configuration and I/O with the DMA devices.
Signed-off-by: Chengwen Feng
Acked-by: Bruce Richardson
Acked-by: Morten Brørup
Reviewed-by: Kevin Laatz
Reviewed-by: Conor Walsh
---
config/rte_config.h | 3 +
lib/dm
This patch introduce DMA device library PMD header which was driver
facing APIs for a DMA device.
Signed-off-by: Chengwen Feng
Acked-by: Bruce Richardson
Acked-by: Morten Brørup
Reviewed-by: Kevin Laatz
Reviewed-by: Conor Walsh
---
lib/dmadev/meson.build | 1 +
lib/dmadev/rte_dmadev.h
This patch add dmadev API test which based on 'dma_skeleton' vdev. The
test cases could be executed using 'dmadev_autotest' command in test
framework.
Signed-off-by: Chengwen Feng
Signed-off-by: Bruce Richardson
Reviewed-by: Kevin Laatz
Reviewed-by: Conor Walsh
---
MAINTAINERS
This patch set contains seven patch for new add dmadev.
Chengwen Feng (7):
dmadev: introduce DMA device library public APIs
dmadev: introduce DMA device library internal header
dmadev: introduce DMA device library PMD header
dmadev: introduce DMA device library implementation
doc: add DM
Skeleton dmadevice driver, on the lines of rawdev skeleton, is for
showcasing of the dmadev library.
Design of skeleton involves a virtual device which is plugged into VDEV
bus on initialization.
Also, enable compilation of dmadev skeleton drivers.
Signed-off-by: Chengwen Feng
Reviewed-by: Kevi
This patch introduce DMA device library internal header, which contains
internal data types that are used by the DMA devices in order to expose
their ops to the class.
Signed-off-by: Chengwen Feng
Acked-by: Bruce Richardson
Acked-by: Morten Brørup
Reviewed-by: Kevin Laatz
Reviewed-by: Conor Wa
This patch adds dmadev library guide.
Signed-off-by: Chengwen Feng
Acked-by: Conor Walsh
Reviewed-by: Kevin Laatz
---
MAINTAINERS | 1 +
doc/guides/prog_guide/dmadev.rst | 125
doc/guides/prog_guide/img/dmadev.svg | 283 +++
d
Already fix in V21, thanks
On 2021/9/6 21:35, Bruce Richardson wrote:
> On Sat, Sep 04, 2021 at 06:10:22PM +0800, Chengwen Feng wrote:
>> This patch introduce DMA device library internal header, which contains
>> internal data types that are used by the DMA devices in order to expose
>> their ops
On 8/25/2021 3:06 AM, Min Hu (Connor) wrote:
> This patch adds multi-process support for testpmd.
> For example the following commands run two testpmd
> processes:
>
> * the primary process:
>
> ./dpdk-testpmd --proc-type=auto -l 0-1 -- -i \
>--rxq=4 --txq=4 --num-procs=2 --proc-id=0
>
> *
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