From: Pavan Nikhilesh
Set flow control hysteresis to ignore immediate sequence of
decrement-increment to avoid unnecessary LLC traffic.
Enable hysteresis when SQ length is more than 512 as it lower
queue lengths will require faster updates.
Signed-off-by: Pavan Nikhilesh
Signed-off-by: Satha Ra
From: Pavan Nikhilesh
Enable WQE stashing by default only when multiple event ports are
enabled.
Signed-off-by: Pavan Nikhilesh
---
drivers/event/cnxk/cn10k_eventdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/event/cnxk/cn10k_eventdev.c
b/drivers/event/cnxk/
Update the models where errata IPBUNPA-37480 is applicable.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_errata.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_errata.h b/drivers/common/cnxk/roc_errata.h
index 2d15e639b7..1333bde629
Avoid waiting indefinitely when counting batch alloc pointers by adding a
wait timeout.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_npa.h| 15 +--
drivers/mempool/cnxk/cn10k_mempool_ops.c | 3 ++-
2 files changed, 11 insertions(+), 7 deletions(-)
diff -
> From: Morten Brørup [mailto:m...@smartsharesystems.com]
> Sent: Monday, 28 November 2022 13.08
>
> > From: Luca Boccassi [mailto:luca.bocca...@gmail.com]
> > Sent: Monday, 28 November 2022 12.55
> >
> > On Mon, 28 Nov 2022 at 11:35, Morten Brørup
> > wrote:
> > >
> > > +CC Andrew Rybchenko as c
This patch series enables the creation of special types of pool in cnxk
mempool PMD called as hwpools. A hwpool will not have any buffers of its
own but instead will only have a hardware AURA associated with it. This
hwpool will be attached to another normal rte_mempool and the hwpool will
use the
Use lower bits of pool_config to pass flags specific to
cnxk mempool PMD ops.
Signed-off-by: Ashwin Sekhar T K
---
drivers/mempool/cnxk/cnxk_mempool.h | 24
drivers/mempool/cnxk/cnxk_mempool_ops.c | 17 ++---
drivers/net/cnxk/cnxk_ethdev_sec.c | 25 +
Add ROC APIs which allows to create NPA auras independently and
attach it to an existing NPA pool. Also add API to destroy
NPA auras independently.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_npa.c | 219
drivers/common/cnxk/roc_npa.h | 4 +
Current APIs to set range on auras modifies both the
aura range limits in software and pool range limits
in NPA hardware.
Newly added ROC APIs allow to set/get aura range limits
in software alone without modifying hardware.
The existing aura range set functionality has been moved
as a pool range
Add hwpool ops which can used to create a rte_mempool that attaches
to another rte_mempool. The hwpool will not have its own buffers and
will have a dummy populate callback. Only an NPA aura will be allocated
for this rte_mempool. The buffers will be allocate from the NPA pool
of the attached rte_m
Add the following cnxk mempool PMD APIs to facilitate exchanging mbufs
between pools.
* rte_pmd_cnxk_mempool_is_hwpool() - Allows user to check whether a pool
is hwpool or not.
* rte_pmd_cnxk_mempool_range_check_disable() - Disables range checking on
any rte_mempool.
* rte_pmd_cnxk_mempool
On Fri, Apr 07, 2023 at 12:21:16PM -0700, Tyler Retzlaff wrote:
> On Wed, Apr 05, 2023 at 04:44:10PM +0100, Bruce Richardson wrote:
> > On Alpine linux, the telemetry_data_autotest was failing for the
> > test where we had dictionaries embedded in other dictionaries up
> > to three levels deep. Ind
On Fri, Apr 07, 2023 at 12:50:06PM -0700, Tyler Retzlaff wrote:
> On Wed, Apr 05, 2023 at 05:03:25PM +0100, Bruce Richardson wrote:
> > In the newly separated out function, rename "tmp" to "buf" to have more
> > meaningful variable names.
> >
> > Signed-off-by: Bruce Richardson
> >
> > ---
> Ack
On Mon, Apr 10, 2023 at 01:58:48PM -0700, Tyler Retzlaff wrote:
> On Mon, Apr 10, 2023 at 09:02:00PM +0100, Konstantin Ananyev wrote:
> > 06/04/2023 01:07, Tyler Retzlaff пишет:
> > >On Wed, Apr 05, 2023 at 10:57:02AM +, Konstantin Ananyev wrote:
> > >>
> > >>>Inline assembly is not support
From: Satha Rao
New mail box to allocate/free dynamic BPIDs based on NIX type.
Added to new mail box APIs to get/set RX channel config with
new BPIDs.
Signed-off-by: Satha Rao
---
Depends-on: series-27659 ("add hwpools and support exchanging mbufs between
pools")
drivers/common/cnxk/roc_cpt
From: Shijith Thotton
When RQs of two different traffic classes are using the same mempool,
BPIDs could differ between the RQs and BPID of only one RQ can be
configured per pool. In such cases, a new BPID is configured on both RQs
and pool or pool back-pressure is disabled.
CN103xx and CN106xx B
Skip setting flow control on local meta aura if it is not yet
created. Also in flow control mode set, do get to confirm
if it is in same state to avoid a set and unnecessary mbox
failures.
Signed-off-by: Nithin Dabilpuram
---
.mailmap | 1 +
drivers/common/cnxk/roc_dev.
From: Satha Rao
Each SQB reserves last SQE to store pointer to next SQB. So
each SQB will holds either 31 or 63 based on send descriptors
selected.
This patch also consider sqb_slack to maintain threshold buffers
to sync between HW and SW. Threshold will be maximum of 30% of
queue size or sqb_sl
Dump SW SSO work count as xstat.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix_inl_dev_irq.c | 1 +
drivers/common/cnxk/roc_nix_inl_priv.h| 1 +
drivers/common/cnxk/roc_nix_stats.c | 17 +++--
drivers/common/cnxk/roc_nix_xstats.h | 4
4 files
From: Sunil Kumar Kori
Currently hard coded drop threshold(95%) is configured to aura/pool as a
threshold for drop limit.
Patch adds a input parameter to RoC API so that user passed percentage
value can be configured.
Signed-off-by: Sunil Kumar Kori
---
drivers/common/cnxk/roc_nix.h
Restrict shared BPID config only when force BP is enabled
and make aura flow control config more predictable by not disabling
it if there is a collision but ignore new config and log the same.
Also remove BPID setup from Rx adapter as it is now evaluated and
configured every time ethdev is stopped
From: Satha Rao
Update age drop statistics. Added telemetry statistics for age drops.
Signed-off-by: Satha Rao
---
drivers/common/cnxk/cnxk_telemetry_nix.c | 4
drivers/common/cnxk/hw/nix.h | 2 ++
drivers/common/cnxk/roc_features.h | 6 ++
drivers/common/cnxk/roc_ni
Fetch engine caps and use it along with model check
to determine inline outbound instruction format
with NIX Tx offset or address.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_cpt.h | 3 +
drivers/common/cnxk/roc_nix_inl.c | 101
drivers/com
From: Rakesh Kudurumalla
Adding support to configure receive error mask
for 106B0
Signed-off-by: Rakesh Kudurumalla
---
drivers/common/cnxk/roc_features.h | 6 ++
drivers/common/cnxk/roc_nix.h | 16
2 files changed, 22 insertions(+)
diff --git a/drivers/common/cnxk/
From: Gowrishankar Muthukrishnan
Fix null pointer dereferences reported by klocwork.
Fixes: 4398c4092f3d ("common/cnxk: dump inline device RQ context")
Fixes: 79dc6f324e82 ("common/cnxk: add inline function for statistics")
Signed-off-by: Gowrishankar Muthukrishnan
---
drivers/common/cnxk/roc
From: Gowrishankar Muthukrishnan
Fix parameter passed to nix_dump to what expected in format
specifier.
Fixes: d2f168dfa5de ("common/cnxk: support 10K B0 for inline IPsec")
Signed-off-by: Gowrishankar Muthukrishnan
---
drivers/common/cnxk/roc_nix_debug.c | 4 ++--
1 file changed, 2 insertions(
From: Veerasenareddy Burru
set distinct relchan in each TL4 queue connected to SDP.
currently rechan in TL4 SDP config is getting set to 0 for all
SDP-NIX queues.
Each TL4 queues for SDP need to be configured with distinct channel
for SDP to provide per channel backpressure to NIX.
Signed-off-b
From: Satha Rao
Due to errata RED_ALGO STALL with dual shaper rate will hangs on
platforms CNF95N and CNF95O. Set READ_ALGO to DISCARD with dual
shaper rate on CNF95N and CNF95O.
Signed-off-by: Satha Rao
---
drivers/common/cnxk/roc_nix_tm_utils.c | 3 ++-
1 file changed, 2 insertions(+), 1 del
Update errata info based on CN10KA B0 and CN10KB A0.
Also remove duplicate model check roc_model_is_cn103xx()
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_errata.h | 20
drivers/common/cnxk/roc_features.h | 2 +-
drivers/common/cnxk/roc_model.h| 6 ---
From: Harman Kalra
An issue is observed where if PF is with DPDK and VF as kernel
netdev does not responds to link events. It was due to recent
design change in kernel where sender checks whether previous
interrupt is received before triggering current interrupt by
waiting for mailbox data regist
From: Harman Kalra
Adding more comments to the mbox routines to understand the flow
well.
Signed-off-by: Harman Kalra
---
drivers/common/cnxk/roc_dev.c | 20 +---
drivers/common/cnxk/roc_mbox.c | 5 +
2 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers
From: Harman Kalra
Adding support for CN105xxN B0 pass
Signed-off-by: Harman Kalra
---
drivers/common/cnxk/roc_model.c | 1 +
drivers/common/cnxk/roc_model.h | 9 -
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_model.c b/drivers/common/cnxk/roc_m
From: Hanumanth Pothula
There is a possibility of accessing an invalid pass value on
rvu device look up failure, as the return value is dropped.
Hence pass through the return value of rvu device look, to make
sure valid pass value is accessed.
Signed-off-by: Hanumanth Pothula
---
drivers/comm
From: Rakesh Kudurumalla
receive errors related to MACSEC and USXGMI are masked
for cn10kb_b0 and cn10kb
Signed-off-by: Rakesh Kudurumalla
---
drivers/net/cnxk/cnxk_ethdev.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
From: Rahul Bhansali
This will add the support of 1:n pool:aura per NIX LF when
inl_cpt_channel devargs is set to inline device, otherwise
it will create 1:1 pool:aura for CN103/CN106B0 SOCs.
With 1:N, global pool will be created with Aura 0, and per NIX
individual aura will be created and mappe
On Tue, 11 Apr 2023 at 08:22, Morten Brørup wrote:
>
> > From: Morten Brørup [mailto:m...@smartsharesystems.com]
> > Sent: Monday, 28 November 2022 13.08
> >
> > > From: Luca Boccassi [mailto:luca.bocca...@gmail.com]
> > > Sent: Monday, 28 November 2022 12.55
> > >
> > > On Mon, 28 Nov 2022 at 11:
Similar to out of place(OOP) processing support that exists for
Lookaside crypto/security sessions, Inline ingress security
sessions may also need out of place processing in usecases
where original encrypted packet needs to be retained for post
processing. So for NIC's which have such a kind of HW
Add support for inline ingress session with out-of-place
support.
Signed-off-by: Nithin Dabilpuram
---
Depends-on: series-27660 ("common/cnxk: allocate dynamic BPIDs)
drivers/event/cnxk/cn10k_worker.h | 28 -
drivers/net/cnxk/cn10k_ethdev.c | 13 +-
drivers/net/cnxk/cn10k_ethdev_se
Add unittest for inline ingress out-of-place processing.
Signed-off-by: Nithin Dabilpuram
---
app/test/test_cryptodev_security_ipsec.c | 8 +++
app/test/test_cryptodev_security_ipsec.h | 1 +
app/test/test_security_inline_proto.c| 85
3 files changed, 94 insertions
On Wed, Apr 05, 2023 at 05:45:19PM -0700, Tyler Retzlaff wrote:
> Windows does not support versioned symbols. Fortunately Windows also
> doesn't have an exported stable ABI.
>
> Export rte_tel_data_add_array_int -> rte_tel_data_add_array_int_24
> and rte_tel_data_add_dict_int -> rte_tel_data_add_d
3des-cbc is not an authentication algorithm,
hence need to be removed.
Fixes: c6baca7adc94 ("doc: describe new performance test application")
Cc: sta...@dpdk.org
Signed-off-by: Akhil Goyal
---
doc/guides/tools/cryptoperf.rst | 1 -
1 file changed, 1 deletion(-)
diff --git a/doc/guides/tools/cr
> -Original Message-
> From: Akhil Goyal
> Sent: Tuesday 11 April 2023 14:05
> To: dev@dpdk.org
> Cc: ano...@marvell.com; Power, Ciara ;
> sta...@dpdk.org; Akhil Goyal
> Subject: [PATCH] doc: fix invalid auth algo in cryptoperf app
>
> 3des-cbc is not an authentication algorithm, henc
04/04/2023 13:51, Juraj Linkeš:
> On Mon, Apr 3, 2023 at 5:18 PM Thomas Monjalon wrote:
>
> > 03/04/2023 16:56, Juraj Linkeš:
> > > On Mon, Apr 3, 2023 at 2:33 PM Thomas Monjalon
> > wrote:
> > >
> > > > 03/04/2023 13:46, Juraj Linkeš:
> > > > > Replace pexpect with Fabric.
> > > >
> > > > You s
04/04/2023 18:32, Nipun Gupta:
> On 4/4/2023 8:43 PM, Burakov, Anatoly wrote:
> > The patch probably shouldn't include the mailmap changes :)
>
> Sure, will send a separate patch for it.
No please, we squash mailmap changes with 1st patch.
https://bugs.dpdk.org/show_bug.cgi?id=1212
Luca Boccassi (luca.bocca...@gmail.com) changed:
What|Removed |Added
Resolution|--- |FIXED
Statu
[AMD Official Use Only - General]
> -Original Message-
> From: Thomas Monjalon
> Sent: Tuesday, April 11, 2023 8:43 PM
> To: Burakov, Anatoly ; David Marchand
> ; Gupta, Nipun
> Cc: dev@dpdk.org; Yigit, Ferruh ; Agarwal, Nikhil
>
> Subject: Re: [PATCH v2] vfio: do not coalesce DMA map
Google cloud routes traffic using IP addesses without the support of MAC
addresses, so changing source IP address for txonly-multi-flow can have
negative performance implications for net/gve when using testpmd. This
change adds a new flag --txonly-alter-port, which allows the alteration
of source p
Google cloud routes traffic using IP addresses without the support of MAC
addresses, so changing source IP address for txonly-multi-flow can have
negative performance implications for net/gve when using testpmd. This
change adds a new flag --txonly-alter-port, which allows the alteration
of source
Google cloud routes traffic using IP addresses without the support of MAC
addresses, so changing source IP address for txonly-multi-flow can have
negative performance implications for net/gve when using testpmd. This
change adds a new flag --txonly-alter-port, which allows the alteration
of source
On Tue, Apr 11, 2023 at 11:24:07AM +0100, Bruce Richardson wrote:
> On Wed, Apr 05, 2023 at 05:45:19PM -0700, Tyler Retzlaff wrote:
> > Windows does not support versioned symbols. Fortunately Windows also
> > doesn't have an exported stable ABI.
> >
> > Export rte_tel_data_add_array_int -> rte_tel
Inline assembly is not supported for MSVC x64. Convert code to use
_xend, _xabort and _xtest intrinsics.
Signed-off-by: Tyler Retzlaff
---
config/x86/meson.build| 6 ++
lib/eal/x86/include/rte_rtm.h | 18 +-
2 files changed, 11 insertions(+), 13 deletions(-)
diff --
In accordance with draft plan
http://mails.dpdk.org/archives/web/2023-February/002023.html
introduces conditionally compiled code to enable building with MSVC that
_does not_ require C99/C11 meaning it can be integrated now.
This series covers minimal changes for item #2 in draft plan for EAL
depe
Inline assembly is not supported for MSVC x64. Convert code to use
__rdtsc intrinsic.
Signed-off-by: Tyler Retzlaff
---
lib/eal/x86/include/rte_cycles.h | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/lib/eal/x86/include/rte_cycles.h b/lib/eal/x86/include/rte_c
Inline assembly is not supported for MSVC x64 instead expand
rte_compiler_barrier as _ReadWriteBarrier and for rte_smp_mb
_m_mfence intrinsics.
Signed-off-by: Tyler Retzlaff
---
lib/eal/include/generic/rte_atomic.h | 4
lib/eal/x86/include/rte_atomic.h | 5 -
2 files changed, 8 inse
Inline assembly is not supported for MSVC x64 instead use __cpuid
and __cpuidex intrinsics.
Signed-off-by: Tyler Retzlaff
---
lib/eal/x86/rte_cpuflags.c | 4
lib/eal/x86/rte_cpuid.h | 7 +++
lib/eal/x86/rte_cycles.c | 36
lib/eal/x86/rte
Inline assembly is not supported for MSVC x64 instead use _umonitor,
_umwait and _tpause intrinsics.
Signed-off-by: Tyler Retzlaff
---
lib/eal/x86/rte_power_intrinsics.c | 12
1 file changed, 12 insertions(+)
diff --git a/lib/eal/x86/rte_power_intrinsics.c
b/lib/eal/x86/rte_power_
Inline assembly is not supported for MSVC x64 instead use _mm_prefetch
and _mm_cldemote intrinsics.
Signed-off-by: Tyler Retzlaff
---
lib/eal/x86/include/rte_prefetch.h | 29 +
1 file changed, 29 insertions(+)
diff --git a/lib/eal/x86/include/rte_prefetch.h
b/lib/ea
When compiling with MSVC don't expose typedefs used as alignment
markers.
Signed-off-by: Tyler Retzlaff
---
lib/eal/include/rte_common.h | 4
1 file changed, 4 insertions(+)
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index 15765b4..2f464e3 100644
--- a/lib/eal
Inline assembly is not supported for MSVC x64 instead expand
use _byteswap_u{short,long} intrinsics instead.
Signed-off-by: Tyler Retzlaff
---
lib/eal/x86/include/rte_byteorder.h | 27 +++
1 file changed, 27 insertions(+)
diff --git a/lib/eal/x86/include/rte_byteorder.h
When compiling with MSVC don't expose typedefs based on GCC vector
extensions.
Signed-off-by: Tyler Retzlaff
---
lib/eal/include/generic/rte_vect.h | 4
1 file changed, 4 insertions(+)
diff --git a/lib/eal/include/generic/rte_vect.h
b/lib/eal/include/generic/rte_vect.h
index 3fec2bf..7775
It's discouraged to use rte_atomics APIs instead standard APIs should be
used from C11. Since MSVC is a new toolchain/platform combination block
visibility of the rte_atomic APIs from day 1.
Signed-off-by: Tyler Retzlaff
---
lib/eal/include/generic/rte_atomic.h | 7 +++
lib/eal/x86/include/r
Forward declaration of a enum is a non-standard extension and is not
supported by MSVC. Use an int instead.
Abstract the use of the int/enum rte_cpu_flag_t in function parameter
lists by re-typdefing the enum rte_cpu_flag_t to the rte_cpu_flag_t
identifier.
Remove the use of __extension__ on func
For now expand a lot of common rte macros empty. The catch here is we
need to test that most of the macros do what they should but at the same
time they are blocking work needed to bootstrap of the unit tests.
Later we will return and provide (where possible) expansions that work
correctly for msv
Windows does not support versioned symbols. Fortunately Windows also
doesn't have an exported stable ABI.
Export rte_tel_data_add_array_int -> rte_tel_data_add_array_int_24
and rte_tel_data_add_dict_int -> rte_tel_data_add_dict_int_v24
functions.
Windows does have a way to achieve similar version
The MSVC compiler does not target big endian platforms so define
little endian always.
Signed-off-by: Tyler Retzlaff
---
lib/eal/include/generic/rte_byteorder.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/eal/include/generic/rte_byteorder.h
b/lib/eal/include/generic/rte_byteorder.
On Tue, Apr 11, 2023 at 10:10:48AM +0100, Bruce Richardson wrote:
> On Mon, Apr 10, 2023 at 01:58:48PM -0700, Tyler Retzlaff wrote:
> > On Mon, Apr 10, 2023 at 09:02:00PM +0100, Konstantin Ananyev wrote:
> > > 06/04/2023 01:07, Tyler Retzlaff пишет:
> > > >On Wed, Apr 05, 2023 at 10:57:02AM +,
On Tue, 11 Apr 2023 13:11:07 -0700
Joshua Washington wrote:
> Google cloud routes traffic using IP addesses without the support of MAC
> addresses, so changing source IP address for txonly-multi-flow can have
> negative performance implications for net/gve when using testpmd. This
> change adds a
Add tracepoints at important APIs for tracing support.
Signed-off-by: Chengwen Feng
---
lib/dmadev/meson.build | 2 +-
lib/dmadev/rte_dmadev.c | 39 ++--
lib/dmadev/rte_dmadev.h | 56 ---
lib/dmadev/rte_dmadev_trace.h| 133 +
https://bugs.dpdk.org/show_bug.cgi?id=1214
Bug ID: 1214
Summary: BCM57508 bnxt_hwrm_send_message Error(timeout) sending
msg
Product: DPDK
Version: 21.08
Hardware: x86
OS: Linux
Status: UNCONFIRME
Enable timestamp offload with the command '--enable-rx-timestamp',
pay attention that getting Rx timestamp offload will drop the performance.
---
v2: fix compile warning and SSE path
Zhichao Zeng (3):
net/iavf: support Rx timestamp offload on AVX512
net/iavf: support Rx timestamp offload on A
This patch enables Rx timestamp offload on AVX512 data path.
Enable timestamp offload with the command '--enable-rx-timestamp',
pay attention that getting Rx timestamp offload will drop the performance.
Signed-off-by: Wenjun Wu
Signed-off-by: Zhichao Zeng
---
v2: fix compile warning
---
drive
This patch enables Rx timestamp offload on AVX2 data path.
Enable timestamp offload with the command '--enable-rx-timestamp',
pay attention that getting Rx timestamp offload will drop the performance.
Signed-off-by: Zhichao Zeng
---
v2: fix compile warning
---
drivers/net/iavf/iavf_rxtx_vec_av
This patch enables Rx timestamp offload on SSE data path.
Enable timestamp offload with the command '--enable-rx-timestamp',
pay attention that getting Rx timestamp offload will drop the performance.
Signed-off-by: Zhichao Zeng
---
v2: fix compile warning and timestamp error
---
drivers/net/ia
Hi,
We are currently working on implementing the Forward Error Correction
(FEC) feature in our driver, but we have encountered some difficulties
in understanding the interpretation of the semantics of 'fec_capa', a
bitmask of allowed FEC modes. Specifically, we are unclear about the
meaning o
Hi Jochen,
Could you please help here?
Regards
Amiya
On Fri, Mar 31, 2023 at 1:10 PM David Marchand
wrote:
> Hello Jochen,
>
> On Fri, Mar 31, 2023 at 9:07 AM wrote:
> >
> > Bug ID 1209
> > Summary vmxnet3 interface not receiving any packets with dpdk-22.11.1
> > Product DPDK
> > Version 22.1
Hi Qiming,
It’s not an issue in VPP. It’s the XL710 NIC link down issue in DPDK testpmd.
The ethernet links btw two XL710 NICs occasionally go down in FD.io VPP lab.
If possible, could we have a talk on this issue this afternoon?
Thanks.
From: Yang, Qiming
Sent: Tuesday, April 4, 2023 9:47 AM
To
I have tried to get hw timestamps of packets on Intel X550T(10G) and
AQC107(10G).
But RTE_ETH_RX_OFFLOAD_TIMESTAMP = 0 in dev_info.rx_offload_capa.
Tell me is it possible to get hw timestamps on these NICs with DPDK?
Which 10G NICs support this option?
Hi Maxime,
On Fri, Mar 31, 2023 at 11:43 PM Maxime Coquelin
wrote:
>
> This series introduces a new type of backend, VDUSE,
> to the Vhost library.
>
> VDUSE stands for vDPA device in Userspace, it enables
> implementing a Virtio device in userspace and have it
> attached to the Kernel vDPA bus.
Hi,
We are honored to use dpdk and dpdk-kmod, two outstanding open source
softwares. However, according to the company's open source software usage
standards, only officially released versions can be introduced as open source
software. As far as I know, there is no official release of dpdk-kmod
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