On 2025/6/9 23:21, Stephen Hemminger wrote:
> On Mon, 9 Jun 2025 09:58:27 +
> Sivaprasad Tummala wrote:
>
>> Previously, the TX burst size was fixed at 256, leading to performance
>> degradation in certain scenarios.
>>
>> This patch introduces logic to set the TX burst size to match the
>>
Hi @Stephen Hemminger ,
Thanks for the reply , please find the details below.
DPDK version : 20.11.6
#define LOADBAL_HASH_ENTRIES_MAX (1024*1024*36)
#define LOADBAL_HASH_TABLE_SIZE_MULTIPLIER 2
hashSizeMultiplier = LOADBAL_HASH_TABLE_SIZE_MULTIPLIER;
struct rte_hash_parameters loadbal_hash_
Hello, I have a suggestion for a small fix/feature for the acpi_cpufreq
power environment.
acpi_cpufreq already saves the original governor setting and reverts it
back after a `rte_power_exit` call, which is good; The problem I am facing
is that on `power_acpi_cpufreq_init`, the frequency is immed
Hi Vidya,
How about add a wrap function and keep this function (could modify it's name).
static int
test_enqueue_fill() {
uint64_t pattern[3] = {0x0, 0xfedcba9876543210, 0x};
int i;
for (i = 0; i < RTE_DIM(pattern); i++) {
ret = test_enqueue
> From: Sunil Kumar Kori [mailto:sk...@marvell.com]
> Sent: Tuesday, 10 June 2025 07.02
>
> > On Fri, 6 Jun 2025 11:54:52 +0200
> > Morten Brørup wrote:
> >
> > > > From: sk...@marvell.com [mailto:sk...@marvell.com]
> > > > Sent: Friday, 6 June 2025 11.28
> > > >
> > > > From: Sunil Kumar Kori
>
E610 device does not support MACsec.
This commit will excluding MACsec stats from the xstats info
display for E610 device.
Fixes: b35d309710fe ("net/ixgbe: add MACsec offload")
Cc: sta...@dpdk.org
Signed-off-by: Kaiwen Deng
---
drivers/net/intel/ixgbe/ixgbe_ethdev.c | 121 ++---
Hi Vidya,
On 2025/6/9 11:03, Vidya Sagar Velumuri wrote:
> Run the sg test in a loop to verify wrap around case.
> Total number commands submitted to be more than the number descriptors
> allocated to verify the scenario.
>
> Signed-off-by: Vidya Sagar Velumuri
> Acked-by: Amit Prakash Shukla
>
Signed-off-by: Howard Wang
---
drivers/net/r8169/base/rtl8127.c | 44 ---
drivers/net/r8169/base/rtl8127_mcu.c | 109 ---
drivers/net/r8169/r8169_hw.h | 2 +-
drivers/net/r8169/r8169_phy.c| 1 -
4 files changed, 80 insertions(+), 76 deletio
Signed-off-by: Howard Wang
---
drivers/net/r8169/r8169_dash.c | 1 +
drivers/net/r8169/r8169_hw.c | 32 ++--
drivers/net/r8169/r8169_phy.c | 34 ++
3 files changed, 13 insertions(+), 54 deletions(-)
diff --git a/drivers/net/r8169/r8
Signed-off-by: Howard Wang
---
drivers/net/r8169/meson.build| 1 +
drivers/net/r8169/r8169_ethdev.h | 3 +
drivers/net/r8169/r8169_fiber.c | 201 +++
drivers/net/r8169/r8169_fiber.h | 42 +++
drivers/net/r8169/r8169_hw.c | 93 +-
drivers
Signed-off-by: Howard Wang
---
drivers/net/r8169/base/rtl8125cp.c | 73
drivers/net/r8169/base/rtl8125cp_mcu.c | 78 ++
drivers/net/r8169/base/rtl8125cp_mcu.h | 10
drivers/net/r8169/meson.build | 2 +
drivers/net/r8169/r8169_com
Signed-off-by: Howard Wang
---
doc/guides/nics/r8169.rst |5 +-
drivers/net/r8169/base/rtl8125a.c |8 +-
drivers/net/r8169/base/rtl8125a.h |1 -
drivers/net/r8169/base/rtl8125a_mcu.c | 17 +-
drivers/net/r8169/base/rtl8125b.c |5 +-
drivers/net/r8169
Signed-off-by: Howard Wang
---
drivers/net/r8169/r8169_dash.c | 23 +++
drivers/net/r8169/r8169_dash.h | 1 +
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/net/r8169/r8169_dash.c b/drivers/net/r8169/r8169_dash.c
index c26d7a5280..1fdbe5c4ae 100644
-
This patch series includes the following updates:
Add support for the RTL8168 1G NIC series.
Add support for the RTL8127 10G NIC.
Add support for the RTL8125CP 2.5G NIC.
Update hardware configuration for RTL8125 and RTL8126.
Howard Wang (8):
net/r8169: add support for RTL8168 series
net/r8169
Signed-off-by: Howard Wang
---
drivers/net/r8169/meson.build| 1 +
drivers/net/r8169/r8169_ethdev.h | 3 +
drivers/net/r8169/r8169_fiber.c | 201 +++
drivers/net/r8169/r8169_fiber.h | 42 +++
drivers/net/r8169/r8169_hw.c | 93 +-
drivers
Signed-off-by: Howard Wang
---
drivers/net/r8169/r8169_dash.c | 1 +
drivers/net/r8169/r8169_hw.c | 32 ++--
drivers/net/r8169/r8169_phy.c | 34 ++
3 files changed, 13 insertions(+), 54 deletions(-)
diff --git a/drivers/net/r8169/r8
Signed-off-by: Howard Wang
---
drivers/net/r8169/base/rtl8125cp.c | 73
drivers/net/r8169/base/rtl8125cp_mcu.c | 78 ++
drivers/net/r8169/base/rtl8125cp_mcu.h | 10
drivers/net/r8169/meson.build | 2 +
drivers/net/r8169/r8169_com
Signed-off-by: Howard Wang
---
drivers/net/r8169/r8169_dash.c | 23 +++
drivers/net/r8169/r8169_dash.h | 1 +
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/net/r8169/r8169_dash.c b/drivers/net/r8169/r8169_dash.c
index c26d7a5280..1fdbe5c4ae 100644
-
Signed-off-by: Howard Wang
---
doc/guides/nics/r8169.rst |5 +-
drivers/net/r8169/base/rtl8125a.c |8 +-
drivers/net/r8169/base/rtl8125a.h |1 -
drivers/net/r8169/base/rtl8125a_mcu.c | 17 +-
drivers/net/r8169/base/rtl8125b.c |5 +-
drivers/net/r8169
Sometimes it’s just a failure in the testing system and needs to retrigger the
tests.
Regards,
Maayan Kashani
From: Yogev Chaimovich
Sent: Monday, 9 June 2025 16:11
To: Maayan Kashani ; Stephen Hemminger
Cc: Dariusz Sosnowski ; Slava Ovsiienko
; Bing Zhao ; Ori Kam
; Suanming Mou ; Matan Az
> > From: Sunil Kumar Kori
> > Sent: Monday, 12 May 2025 17.07
> >
> > rte_eth_fp_ops contains ops for fast path APIs. Each API validates
> > availability of callback and then invoke it.
> > These checks impact data path performace.
>
> Picking up the discussion from another thread [1]:
>
> > Fr
On 2025/6/10 1:13, Stephen Hemminger wrote:
> On Mon, 9 Jun 2025 21:06:49 +0800
> Dengdui Huang wrote:
>
>> +rem = dma_addr & (HNS3_RX_DMA_ADDR_ALIGN_128 - 1);
>> +if ((rx_offload & RTE_ETH_RX_OFFLOAD_TCP_LRO) && rem > 0) {
>> +hns3_err(hw, "Hardware GRO is not supported whe
On 2025/6/10 1:12, Stephen Hemminger wrote:
> On Mon, 9 Jun 2025 21:06:51 +0800
> Dengdui Huang wrote:
>
>> Currently, When RTE_ETH_RX_OFFLOAD_VLAN_FILTER offload is set,
>> driver wouldn't select Rx vector algorithm. Actually, this
>> algorithm support it, so open it.
>>
>> Fixes: a3d4f4d291d7
On Fri, 6 Jun 2025 09:05:14 +
Wencheng Li wrote:
> v9:
> - Added RTE_PMD_REGISTER_KMOD_DEP macro to
> declare dependency on macb_uio kernel module.
> - The source link for the macb_uio module
> can be found in macb.rst.
>
> v8:
> - Delete log level reset code.
> - Delete code that links t
04/02/2025 20:46, Stephen Hemminger:
> Even if RTE_ENABLE_ASSERT is not enabled, the expression used should
> still be checked for compiler warnings. Use sizeof()
> and ternary operator in same manner as the assert() macro to
> cause the expression to be evaluated but not generate code.
>
> This w
26/11/2024 14:14, Anatoly Burakov:
> While initially, DPDK has used the term "socket ID" to refer to physical
> package
> ID, the last time DPDK read "physical_package_id" for socket ID was ~9 years
> ago, so it's been a while since we've actually switched over to using the term
> "socket" to mean
From: Dylan Schneider
Allow the user to specify protocol link type when creating pcapng files.
This change is needed to specify the protocol type in the pcapng file,
DLT_EN10MB specifies ethernet packets only. This will allow dissectors
for other protocols to be used on files generated by pcapng.
The PMU test is reported to fail on some platforms.
Disabling until a fix is found.
Signed-off-by: Thomas Monjalon
---
app/test/test_pmu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/app/test/test_pmu.c b/app/test/test_pmu.c
index 74cc88f949..10513bf9c9 100644
--- a
On Mon, 9 Jun 2025 21:06:49 +0800
Dengdui Huang wrote:
> + rem = dma_addr & (HNS3_RX_DMA_ADDR_ALIGN_128 - 1);
> + if ((rx_offload & RTE_ETH_RX_OFFLOAD_TCP_LRO) && rem > 0) {
> + hns3_err(hw, "Hardware GRO is not supported when mbuf DMA "
> + "address is 64
From: Tomasz Duszynski
In order to profile app, one needs to store significant amount of samples
somewhere for an analysis later on.
Since trace library supports storing data in a CTF format,
lets take advantage of that and add a dedicated PMU tracepoint.
Signed-off-by: Tomasz Duszynski
---
v17
On Fri, 30 May 2025 12:43:33 +0530
Gagandeep Singh wrote:
> This patch series introduces enhancements and fixes to the
> NXP DPAA2 Ethernet driver.
> It includes support for
> - software taildrop on ordered queues.
> - setup speed capabilities.
> - DPAA2 resource version.
> - MAC level stati
06/06/2025 18:27, Tomasz Duszynski:
> Hi Thomas,
>
> >Hello,
> >
> >17/01/2025 10:00, Tomasz Duszynski:
> >> lib/pmu/meson.build | 22 +
> >> lib/pmu/pmu_arm64.c | 94
> >> lib/pmu/pmu_private.h| 32 ++
> >> lib/pmu/rte_pmu.c
On Mon, Jun 09, 2025 at 11:16:40AM +0100, Anatoly Burakov wrote:
> Update e1000 base code version to 2025-06-04-14.40
>
> Anatoly Burakov (1):
> net/e1000: update README
>
> Vitaly Lifshits (1):
> net/e1000: better clock synchronization workaround
>
> drivers/net/intel/e1000/base/README
Hey Stephen,
In this case, is it best to just pass 1 with a comment saying that is
DLT_EN10MB? Or is there a way we can get it defined in all configs?
From: Stephen Hemminger
Sent: Sunday, June 8, 2025 4:34 PM
To: Dylan Schneider
Cc: dev@dpdk.org ; Thomas Monjalo
On Thu, Jun 05, 2025 at 04:57:24PM +0200, Morten Brørup wrote:
> +TO: David and Thomas, were part of the discussion
> +CC: Stephen
>
> > From: Andre Muezerie [mailto:andre...@linux.microsoft.com]
> > Sent: Thursday, 5 June 2025 16.47
> >
> > __builtin_add_overflow is gcc specific. A macro needs t
There is no reason why scalar and vector implementations of tx free mbufs
function have to share the same name, in fact it is counter-productive
because including `ixgbe_rxtx_vec_common.h` from `ixgbe_rxtx.c` will cause
naming clashes. Rename the vector implementation to avoid naming clashes.
Sign
> From: Stephen Hemminger [mailto:step...@networkplumber.org]
> Sent: Monday, 9 June 2025 17.26
>
> On Mon, 9 Jun 2025 14:42:26 +
> Morten Brørup wrote:
>
> > @@ -141,8 +141,13 @@ rte_mem_page_size(void)
> > {
> > static size_t page_size;
> >
> > - if (!page_size)
> > + if (page_si
Currently, there are duplicate implementations of Tx mbuf recycle in some
drivers, specifically ixgbe and i40e. Move them into a common header.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Use the common desc_done function to check for DD bit status
Currently, there are duplicate implementations of Rx mbuf recycle in some
drivers, specifically ixgbe and i40e. Move them into a common header.
While we're at it, also support no-IOVA-in-mbuf case.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v5:
- Renamed paddr
Currently, for 32-byte descriptor format, only SSE instruction set is
supported. Add implementation for AVX2 and AVX512 instruction sets. Since
we are using Rx descriptor definitions from common code, we can just use
the generic descriptor definition, as we only ever write the first 16 bytes
of it,
The ixgbe driver has implementations of vectorized mbuf rearm code that
is identical to the ones in the common code, so just use those.
Since ixgbe Rx descriptors are always 16-byte wide, force using 16-byte
definitions in the common headers with a define flag.
While we're at it, also make sure t
The iavf driver has implementations of vectorized mbuf rearm code that
is identical to the ones in the common code, so just use those.
While we're at it, also make sure to use common definitions for things like
burst size, rearm threshold, and descriptors per loop, which is currently
defined separ
The i40e driver has an implementation of vectorized mbuf rearm code that
is identical to the one in the common code, so just use that.
In addition, the i40e has implementations of Rx queue rearm for Neon and
AltiVec instruction sets, so create common headers for each of the
instruction sets, and u
Make the i40e driver use the new common Rx queue structure.
The i40e driver supports 16-byte and 32-byte Rx descriptor formats, which
is shared by other drivers. To have fewer driver-specific definitions in
common structures, add a header file defining shared descriptor formats,
and switch between
There is certain amount of duplication between various drivers when it
comes to Rx ring rearm. This patch takes implementation from ice driver
as a base because it has support for no IOVA in mbuf as well as all
vector implementations, and moves them to a common file.
While we're at it, also make s
Make the ice driver use the new common Rx queue structure.
In addition to 16-byte and 32-byte descriptors supported by other drivers
which we adjust ice driver to use where necessary, ice driver also
supports flex descriptor format that is also shared by some of the other
drivers, so add a common
Make the iavf driver use the new common Rx queue structure.
The iavf driver only supports 32-byte descriptors but they are of a common
format, so replace all usages of iavf-specific descriptors with the
common ones, and force the common queue structure to only use 32-byte
descriptor formats for IA
In preparation for deduplication effort, generalize the Rx queue structure.
The entire Rx queue structure is moved to common/rx.h, clarifying the
comments where necessary, and separating common parts from ixgbe-specific
parts.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes
This commit does the following cleanups:
- Remove RTE_ and RTE_PMD_ prefix from internal definitions
- Mark vector-PMD related definitions with I40E_VPMD_ prefix
- Remove unused definitions
- Create "descriptors per loop" for different vector implementations
(regular for SSE, Neon, AltiVec, wide
This commit does the following cleanups:
- Mark vector-PMD related definitions with IAVF_VPMD_ prefix
- Create "descriptors per loop" for different vector implementations
(regular for SSE, Neon, AltiVec, wide for AVX2, AVX512)
- Make definitions' names match naming conventions used in other driv
This commit does the following cleanups:
- Mark vector-PMD related definitions with ICE_VPMD_ prefix
- Remove unused definitions
- Create "descriptors per loop" for different vector implementations
(regular for SSE, Neon, wide for AVX2, AVX512)
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Ri
There is no reason why bits and pieces of vectorized code should be
defined in `ixgbe_rxtx.c`, so move them to the vec common file.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v5:
- Add this patch
drivers/net/intel/ixgbe/ixgbe_rxtx.c | 41
This patch does the following cleanups:
- Remove RTE_ and RTE_PMD_ prefix from internal definitions
- Mark vector-PMD related definitions with IXGBE_VPMD_ prefix
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Add this commit
drivers/net/intel/ixgbe/i
Add a function to check DD bit status, and use it everywhere we do these
checks.
Signed-off-by: Anatoly Burakov
---
Notes:
v6:
- Move ixgbe_tx_desc_done() to ixgbe_rxtx.h to avoid compile errors on
platforms that do not support vector driver
v5:
- Add this commit
dri
There is an option `RTE_PMD_PACKET_PREFETCH` in `rte_config.h` that is
always set to 1 by default, and that controls some prefetch behavior in the
driver. However, there's another prefetch behavior that is controlled by
`RTE_PMD_USE_PREFETCH`, which is always defined unconditionally (literally
usin
Currently, vector code is guarded by platform checks, and unused functions
are implemented using stubs.
Simplify things the following way:
- Define a compilation flag `IXGBE_VPMD_SUPPORTED` that will enable or
disable vector code support regardless of platform
- Wrap platform checks with said d
Each vector driver provides its own Rx queue setup etc. functions, but
actually they're entirely identical, and can be merged. Rename the
`ixgbe_recycle_mbufs_vec_common.c` to `ixgbe_rxtx_vec_common.c` and move
all common code there from each respective vector driver.
Signed-off-by: Anatoly Burako
Some of the things that are only used by vector drivers is guarded by
platform define checks, but there is actually no real reason to have those
checks, because this code won't run anyway. Remove all of the unnecessary
platform checks, and provide function stubs where necessary to make
compilation
Currently, vector Rx queue release mbufs function is only called from
inside the scalar variant. Decouple them to allow both to be defined
separately from each other, and provide a common function that picks
between the two when necessary.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
There are no physical functions that support having VF use 16-byte
descriptors, so remove all 16-byte descriptor related code from the driver.
Suggested-by: Bruce Richardson
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v4 -> v5:
- Remove 16-byte descriptor relat
There is wrong indentation in `ixgbe_set_tx_function`. Fix it.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v5:
- Add this patch
drivers/net/intel/ixgbe/ixgbe_rxtx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/intel/ixgb
There are no differences between scalar and vector paths when it comes to
packet type support, and the only data path currently not covered by the
check is the VF representor path, because it's not meant to be used
directly anyway. Simplify the check to reflect that fact.
Signed-off-by: Anatoly Bu
In preparation for having a common definition for 16-byte and 32-byte Rx
descriptors, rename RTE_LIBRTE_ICE_16BYTE_RX_DESC to
RTE_NET_INTEL_USE_16BYTE_DESC.
Suggested-by: Bruce Richardson
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Add this commit
Currently, the ice driver has a variable that have the same semantics as
in other drivers, but has a different name. Rename `rx_ring_dma` to
`rx_ring_phys_addr` for consistency with other drivers.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Make this
Currently, the i40e driver has a variable that has the same semantics as
in other drivers, but has a different name. Rename `rx_using_sse` to
`vector_rx` to match it to other drivers.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Make this commit separ
In preparation for having a common definition for 16-byte and 32-byte Rx
descriptors, rename `RTE_LIBRTE_I40E_16BYTE_RX_DESC` to
`RTE_NET_INTEL_USE_16BYTE_DESC``.
Suggested-by: Bruce Richardson
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Add this co
Currently, the ixgbe driver has variables that have the same semantics as
in other drivers, but have different names. Rename these variables to match
ones in other drivers:
- rdt_reg_addr -> qrx_tail (Rx ring tail register address)
- rx_using_sse -> vector_rx (indicates if vectorized path is enabl
Currently, the stats structure is directly embedded in the queue structure.
We're about to move iavf driver to a common Rx queue structure, so we can't
have driver-specific structures that aren't pointers, inside the common
queue structure. To prepare, we replace direct embedding into the queue
str
The `rdh` (read head) field in the `ixgbe_rx_queue` struct is not used
anywhere in the codebase, and can be removed.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
drivers/net/intel/ixgbe/ixgbe_rxtx.c | 9 ++---
drivers/net/intel/ixgbe/ixgbe_rxtx.h | 1 -
2 files changed, 2 i
There is certain amount of duplication between different ixgbe, i40e, ice, and
iavf. This patchset specifically focuses on laying groundwork for deduplicating
the Rx side of things - providing common queue definitions, using common Rx
descriptor formats, and some low hanging fruit in terms of Rx co
On Sun, Jun 08, 2025 at 11:32:22AM +, Soumyadeep Hore wrote:
> Tx Time based queues are supported using AVX512 vector.
>
> Signed-off-by: Soumyadeep Hore
> ---
This looks to have a lot of duplicated code compared to the AVX2 version,
can they be merged?
/Bruce
> drivers/net/intel/ice/ice_
On Sun, Jun 08, 2025 at 11:32:21AM +, Soumyadeep Hore wrote:
> Tx Time based queues are supported using AVX2 vector.
>
> Signed-off-by: Soumyadeep Hore
> ---
> drivers/net/intel/ice/ice_rxtx_vec_avx2.c | 135 +++-
> drivers/net/intel/ice/ice_rxtx_vec_common.h | 17 +++
> 2
On 6/9/2025 1:54 PM, Bruce Richardson wrote:
On Fri, Jun 06, 2025 at 06:17:07PM +0100, Anatoly Burakov wrote:
Currently, for 32-byte descriptor format, only SSE instruction set is
supported. Add implementation for AVX2 and AVX512 instruction sets. Since
we are using Rx descriptor definitions fro
Coverity reports some issues regarding the mempool library.
I have tried fixing them.
How to test if Coverity is satisfied with these fixes?
Function rte_mem_page_size() returns a negative number.
This seems to be the root cause of the following mempool defects.
And since the function is used else
On Sun, Jun 08, 2025 at 11:32:20AM +, Soumyadeep Hore wrote:
> Add support for Tx Time based queues. This is used to schedule
> packets based on Tx timestamp.
>
> Signed-off-by: Soumyadeep Hore
Hi
more review comments inline below.
> ---
> drivers/net/intel/common/tx.h | 14
On Sun, Jun 08, 2025 at 11:32:19AM +, Soumyadeep Hore wrote:
> Adding eth_ice_read_clock() feature to get current time
> for scheduling Packets based on Tx time.
>
> Signed-off-by: Soumyadeep Hore
> ---
> drivers/net/intel/ice/ice_ethdev.c | 13 +
> 1 file changed, 13 insertions(
On Sun, Jun 08, 2025 at 11:32:23AM +, Soumyadeep Hore wrote:
> E830 adapters currently support Tx Time based queues.
>
> Signed-off-by: Soumyadeep Hore
> ---
> doc/guides/nics/ice.rst | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/doc/guides/nics/ice.rst b/doc/gu
27/05/2025 14:04, changqing...@windriver.com:
> From: Changqing Li
>
> To support Y2038 issue, for 32bit system, -D_TIME_BITS=64 is passed to
> gcc, struct timespec time->tv_sec is 64bit, but size_t is 32bits, so
> dpdk will compile failed with error:
> "../git/lib/ethdev/ethdev_trace.h: In funct
Hi,
Actually looks like we're going with another workaround, so I might not be
needing my original patch.
Also, I do not understand how my patch (not printing a log) makes a test fail -
I couldn't find that test in DPDK to verify. I'm not that familiar though..
Yogev
Currently, select Tx vector algorithm only when tx_offload is
RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE. Actually, this algorithm
already supported the case that tx_offload isn't fast free.
Fixes: e31f123db06b ("net/hns3: support NEON Tx")
Cc: sta...@dpdk.org
Signed-off-by: Dengdui Huang
---
drivers/ne
This patchset fixes some bugs.
Dengdui Huang (3):
net/hns3: fix the hardware GRO function is abnormal
net/hns3: fix can't use vector for Tx when not set fast free
net/hns3: fix can't use vector for Rx when set VLAN filter
drivers/net/hns3/hns3_rxtx.c | 12
drivers/net/hns3
Currently, the alignment requirements of the data address in mbuf is
64-byte on HIP08 platform. However, the GRO feature will be abnormal
in this case.
Many online applications already use 64-byte aligned. So a check is added
to avoid using the GRO function when 64-byte aligned is used.
Fixes: d1
Currently, When RTE_ETH_RX_OFFLOAD_VLAN_FILTER offload is set,
driver wouldn't select Rx vector algorithm. Actually, this
algorithm support it, so open it.
Fixes: a3d4f4d291d7 ("net/hns3: support NEON Rx")
Cc: sta...@dpdk.org
Signed-off-by: Dengdui Huang
---
drivers/net/hns3/hns3_rxtx_vec.c | 4
On Sun, Jun 08, 2025 at 11:32:20AM +, Soumyadeep Hore wrote:
> Add support for Tx Time based queues. This is used to schedule
> packets based on Tx timestamp.
>
> Signed-off-by: Soumyadeep Hore
Some initial review comments inline below.
/Bruce
> ---
> drivers/net/intel/common/tx.h
03/06/2025 10:29, Bruce Richardson:
> On Fri, May 30, 2025 at 09:18:44AM +0100, Rui Ferreira wrote:
> > Unregister callback on cleanup to avoid use after free from the
> > interrupt thread (eal_intr_thread_main).
> >
> > To be more defensive, set ptr to NULL if we can unregister.
> >
> > rte_intr
On Mon, Jun 09, 2025 at 01:23:18PM +0100, Bruce Richardson wrote:
> On Mon, Jun 09, 2025 at 11:59:15AM +, Varghese, Vipin wrote:
> > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> > > -Original Message-
> > > From: Bruce Richardson
> > > Sent: Monday, June 9, 2025 1:28
On Mon, Jun 09, 2025 at 11:59:15AM +, Varghese, Vipin wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> > -Original Message-
> > From: Bruce Richardson
> > Sent: Monday, June 9, 2025 1:28 PM
> > To: Varghese, Vipin
> > Cc: dev@dpdk.org; Song, Keesang
> > Subject:
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: Bruce Richardson
> Sent: Monday, June 9, 2025 1:28 PM
> To: Varghese, Vipin
> Cc: dev@dpdk.org; Song, Keesang
> Subject: Re: [PATCH v4] build: reduce use of AVX compiler flags
>
> Caution: This message
On Mon, Jun 09, 2025 at 11:04:39AM +0200, Burakov, Anatoly wrote:
> On 6/6/2025 7:08 PM, Anatoly Burakov wrote:
> > Add a function to check DD bit status, and use it everywhere we do these
> > checks.
> >
> > Signed-off-by: Anatoly Burakov
> > ---
> >
> > Notes:
> > v5:
> > - Add this
On Fri, Jun 06, 2025 at 06:17:07PM +0100, Anatoly Burakov wrote:
> Currently, for 32-byte descriptor format, only SSE instruction set is
> supported. Add implementation for AVX2 and AVX512 instruction sets. Since
> we are using Rx descriptor definitions from common code, we can just use
> the gener
On Fri, Jun 06, 2025 at 06:16:31PM +0100, Anatoly Burakov wrote:
> Make the iavf driver use the new common Rx queue structure.
>
> The iavf driver only supports 32-byte descriptors but they are of a common
> format, so replace all usages of iavf-specific descriptors with the
> common ones, and for
On Fri, Jun 06, 2025 at 06:08:55PM +0100, Anatoly Burakov wrote:
> There is no reason why bits and pieces of vectorized code should be
> defined in `ixgbe_rxtx.c`, so move them to the vec common file.
>
> Signed-off-by: Anatoly Burakov
> ---
> drivers/net/intel/ixgbe/ixgbe_rxtx.c | 38 +
On Fri, Jun 06, 2025 at 06:08:54PM +0100, Anatoly Burakov wrote:
> Each vector driver provides its own Rx queue setup etc. functions, but
> actually they're entirely identical, and can be merged. Rename the
> `ixgbe_recycle_mbufs_vec_common.c` to `ixgbe_rxtx_vec_common.c` and move
> all common code
On Fri, Jun 06, 2025 at 06:08:53PM +0100, Anatoly Burakov wrote:
> There is no reason why scalar and vector implementations of tx free mbufs
> function have to share the same name. Fix it.
>
> Signed-off-by: Anatoly Burakov
> ---
>
Acked-by: Bruce Richardson
On Fri, Jun 06, 2025 at 06:08:52PM +0100, Anatoly Burakov wrote:
> Currently, vector Rx queue release mbufs function is only called from
> inside the scalar variant. Decouple them to allow both to be defined
> separately from each other, and provide a common function that picks
> between the two wh
From: Nithinsen Kaithakadan
Copy 8 bytes of the IV into the iv field within the
session for the AES CTR algorithm.
Signed-off-by: Nithinsen Kaithakadan
---
drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 7 ---
drivers/crypto/cnxk/cn20k_ipsec_la_ops.h | 7 ---
2 files changed, 8 insertions(
From: Nithinsen Kaithakadan
Reconfigure qsize in each CPT iq enable call.
Fixes: 3bf87839559 ("common/cnxk: move instruction queue enable to ROC")
Cc: sta...@dpdk.org
Signed-off-by: Nithinsen Kaithakadan
---
drivers/common/cnxk/roc_cpt.c | 5 +
1 file changed, 5 insertions(+)
diff --git
From: Rupesh Chiluka
Add support for sessionless asymmetric operations
in cnxk CPT PMD.
Signed-off-by: Rupesh Chiluka
Signed-off-by: Tejasree Kondoj
Signed-off-by: Vidya Sagar Velumuri
---
doc/guides/cryptodevs/features/cn10k.ini | 1 +
doc/guides/cryptodevs/features/cn9k.ini | 1 +
doc
From: Rupesh Chiluka
Extend check for max supported gather entries in CNXK
CPT PMD.
Signed-off-by: Rupesh Chiluka
---
drivers/common/cnxk/roc_cpt_sg.h | 1 +
drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 10 ++
drivers/crypto/cnxk/cn10k_tls_ops.h | 10 ++
drivers/cry
Adding meta variable in CPT high level structure to
pass custom metadata to CN20K firmware.
Signed-off-by: Tejasree Kondoj
---
drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
b/drivers/crypto/cnxk/cnxk_cry
1 - 100 of 141 matches
Mail list logo
