graj...@cisco.com; dev@dpdk.org
>>>>> Cc: tho...@monjalon.net; jer...@marvell.com; Honnappa Nagarahalli
>>>>> ; damar...@cisco.com; nd
>>>>
>>>>> Subject: [dpdk-dev] [PATCH v1] net/memif: optimized with one-way
>>>>> barrier
l.com; Honnappa Nagarahalli
> > > > ; damar...@cisco.com; nd
> > >
> > > > Subject: [dpdk-dev] [PATCH v1] net/memif: optimized with one-way
> > > > barrier
> > > >
> > > > Using 'rte_mb' to synchronize the shared ring head/tail between
mjan Marion (damarion)
> ; nd ; Gavin Hu (Arm Technology
> China) ; nd
> Subject: RE: [dpdk-dev] [PATCH v1] net/memif: optimized with one-way
> barrier
>
> > > -Original Message-
> > > From: dev On Behalf Of Phil Yang
> > > Sent: Monday, August 26, 2
> > -Original Message-
> > From: dev On Behalf Of Phil Yang
> > Sent: Monday, August 26, 2019 7:00 PM
> > To: jgraj...@cisco.com; dev@dpdk.org
> > Cc: tho...@monjalon.net; jer...@marvell.com; Honnappa Nagarahalli
> > ; damar...@cisco.com; nd
>
>
+ Gavin
> -Original Message-
> From: dev On Behalf Of Phil Yang
> Sent: Monday, August 26, 2019 7:00 PM
> To: jgraj...@cisco.com; dev@dpdk.org
> Cc: tho...@monjalon.net; jer...@marvell.com; Honnappa Nagarahalli
> ; damar...@cisco.com; nd
>
> Subject: [dpdk-d
Using 'rte_mb' to synchronize the shared ring head/tail between producer
and consumer will stall the pipeline and damage performance on the weak
memory model platforms, such like aarch64. Meanwhile update the shared
ring head and tail are observable and ordered between CPUs on IA.
Optimized this f
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