d 64bits
>peculiarities
>
>
> It builds fine for 32/64 bits (w and w/o "force intrinsics"), but I really
> would
> like a lot of eyes on this (and I would say, especially, rte_cycles,
> rte_memcpy
> and rte_cpuflags).
> I still have some concerns about the use of intrinsics for architecture != x86
> but I think Chao will be the best to look at this.
>
>
Acked-by: Chao Zhu
tter way to do the detection, I think this patch
is good enough.
Acked-by: Chao Zhu
This patch solves the KNI compiling problem on IBM Power by using
RTE_CACHE_LINE_SIZE
micro.
Chao Zhu (1):
Fix KNI compiling issue on IBM Power
.../linuxapp/eal/include/exec-env/rte_kni_common.h |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Because of different cache line size, the alignment of struct
rte_kni_mbuf in rte_kni_common.h doesn't work on IBM Power. This patch
changed from 64 to RTE_CACHE_LINE_SIZE micro to do the alignment.
Signed-off-by: Chao Zhu
---
.../linuxapp/eal/include/exec-env/rte_kni_common.h |7 +
Michael,
I'm looking at it. I'll give you feedback soon.
On 2014/12/5 14:56, Qiu, Michael wrote:
> Hi Chao
>
> Would you please take a look at this patch?
>
> It's solved issue introduce by Power Arch support patch.
>
> Your comments are very precious :)
>
> Thanks,
> Michael
> On 12/5/2014 2:03
gepage_sz == RTE_PGSIZE_1G) {
> hugepg_tbl[i].final_va = hugepg_tbl[i].orig_va;
> hugepg_tbl[i].orig_va = NULL;
> continue;
> @@ -422,11 +421,10 @@ remap_all_hugepages(struct hugepage_file *hugepg_tbl,
> struct hugepage_info *hpi)
> while (i < hpi->num_pages[0]) {
>
> #ifndef RTE_ARCH_64
> - /* for 32-bit systems, don't remap 1G pages and 16G pages,
> + /* for 32-bit systems, don't remap 1G pages(16G not defined,
>* just reuse original map address as final map address.
>*/
> - if ((hugepage_sz == RTE_PGSIZE_1G)
> - || (hugepage_sz == RTE_PGSIZE_16G)) {
> + if (hugepage_sz == RTE_PGSIZE_1G) {
> hugepg_tbl[i].final_va = hugepg_tbl[i].orig_va;
> hugepg_tbl[i].orig_va = NULL;
> i++;
This patch works on IBM PPC64.
Acked-by: Chao Zhu
> On Thu, Dec 04, 2014 at 12:59:31PM +0100, Thomas Monjalon wrote:
>>>>>>> Because of different cache line size, the alignment of struct
>>>>>>> rte_kni_mbuf in rte_kni_common.h doesn't work on IBM Power. This patch
>>>>>>> changed f
This patch added prequirements, compiling options and some IBM Power related
descriptions to Linux guides.
Chao Zhu (1):
doc: Add IBM Power description to linux guides
doc/guides/linux_gsg/build_dpdk.rst |4 +-
doc/guides/linux_gsg/quick_start.rst | 40
This patch added IBM ppc_64 descriptions, including architecture
support, compiling requirements on Linux.
Signed-off-by: Chao Zhu
---
doc/guides/linux_gsg/build_dpdk.rst |4 +-
doc/guides/linux_gsg/quick_start.rst | 40 +
doc/guides/linux_gsg/sys_reqs.rst
necessary building configuration files, then DPDK can support it.
Chao Zhu (7):
Split atomic operations to architecture specific
Split byte order operations to architecture specific
Split CPU cycle operation to architecture specific
Split prefetch operations to architecture specific
Split
This patch splits the spinlock operations from DPDK and push them to
architecture specific arch directories, so that other processor
architecture to support DPDK can be easily adopted.
Signed-off-by: Chao Zhu
---
lib/librte_eal/common/Makefile |2 +-
.../common/include
This patch splits the prefetch operations from DPDK and push them to
architecture specific arch directories, so that other processor
architecture to support DPDK can be easily adopted.
Signed-off-by: Chao Zhu
---
lib/librte_eal/common/Makefile |2 +-
.../common/include
This patch splits the vector instruction based memory copy from DPDK and
push them to architecture specific arch directories, so that other
processor architecture to support DPDK can be easily adopted.
Signed-off-by: Chao Zhu
---
lib/librte_eal/common/Makefile |2
This patch splits the byte order operations from DPDK and push them to
architecture specific arch directories, so that other processor
architecture to support DPDK can be easily adopted.
Signed-off-by: Chao Zhu
---
lib/librte_eal/common/Makefile |2 +-
.../common/include
This patch splits the atomic operations from DPDK and push them to
architecture specific arch directories, so that other processor
architecture to support DPDK can be easily adopted.
Signed-off-by: Chao Zhu
---
lib/librte_eal/common/Makefile |2 +-
.../common/include
This patch splits the CPU TSC read operations from DPDK and push them to
architecture specific arch directories, so that other processor
architecture to support DPDK can be easily adopted.
Signed-off-by: Chao Zhu
---
lib/librte_eal/common/Makefile |2 +-
.../common
This patch splits CPU flags related operations from DPDK and push them
to architecture specific arch directories, so that other processor
architecture to support DPDK can be easily adopted.
Signed-off-by: Chao Zhu
---
lib/librte_eal/common/Makefile |2 +-
lib/librte_eal
To make DPDK run on IBM Power architecture, configuration files for
Power architecuture are added. Also, the compiling related .mk files are
added.
Signed-off-by: Chao Zhu
---
config/common_linuxapp_powerpc | 388 +++
config/defconfig_ppc_64-native-linuxapp
The set of patches add IBM Power architecture to the DPDK. It adds the required
support to the
EAL library. This set of patches doesn't support full function on Power
processors. Many functions
are turned off in configuratidon. More patches will be added continuesly.
Chao Zhu (12):
IBM Power architecture has different huge page sizes (16MB, 16GB) than
x86.This patch inserts RTE_PGSIZE_16M and RTE_PGSIZE_16G to the
rte_page_sizes enum variable and adds huge page size support of DPDK for
IBM Power architecture.
Signed-off-by: Chao Zhu
---
app/test/test_memzone.c
IBM Power architecture has different cache line size (128 bytes) than
x86 (64 bytes). This patch defines CACHE_LINE_SIZE to 128 bytes to
override the default value 64 bytes to support IBM Power Architecture.
Signed-off-by: Chao Zhu
---
app/test/test_malloc.c |8
app/test
iopl() call is mostly for the i386 architecture. In Power architecture.
It doesn't exist. This patch modified rte_eal_iopl_init() and make it
return -1 on Power. This means rte_config.flags will not contain
EAL_FLG_HIGH_IOPL flag on IBM Power architecture.
Signed-off-by: Chao Zhu
---
Power architecture.
Signed-off-by: Chao Zhu
---
config/defconfig_ppc_64-native-linuxapp-gcc|1 +
.../include/powerpc/arch/rte_byteorder_arch.h | 79
lib/librte_eal/common/include/rte_byteorder.h | 66
3 files changed, 146 insertions
The SSE based memory copy in DPDK only support x86. This patch adds
altivec based memory copy functions for IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/powerpc/arch/rte_memcpy_arch.h | 129
1 files changed, 129 insertions(+), 0 deletions
Intel processors contain registers to identify CPU flags, DPDK reads the
registers to get the CPU flags. IBM Power processor doesn't have such
registers. This patch uses aux vector software register to get CPU flags
and add CPU flag checking support for IBM Power architecture.
Signed-off-by:
IBM Power architecture doesn't have TSC register to get CPU cycles. This
patch implements the time base register read instead of TSC register of
x86 on IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/powerpc/arch/rte_cycles_arch.h | 67
1
The spinlock operations implemented with assembly code in DPDK only
support x86. This patch add spinlock operations for IBM Power
architecture.
Signed-off-by: Chao Zhu
---
.../include/powerpc/arch/rte_spinlock_arch.h | 88
1 files changed, 88 insertions(+), 0
IBM Power architecture has different memory architecture with x86. When
the physical memory address is in ascending order, the mmaped virtual
address is in descending order. This patch modified the memory segment
detection code to make it work for Power.
Signed-off-by: Chao Zhu
---
config
The prefetch operations implemented with assembly code in DPDK only
support x86. This patch add architecture specific prefetch operations
for IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../include/powerpc/arch/rte_prefetch_arch.h | 67
1 files changed, 67
The atomic operations implemented with assembly code in DPDK only
support x86. This patch add architecture specific atomic operations for
IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/powerpc/arch/rte_atomic.h | 387
.../common/include
Really sorry for the delay.
Originally, I thought the email was to asking the ABI checking tools on
Power which I'm not so familiar with. So this took me some time to find
solution. For Power little endian, the build is OK. I'll give feedback
when I tried Big endian compilation.
On 2015/7/31
onroy ; Chao Zhu
; 'Gowrishankar'
Cc: dev@dpdk.org; 'Bruce Richardson' ; 'David
Marchand'
Subject: Re: [dpdk-dev] [PATCH] eal/ppc: fix secondary process to map hugepages
in correct order
There was no follow-up on this discussion.
Please, what is the conclusion?
2016-
-Original Message-
From: Gowrishankar [mailto:gowrishanka...@linux.vnet.ibm.com]
Sent: 2017年2月23日 12:39
To: dev@dpdk.org
Cc: Chao Zhu ; Helin Zhang
; Jingjing Wu ; Thomas
Monjalon ; Pradeep ;
Gowrishankar Muthukrishnan
Subject: [PATCH v4] i40e: implement vector PMD for altivec
From
-Original Message-
From: Gowrishankar [mailto:gowrishanka...@linux.vnet.ibm.com]
Sent: 2017年3月6日 23:04
To: dev@dpdk.org
Cc: Chao Zhu ; Anatoly Burakov
; Thomas Monjalon ;
Gowrishankar Muthukrishnan
Subject: [PATCH v3] eal: sPAPR IOMMU support in pci probing for vfio-pci in
ppc64le
From
> From: Gowrishankar [mailto:gowrishanka...@linux.vnet.ibm.com]
> Sent: 2017年3月6日 23:04
> To: dev@dpdk.org
> Cc: Chao Zhu ; Anatoly Burakov
> ; Thomas Monjalon
> ; Gowrishankar Muthukrishnan
>
> Subject: [PATCH v3] eal: sPAPR IOMMU support in pci probing for vfio-pc
Thomas,
Thanks for the reminder! I changed the mailer settings and acked again.
> -Original Message-
> From: Thomas Monjalon [mailto:thomas.monja...@6wind.com]
> Sent: 2017年3月7日 21:08
> To: Chao Zhu
> Cc: 'Gowrishankar' ; dev@dpdk.org;
> 'Anatoly Burako
nr_overcommit_hugepages to expand the VA range. When
doing the initilization, users need to set both nr_hugepages and
nr_overcommit_hugepages to the same value, like 64, 128, etc.
Signed-off-by: Chao Zhu
---
lib/librte_eal/linuxapp/eal/eal_memory.c | 8
1 file changed, 8 insertions(+)
diff
This patch adds additional instructions for hugepage reservation on IBM
POWER.
Signed-off-by: Chao Zhu
---
doc/guides/linux_gsg/sys_reqs.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/doc/guides/linux_gsg/sys_reqs.rst
b/doc/guides/linux_gsg/sys_reqs.rst
index 61222c6..3a28c9e
Due to mmap implementation on IBM POWER, the secondary process memory
initialization may fail (mmap will not respect the required address hints).
This patch sets add the fixes and guides to fix this problem.
Chao Zhu (2):
eal/ppc: fix mmap for memory initialization
doc/guides: Add hugepage
e not enough space for mmap twice in DPDK.
That's why we need to set the overcommit to expand the address space.
> -Original Message-
> From: Sergio Gonzalez Monroy [mailto:sergio.gonzalez.mon...@intel.com]
> Sent: 2017年4月6日 20:59
> To: Chao Zhu ; dev@dpdk.org
> Cc: Gow
40e_rxtx.c| 30 ++-
> drivers/net/i40e/i40e_rxtx.h| 3 +-
> drivers/net/i40e/i40e_rxtx_vec_altivec.c| 22 +-
> drivers/net/i40e/i40e_rxtx_vec_neon.c | 8 +-
> drivers/net/i40e/i40e_rxtx_vec_sse.c| 14 +-
> drivers/net/i40e/rte_pmd_i40e.c
> -Original Message-
> From: Jerin Jacob [mailto:jerin.ja...@caviumnetworks.com]
> Sent: 2017年5月11日 18:11
> To: dev@dpdk.org
> Cc: tho...@monjalon.net; jianbo@linaro.org; vikto...@rehivetech.com;
> Jerin Jacob ; Chao Zhu
>
> Subject: [dpdk-dev] [PATCH 5
Confirmed. It can compile on Power8 Big Endian.
Thank you!
On 2015/8/3 10:39, Chao Zhu wrote:
>
> Really sorry for the delay.
> Originally, I thought the email was to asking the ABI checking tools
> on Power which I'm not so familiar with. So this took me some time to
>
The using of rte_cpu_to_le_32() in pre-compile macros will cause error
'initializer element is not constant' on big endian platforms. This patch
fixes the compilation error of fm10k driver.
Chao Zhu (1):
fm10k: fix the compilation on big endian platforms
drivers/net/fm10k/base/f
The rte_cpu_to_le_32 function can't be used to define const variables
because it has different implementation on big endian platforms. If
doing so, it will cause 'initializer element is not constant' compiling
error. This patch fixes this problem.
Signed-off-by: Chao Zhu
---
dr
This patch add the definiton of tsc union for POWER8 PPC64 little endian
architecture.
Chao Zhu (1):
PPC64: add cpu cycle support to IBM POWER8 PPC64LE
.../common/include/arch/ppc_64/rte_cycles.h|5 +
1 files changed, 5 insertions(+), 0 deletions(-)
On IBM POWER8 PPC64 little endian architecture, the definition of tsc
union will be different. This patch fix this to enable the right output
from rte_rdtsc().
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_cycles.h|5 +
1 files changed, 5 insertions(+), 0
Got it. Thanks!
On 2015/8/3 16:53, Thomas Monjalon wrote:
> 2015-08-03 14:31, Chao Zhu:
>> The using of rte_cpu_to_le_32() in pre-compile macros will cause error
>> 'initializer element is not constant' on big endian platforms. This patch
>> fixes the co
On 2015/8/3 17:06, Thomas Monjalon wrote:
> 2015-08-03 14:31, Chao Zhu:
>> The rte_cpu_to_le_32 function can't be used to define const variables
>> because it has different implementation on big endian platforms. If
>> doing so, it will cause 'initializer ele
Acked-by: Chao Zhu
On 2015/8/5 17:13, Thomas Monjalon wrote:
> Byte ordering macros were used without including the needed header.
>
> Fixes: ce10b21bf624 ("eal/ppc: fix cpu cycle count for little endian")
>
> Signed-off-by: Thomas Monjalon
> ---
> lib/librte
work on POWER8 bare metal little endian machine.
Signed-off-by: Chao Zhu
---
config/common_linuxapp |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/config/common_linuxapp b/config/common_linuxapp
index 0de43d5..82a027e 100644
--- a/config/common_linuxapp
+++ b/config
This patch fixes the compile errors caused by lacking of "size_t" definition in
rte_hash.h.
Signed-off-by: Chao Zhu
---
lib/librte_hash/rte_hash.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/lib/librte_hash/rte_hash.h b/lib/librte_hash/rte_hash.h
ind
Jerin,
Both stdio.h and stddef.h works on POWER. To make it work on ARM, I'll
use stddef.h and submit another patch.
Thanks!
On 2015/12/8 17:10, Jerin Jacob wrote:
> On Tue, Dec 08, 2015 at 04:28:52PM +0800, Chao Zhu wrote:
>> This patch fixes the compile errors caused by lack
known type name
?rte_hash_cmp_eq_t?
void rte_hash_set_cmp_func(struct rte_hash *h, rte_hash_cmp_eq_t func);
Signed-off-by: Chao Zhu
---
lib/librte_hash/rte_hash.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/lib/librte_hash/rte_hash.h b/lib/librte_hash/rte_hash.h
index 6494ade.
-邮件原件-
发件人: Jerin Jacob
发送时间: 2018年10月7日 14:19
收件人: Chao Zhu
抄送: dev@dpdk.org; tho...@monjalon.net; gowrishanka...@linux.vnet.ibm.com;
ola.liljed...@arm.com; Jerin Jacob
主题: [dpdk-dev] [PATCH] eal/ppc64: add support for rte pause
Add support for rte_pause() implementation for ppc64
Signed-off-by: Chao Zhu
---
drivers/net/i40e/i40e_rxtx_vec_altivec.c | 35 ++
lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c | 34 ++---
lib/librte_eal/common/arch/ppc_64/rte_cycles.c | 4 +++
.../common/include/arch/ppc_64/rte_atomic.h
.h */
> +#define bool _Bool
> +#endif
> +
> /* Bit-field manipulation. */
> #define BITFIELD_DECLARE(bf, type, size) \
> type bf[(((size_t)(size) / (sizeof(type) * CHAR_BIT)) + \
> --
> 2.19.0
Verified, it works. Thanks!
Acked-by: Chao Zhu
_neon.c
> F: drivers/net/i40e/i40e_rxtx_vec_neon.c
> F: drivers/net/virtio/virtio_rxtx_simple_neon.c
>
> -IBM POWER
> +IBM POWER (alpha)
> M: Chao Zhu
> F: lib/librte_eal/common/arch/ppc_64/
> F: lib/librte_eal/common/include/arch/ppc_64/
> diff --git a/doc/gui
I think this patch is good enough to solve the confliction issue.
> -Original Message-
> From: Christian Ehrhardt [mailto:christian.ehrha...@canonical.com]
> Sent: 2018年8月30日 20:00
> To: adrien.mazarg...@6wind.com; dev ; Gowrishankar
> Muthukrishnan ; Chao Zhu
>
&
ginal Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: 2018年8月30日 16:37
> To: Christian Ehrhardt ; Gowrishankar
> Muthukrishnan ; Chao Zhu
> ; prad...@us.ibm.com; Alfredo Mendoza
> ; Gowrishankar Muthukrishnan
> ; Gowrishankar Muthukrishnan
&g
We’ll have internal discussion and push it.
Thanks!
From: Christian Ehrhardt [mailto:christian.ehrha...@canonical.com]
Sent: 2018年8月31日 13:15
To: Chao Zhu
Cc: adrien.mazarg...@6wind.com; dev ; Gowrishankar Muthukrishnan
; Luca Boccassi ; Thomas
Monjalon
Subject: Re: [PATCH v3] ppc64: fix
7;)
> diff --git a/lib/librte_eal/common/include/arch/ppc_64/meson.build
> b/lib/librte_eal/common/include/arch/ppc_64/meson.build
> new file mode 100644
> index 000000..00f9611768
> --- /dev/null
> +++ b/lib/librte_eal/common/include/arch/ppc_64/meson.build
> @@ -0,0 +1,16 @@
> +# SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2018 Luca
> +Boccassi
> +
> +install_headers(
> + 'rte_atomic.h',
> + 'rte_byteorder.h',
> + 'rte_cpuflags.h',
> + 'rte_cycles.h',
> + 'rte_io.h',
> + 'rte_memcpy.h',
> + 'rte_pause.h',
> + 'rte_prefetch.h',
> + 'rte_rwlock.h',
> + 'rte_spinlock.h',
> + 'rte_vect.h',
> + subdir: get_option('include_subdir_arch'))
> --
> 2.18.0
Acked-by: Chao Zhu
+Pradeep
> -Original Message-
> From: Thomas Monjalon
> Sent: Monday, February 18, 2019 11:47 PM
> To: David Wilder
> Cc: dev@dpdk.org; chao...@linux.vnet.ibm.com
> Subject: Re: [dpdk-stable] [PATCH v3] mem: Fix anonymous mapping on
> Power9.
>
> Hi,
>
> Long time no talk about the IBM P
Which version are you using?
> -Original Message-
> From: Xueming(Steven) Li [mailto:xuemi...@mellanox.com]
> Sent: 2017年8月31日 22:40
> To: Chao Zhu
> Cc: dev@dpdk.org
> Subject: multi-process shared memory on PPC
>
> Hi all,
>
> I'm testing mult
ge-
> From: Xueming(Steven) Li [mailto:xuemi...@mellanox.com]
> Sent: 2017年8月31日 22:40
> To: Chao Zhu
> Cc: dev@dpdk.org
> Subject: multi-process shared memory on PPC
>
> Hi all,
>
> I'm testing multi-process example on PowerPC system, looks like shared
> me
..@linux.vnet.ibm.com; Jerin Jacob
>
> Subject: [dpdk-dev] [PATCH 2/5] eal/ppc64: define architecture specific
rdtsc hz
>
> CC: Chao Zhu
> Signed-off-by: Jerin Jacob
> ---
> lib/librte_eal/common/include/arch/ppc_64/rte_cycles.h | 13 +
> 1 file changed, 13 i
> -Original Message-
> From: Gowrishankar [mailto:gowrishanka...@linux.vnet.ibm.com]
> Sent: 2017年9月21日 18:05
> To: dev@dpdk.org
> Cc: Chao Zhu ; Tomasz Kantecki
> ; Gowrishankar Muthukrishnan
>
> Subject: [PATCH v2] examples/l3fwd: optimised packet process
v;
>
> auxv_fd = open("/proc/self/auxv", O_RDONLY);
> - assert(auxv_fd);
> + assert(auxv_fd != -1);
> while (read(auxv_fd, &auxv,
> sizeof(Elf64_auxv_t)) == sizeof(Elf64_auxv_t)) {
> if (auxv.a_type == AT_HWCAP)
> --
> 2.14.1
Acked-by: Chao Zhu
t; Â > Subject: Re: [dpdk-dev] Huge mapping secondary process linux
> > > > > Â >
> > > > > Â > On 27-Oct-17 1:43 PM, Jonas Pfefferle1 wrote:
> > > > > Â > >
> > > > > Â > >
> > > > > Â > > Hi @all
From: Jonas Pfefferle1 [mailto:j...@zurich.ibm.com]
Sent: 2017年11月7日 18:16
To: Chao Zhu
Cc: 'Burakov, Anatoly' ; bruce.richard...@intel.com;
dev@dpdk.org
Subject: RE: [dpdk-dev] Huge mapping secondary process linux
"Chao Zhu" mailto:chao...@linux.vnet.ibm.com>
> -Original Message-
> From: Gowrishankar [mailto:gowrishanka...@linux.vnet.ibm.com]
> Sent: 2018年1月30日 16:59
> To: dev@dpdk.org
> Cc: Chao Zhu ; tho...@monjalon.net;
> Gowrishankar Muthukrishnan
> Subject: [PATCH] eal/ppc64: revert implement arch-specific TSC
The previous patch has some misunderstanding of the the TSC frequency
counting.
I support this.
> -Original Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: 2018年2月1日 8:30
> To: Gowrishankar ; Chao Zhu
>
> Cc: dev@dpdk.org
> Subject: Re: [dpdk-d
Thomas,
I think it's OK to apply this patch now. It's been verified before and it's
important for the correctness of the cycle counting on POWER.
Thank you!
> -Original Message-
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: 2018年2月7日 15
> -Original Message-
> From: Lee Daly [mailto:lee.d...@intel.com]
> Sent: 2018年1月17日 22:39
> To: olivier.m...@6wind.com; remy.hor...@intel.com; or...@mellanox.com;
> bruce.richard...@intel.com; pablo.de.lara.gua...@intel.com;
> radu.nico...@intel.com; tomasz.kante...@intel.com;
> cristian
> -Original Message-
> From: Gowrishankar [mailto:gowrishanka...@linux.vnet.ibm.com]
> Sent: 2018年2月27日 23:14
> To: dev@dpdk.org
> Cc: Chao Zhu ; sta...@dpdk.org;
> tho...@monjalon.net; Gowrishankar Muthukrishnan
>
> Subject: [PATCH] eal/ppc: fix rte_smp_mb for
This patch defines the target and arch value of objcopy program for
IBM POWER PPC64 little endian architecture. This is a fix of the
original patch proposed by Jan Viktorin .
Signed-off-by: Chao Zhu
---
mk/arch/ppc_64/rte.vars.mk |5 +
1 files changed, 5 insertions(+), 0 deletions
Nelio,
I'll check. Thanks!
-Original Message-
From: N?lio Laranjeiro [mailto:nelio.laranje...@6wind.com]
Sent: 2016?6?22? 20:31
To: Cristian Dumitrescu ; Chao Zhu
Cc: dev at dpdk.org
Subject: librte_meter compilation fails on IBM Power8
Hi Cristian, Chao,
I have encounte
el.com]
Sent: 2016?6?24? 1:26
To: N?lio Laranjeiro ; Chao Zhu
Cc: dev at dpdk.org
Subject: RE: librte_meter compilation fails on IBM Power8
> -Original Message-
> From: N?lio Laranjeiro [mailto:nelio.laranjeiro at 6wind.com]
> Sent: Wednesday, June 22, 2016 1:31 PM
> To: Dumit
Signed-off-by: Chao Zhu
---
MAINTAINERS |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 54f0973..8fe52c5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -105,7 +105,8 @@ F: app/test/test_mp_secondary.c
F: examples/multi_process/
F: doc
Thomas,
Sorry for the delay. I'll push the updated patches to the mail list
before next Monday.
Thanks a lot!
Best Regards!
--
Chao Zhu
On 2014/11/13 18:24, Thomas Monjalon wrote:
> Hi Chao,
>
> 2014-09-26 05:36, Chao Zhu:
>> The set of p
The set of patches add IBM Power architecture to the DPDK. It adds the required
support to the
EAL library. This set of patches doesn't support full DPDK function on Power
processors. Many
functions are turned off in configuratidon file. More patches will be added
continuesly.
Chao Zh
To make DPDK run on IBM Power architecture, configuration files for
Power architecuture are added. Also, the compiling related .mk files are
added.
Signed-off-by: Chao Zhu
---
config/common_linuxapp_powerpc | 394 +++
config/defconfig_ppc_64-power8-linuxapp
This patch adds architecture specific atomic operation file for IBM
Power architecture CPU.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_atomic.h| 415
1 files changed, 415 insertions(+), 0 deletions(-)
create mode 100644 lib/librte_eal/common
This patch adds architecture specific byte order operations for IBM Power
architecture. Power architecture support both big endian and little
endian. This patch also adds a RTE_ARCH_BIG_ENDIAN micro.
Signed-off-by: Chao Zhu
---
config/defconfig_ppc_64-power8-linuxapp-gcc|1
IBM Power architecture doesn't have TSC register to get CPU cycles. This
patch implements the time base register read instead of TSC register of
x86 on IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_cycles.h| 86
1
This patch add architecture specific prefetch operations for IBM Power
architecture.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_prefetch.h | 61
1 files changed, 61 insertions(+), 0 deletions(-)
create mode 100644 lib/librte_eal/common/include
This patch adds spinlock operations for IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_spinlock.h | 73
1 files changed, 73 insertions(+), 0 deletions(-)
create mode 100644 lib/librte_eal/common/include/arch/ppc_64
The SSE based memory copy in DPDK only support x86. This patch adds
altivec based memory copy functions for IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_memcpy.h| 223
1 files changed, 223 insertions(+), 0 deletions
IBM Power processor doesn't have CPU flag hardware registers. This patch
uses aux vector software register to get CPU flags and add CPU flag
checking support for IBM Power architecture.
Signed-off-by: Chao Zhu
---
app/test/test_cpuflags.c | 35
.../c
ff-by: Chao Zhu
---
lib/librte_eal/linuxapp/eal/eal.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/lib/librte_eal/linuxapp/eal/eal.c
b/lib/librte_eal/linuxapp/eal/eal.c
index 7a1d087..0bf81be 100644
--- a/lib/librte_eal/linuxapp/eal/eal.c
+++ b/lib/librte_eal/lin
IBM Power architecture has different cache line size (128 bytes) than
x86 (64 bytes). This patch defines CACHE_LINE_SIZE to 128 bytes to
override the default value 64 bytes to support IBM Power Architecture.
Signed-off-by: Chao Zhu
---
app/test/test_malloc.c |8
mk/arch/ppc_64
IBM Power architecture has different huge page sizes (16MB, 16GB) than
x86.This patch defines RTE_PGSIZE_16M and RTE_PGSIZE_16G in the
rte_page_sizes enum variable and adds huge page size support of DPDK
for IBM Power architecture.
Signed-off-by: Chao Zhu
---
app/test/test_memzone.c
defination for 64 bit systems.
Signed-off-by: Chao Zhu
---
config/defconfig_ppc_64-power8-linuxapp-gcc |1 +
config/defconfig_x86_64-native-linuxapp-clang |1 +
config/defconfig_x86_64-native-linuxapp-gcc |1 +
config/defconfig_x86_64-native-linuxapp-icc |1 +
lib
le on PPC64 architecture, GCC version >= 4.8 must be used. This v3 patch
updates eal_memory.c
to fix the memory zone allocation and also solves the compiling problems of
test-pmd.
Chao Zhu (14):
Add compiling definations for IBM Power architecture
Add atomic operations for IBM Power arch
To make DPDK run on IBM Power architecture, configuration files for
Power architecuture are added. Also, the compiling related .mk files are
added.
Signed-off-by: Chao Zhu
---
config/common_linuxapp_powerpc | 394 +++
config/defconfig_ppc_64-power8-linuxapp
This patch adds architecture specific byte order operations for IBM Power
architecture. Power architecture support both big endian and little
endian. This patch also adds a RTE_ARCH_BIG_ENDIAN micro.
Signed-off-by: Chao Zhu
---
config/defconfig_ppc_64-power8-linuxapp-gcc|1
This patch adds architecture specific atomic operation file for IBM
Power architecture CPU.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_atomic.h| 415
1 files changed, 415 insertions(+), 0 deletions(-)
create mode 100644 lib/librte_eal/common
This patch add architecture specific prefetch operations for IBM Power
architecture.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_prefetch.h | 61
1 files changed, 61 insertions(+), 0 deletions(-)
create mode 100644 lib/librte_eal/common/include
IBM Power architecture doesn't have TSC register to get CPU cycles. This
patch implements the time base register read instead of TSC register of
x86 on IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_cycles.h| 86
1
This patch adds spinlock operations for IBM Power architecture.
Signed-off-by: Chao Zhu
---
.../common/include/arch/ppc_64/rte_spinlock.h | 73
1 files changed, 73 insertions(+), 0 deletions(-)
create mode 100644 lib/librte_eal/common/include/arch/ppc_64
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