[seL4] using libmuslc library question

2018-08-03 Thread Leonid Meyerovich
Hello, I have tried to call usleep() function from seL4 'main' thread and it crashes the system with error: Caught cap fault in send phase at address 0x0 while trying to handle: vm fault on code at address 0x200 with status 0x8206 in thread 0xff807bfe2200 "rootserver" at address 0x200 With s

[seL4] sel4 thread creation problem

2018-08-07 Thread Leonid Meyerovich
Hello, My platform is ARM (zynqmp), seL4 v8. I have created a timer in simple initial thread: int err; seL4_timer_t timer; vka_object_t ntfn_object; ntfn_object.cptr = 0; err = vka_alloc_notification(&_env.vka, &ntfn_object); assert(err == 0); err = sel4platsuppo

Re: [seL4] sel4 thread creation problem

2018-08-08 Thread Leonid Meyerovich
Hi Anna, I have found the problem - SP for a newly created thread was wrong. Thanks you, Leonid From: anna.ly...@data61.csiro.au Sent: Tuesday, August 7, 2018 7:39 PM To: Leonid Meyerovich ; devel@sel4.systems Subject: Re: sel4 thread creation problem Hi Leonid, It looks like you haven&#

Re: [seL4] sel4 thread creation problem

2018-08-09 Thread Leonid Meyerovich
_get_cnode_size_bits(&penv->simple).words[0]); + error = seL4_TCB_Configure(tcb_object.cptr, , seL4_NilData, cspace_cap, guard, pd_cap, seL4_NilData, ipc_buffer, ipc_page); Cheers, Anna. From: Devel mailto:devel-bounces@sel4.systems>> on b

[seL4] create process in seL4

2018-08-15 Thread Leonid Meyerovich
Hello, Is there any way to define untyped size while creating process using library functions? process_config_default_simple(simple_t *simple, const char *image_name, uint8_t prio) sel4utils_configure_process_custom(sel4utils_process_t *process, vka_t *vka, vspace_t *spawner_vspace, sel4utils_

Re: [seL4] create process in seL4

2018-08-16 Thread Leonid Meyerovich
; config.num_reservations = num_reservations; return config; } Thank you, Leonid From: anna.ly...@data61.csiro.au Sent: Wednesday, August 15, 2018 8:37 PM To: Leonid Meyerovich ; devel@sel4.systems Subject: Re: create process in seL4 Hi Leonid, I don't understand your first question, which untype

[seL4] building sel4test for zynqmp platform

2018-08-25 Thread Leonid Meyerovich
Hello, I have tried to build sel4test following 'running SEL4' instruction. It was successful for x86 platform, but when I try to build it for 'zyncmp' I've got an error: gcc: error: unrecognized command line option '-marm'; did you mean '-mabm'? gcc: error: unrecognized command line option '-m

Re: [seL4] Network lwip for imx6

2018-12-10 Thread Leonid Meyerovich
Hi Chris, I have downloaded http-server example for imx6 (I am working on zynqmp), just to use it as a reference to see how did you implement a synchronization functions, but I didn’t find these function to be implemented. Is this example not complete? Thanks you, Leonid From: Devel On Beha

[seL4] seL4 process memory utilization

2019-04-18 Thread Leonid Meyerovich
Hello, Is there any way in seL4 (library function?) to check free heap memory? Thank you, Leonid This message and all attachments are PRIVATE, and contain information that is PROPRIETARY to Intelligent Automation, Inc. You are not authorized to transmit or ot

Re: [seL4] seL4 process memory utilization

2019-04-24 Thread Leonid Meyerovich
son > wrote: > > Signed PGP part > At 2019-04-17T12:21:41+, Leonid Meyerovich wrote: >> Is there any way in seL4 (library function?) to check free heap memory? > > My understanding is that there is not, because the seL4 microkernel > does not implement a memory manager.

Re: [seL4] seL4 process memory utilization

2019-04-25 Thread Leonid Meyerovich
Thank you, I’ll look into it. From: Matthew Fernandez Sent: Thursday, April 25, 2019 11:15 AM To: Leonid Meyerovich Cc: Heiser, Gernot (Data61, Kensington NSW) ; devel@sel4.systems Subject: Re: [seL4] seL4 process memory utilization On 24 Apr 2019, at 07:20, Leonid Meyerovich

[seL4] xilinx ultrascale+: Spurious interrupt

2019-06-04 Thread Leonid Meyerovich
Hello Everybody, Petalinux is running on VM on the one of the core of Xilinx Ultrascale+ (A53) >From time to time I see Spurious Interrupt message from seL4 kernel >(handleInterruptEntry) <> <> <> Could somebody explain why it may happen? How to debug it? Thank you, Leonid __

[seL4] Zynq UltraScale+ locks up after hours running

2019-10-02 Thread Leonid Meyerovich
Hello, We are running seL4 microkernel on 4 cores Zynq UltraScale+ (zcu102 board). The implementation includes multiple processes, hypervisor and virtual machine running on dedicated core. After several hours running (it could be 2 or even 8 hours) the whole microkernel locks up. After some inv

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-03 Thread Leonid Meyerovich
ystem is also locked from time to time but with lower rate. Thank you, Leonid -Original Message- From: Mcleod, Kent (Data61, Kensington NSW) Sent: Wednesday, October 2, 2019 11:50 PM To: Leonid Meyerovich ; devel@sel4.systems Subject: Re: [seL4] Zynq UltraScale+ locks up after hours ru

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-03 Thread Leonid Meyerovich
e messages from inside of ISR after getting time interrupt (print interrupt counter once a second) and I don't see these messages when the system locks up. Thank you, Leonid -Original Message- From: Shen, Yanyan (Data61, Kensington NSW) Sent: Thursday, October 3, 2019 2:44 AM To: Le

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-03 Thread Leonid Meyerovich
of the another excerpt -Original Message- From: Shen, Yanyan (Data61, Kensington NSW) Sent: Thursday, October 3, 2019 2:44 AM To: Leonid Meyerovich ; devel@sel4.systems Subject: Re: [seL4] Zynq UltraScale+ locks up after hours running Hi Leonid, Could you provide a bit more about your softwa

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-03 Thread Leonid Meyerovich
I forgot to mention: my board is zcu102, 4 cores A53 -Original Message- From: Devel On Behalf Of Leonid Meyerovich Sent: Thursday, October 3, 2019 2:40 PM To: Shen, Yanyan (Data61, Kensington NSW) ; devel@sel4.systems Subject: Re: [seL4] Zynq UltraScale+ locks up after hours running Hi

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-03 Thread Leonid Meyerovich
Thank you, Chris. Now I understand. I was confused, because in kernel/include/plat/zynqmp/plat/machine.h these interrupts are commented out Leonid -Original Message- From: Chris Guikema Sent: Thursday, October 3, 2019 3:44 PM To: Leonid Meyerovich ; Shen, Yanyan (Data61, Kensington

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
8:16 AM To: Leonid Meyerovich ; devel@sel4.systems Subject: RE: [seL4] Zynq UltraScale+ locks up after hours running Hi Leonid, What do you mean by "hypervisor on core 0"? Do you mean the VMM? I assume you create a VMM for each VM running, and also pin the VMMs on the corresponding p

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
sec) to R5 (openAmp). VMM is running on core 0 and VMs are running on core 1 and 2. Thanks, Leonid -Original Message- From: Shen, Yanyan (Data61, Kensington NSW) Sent: Friday, October 4, 2019 8:58 AM To: Leonid Meyerovich ; devel@sel4.systems Subject: RE: [seL4] Zynq UltraScale+ locks up a

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
Hi Yanyan, The interrupts is disabled in kernel mode, is there any circumstances that it will not be enabled before returning to userland? Thanks, Leonid -Original Message- From: Shen, Yanyan (Data61, Kensington NSW) Sent: Friday, October 4, 2019 8:58 AM To: Leonid Meyerovich ; devel

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
2019 9:49 AM To: Leonid Meyerovich ; devel@sel4.systems Subject: RE: [seL4] Zynq UltraScale+ locks up after hours running Hi Leonid, It looks like the seL4 v8.0.0 does not include Armv8 virtualization extension support yet ... So basically you wrote the VMM based on the libsel4armvmm? I am

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
interrupt and communicate with each other. Thanks, Leonid -Original Message- From: Shen, Yanyan (Data61, Kensington NSW) Sent: Friday, October 4, 2019 9:57 AM To: Leonid Meyerovich ; devel@sel4.systems Subject: RE: [seL4] Zynq UltraScale+ locks up after hours running HI Leonid, You mean

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
Hi Yanyan, It would explain everything. How to proof/disprove it? Thanks, Leonid -Original Message- From: Shen, Yanyan (Data61, Kensington NSW) Sent: Friday, October 4, 2019 10:11 AM To: Leonid Meyerovich ; devel@sel4.systems Subject: RE: [seL4] Zynq UltraScale+ locks up after hours

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
counter to estimate the time waiting for big lock. Thanks, Leonid -Original Message- From: Shen, Yanyan (Data61, Kensington NSW) Sent: Friday, October 4, 2019 10:35 AM To: Leonid Meyerovich ; devel@sel4.systems Subject: RE: [seL4] Zynq UltraScale+ locks up after hours running Hi Leonid, It

Re: [seL4] Zynq UltraScale+ locks up after hours running

2019-10-04 Thread Leonid Meyerovich
Meyerovich ; devel@sel4.systems Subject: Re: [seL4] Zynq UltraScale+ locks up after hours running Hi Leonid, Yes I mean CPU cycle counters. Regards, Yanyan From: Leonid Meyerovich mailto:lmeyerov...@i-a-i.com>> Sent: Friday, October 4, 2019 11:00:31 PM To

[seL4] seL4 fault handling

2024-01-22 Thread Leonid Meyerovich
Hello, Where can I find a comprehensive description of fault message registers for every of the following faults enum seL4_Fault_tag { seL4_Fault_NullFault = 0, seL4_Fault_CapFault = 1, seL4_Fault_UnknownSyscall = 2, seL4_Fault_UserException = 3, seL4_Fault_VMFault = 5, se

[seL4] Re: seL4 fault handling

2024-01-23 Thread Leonid Meyerovich
ttps://github.com/seL4/seL4/blob/master/include/arch/arm/arch/64/mode/machine/registerset.h#L177 > https://github.com/seL4/seL4/blob/master/src/arch/arm/api/faults.c#L33 > > - Alwin > > -- > *From:* Leonid Meyerovich > *Sent:* Tuesday, January

[seL4] seL4 fault processing

2024-01-24 Thread Leonid Meyerovich
My root task (root thread created by kernel) checks for fault from the other threads, which are created in root thread with badged fault_ep seL4_Word badge; seL4_MessageInfo_t messageInfo = seL4_NBRecv(init_objects.fault_cap, &badge); if (seL4_MessageInfo_get_label(messageInfo) != seL4

[seL4] seL4 root task executable memory region

2024-01-24 Thread Leonid Meyerovich
I assume that the code segment of the root task starts from __executable_start address. Does it point to ELF header? Or code starts directly from this address? Thank you, ___ Devel mailing list -- devel@sel4.systems To unsubscribe send an email to devel-

[seL4] Re: seL4 fault processing

2024-01-24 Thread Leonid Meyerovich
I don't have any faults if I use seL4_Recv instead (in a separate thread). It happens only if I use seL4_NBRecv and check the tag after it returns. I use AARCH64 On Wed, Jan 24, 2024 at 3:59 PM Alwin Joshy wrote: > Which architecture are you on and are you using the hardware debug API? I >

[seL4] Re: seL4 fault processing

2024-01-25 Thread Leonid Meyerovich
Thank you On Thu, Jan 25, 2024 at 7:09 AM Indan Zupancic wrote: > Hello Leonid, > > On 2024-01-24 21:16, Leonid Meyerovich wrote: > > I don't have any faults if I use seL4_Recv instead (in a separate > > thread). > > It happens only if I use seL4_NBRecv and ch

[seL4] fault processing

2024-01-26 Thread Leonid Meyerovich
I am working on fault processing. When I am a fault I am calling void sel4utils_print_fault_message(seL4_MessageInfo_t tag, const char *thread_name) from sel4libsutils library I have tested it for "page fault" condition and it works fine - I am getting seL4_Fault_VMFault fault type But in certain

[seL4] Fwd: fault processing

2024-01-26 Thread Leonid Meyerovich
Just some addition: I have found function seL4_Fault_VCPUFault_get_HSR(seL4_Fault_t seL4_Fault) It gives me the value of HSR register, but how can I get fault address and some other (if exist) information? Thanks, -- Forwarded message - From: Leonid Meyerovich Date: Fri, Jan 26

[seL4] Fwd: fault processing

2024-01-26 Thread Leonid Meyerovich
It gives me the value of HSR register, but how can I get fault address and some other (if exist) information? Thanks, -- Forwarded message - From: Leonid Meyerovich Date: Fri, Jan 26, 2024 at 11:35 AM Subject: fault processing To: I am working on fault processing. When I am a

[seL4] root task executable memory changed

2024-02-06 Thread Leonid Meyerovich
Hello, I have a seL4 project that creates a number of processes with multiple threads. An application works fine. Every process periodically calculates the checksum of the executable segment and the system (Monitor process) keeps track that these values should be the same over the time. Some time

[seL4] Re: root task executable memory changed

2024-02-07 Thread Leonid Meyerovich
Physical address: 0x0 Size in file: 0 bytes Size in memory: 0 bytes Alignment: 16 On Wed, Feb 7, 2024 at 9:24 AM Indan Zupancic wrote: > Hello Leonid, > > On 2024-02-06 19:48, Leonid Meyerovich wrote: > > Some time when I change (add) some code in amu process I have an

[seL4] Re: root task executable memory changed

2024-02-07 Thread Leonid Meyerovich
nid, > > On 2024-02-07 18:15, Leonid Meyerovich wrote: > > Using readelf helps, but I think there is some difference between > > running readelf on the file and > > parsing elf header in the memory (because my root process is already > > in the memory) > > As you can

[seL4] Re: root task executable memory changed

2024-02-08 Thread Leonid Meyerovich
Thank you Indan. On Thu, Feb 8, 2024 at 7:47 AM Indan Zupancic wrote: > Hello Leonid, > > On 2024-02-07 20:19, Leonid Meyerovich wrote: > > Yes I see all my other tasks have different flags for segment 0 - RE, > > Startup flag is RWI > > Is there any document tha

[seL4] sel4test CACHEFLUSH0001 failed

2024-03-28 Thread Leonid Meyerovich
Hello, I run sel4test on the aarch64 platform. My CACHEFLUSH0001 test in sel4test failed /* Clean makes data observable to non-cached page */ *ptr = 0xC0FFEE; *ptrc = 0xDEADBEEF; test_assert(*ptr == 0xC0FFEE); test_assert(*ptrc == 0xDEADBEEF); I have tried to make to 'improve' memory/cache coh

[seL4] Re: sel4test CACHEFLUSH0001 failed

2024-03-29 Thread Leonid Meyerovich
M Indan Zupancic wrote: > Hello Leonid, > > On 2024-03-28 20:18, Leonid Meyerovich wrote: > > I run sel4test on the aarch64 platform. > > What CPU are you testing on? > > > My CACHEFLUSH0001 test in sel4test failed > > /* Clean makes data observable to non

[seL4] seL4 multicore boot failed on arm64

2024-04-25 Thread Leonid Meyerovich
Hello, I run my seL4 application on 4 core ARMv8. Recently I have developed some more application code (I mention it because file system size is increased an I believe it may change boot time) and from time to time I observed that boot process failed (stuck after the following print) calling sch

[seL4] Re: seL4 multicore boot failed on arm64

2024-05-09 Thread Leonid Meyerovich
t see node_boot_lock changes and don't start initialization. I have removed BOOT_BSS and it is booted properly now Thanks, Leonid On Fri, May 3, 2024 at 8:13 AM Indan Zupancic wrote: > Hello Leonid, > > On 2024-04-25 21:37, Leonid Meyerovich wrote: > > I run my seL4 ap