Add fsl,imx6q-usbphy for imx6dq and imx6dl, add
fsl,imx6sl-usbphy for imx6sl.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
Documentation/devicetree/bindings/usb/mxs-phy.txt |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git
With the auto setting, the PHY's clock and power can be
recovered correctly from low power mode, it is ganranteed by IC logic.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 20 +---
1 files changed, 17 insertions(+), 3 deletions(-)
diff
The mxs-phy has several bugs and features at different
versions, the driver code can get it through of_device_id.data.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 58 ++--
1 files changed, 49 insertions(+), 9
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git
Hi Felipe Shawn,
The serial adds power management support for MXS PHY, it includes:
- Add three common PHY APIs, .set_wakeup, .notify_suspend, notify_resume.
- Related above API implementation at mxs phy driver
- misc changes and bug fixes for mxs phy to support low power mode and wakeup.
It
Add anatop phandle for usbphy
Signed-off-by: Peter Chen peter.c...@freescale.com
---
arch/arm/boot/dts/imx6qdl.dtsi |2 ++
arch/arm/boot/dts/imx6sl.dtsi |2 ++
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 47 -
1
They are used to notify PHY that the controller enters suspend
or finishes resume.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
include/linux/usb/phy.h | 23 +++
1 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/include/linux/usb/phy.h
Add anatop phandle which is used to access anatop registers to
control PHY's power and other USB operations.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
Documentation/devicetree/bindings/usb/mxs-phy.txt |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git
When we need the PHY can be waken up by external signals,
we can call this API. Besides, we call mxs_phy_disconnect_line
at this API to close the connection between USB PHY and
controller, after that, the line state from controller is SE0.
Once the PHY is out of power, without calling
We fix the problem that we only use the 1st controller's related
registers at mxs_phy_disconnect_line, but in fact, it needs to
access registers according to different PHYs.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 89
After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/phy/phy-mxs-usb.c
It is used to access un-regulator registers according to
different controllers.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/phy/phy-mxs-usb.c
On Mon, Dec 02, 2013 at 03:05:19PM +0800, Chris Ruehl wrote:
@@ -154,6 +164,27 @@ int usb_phy_gen_create_phy(struct device *dev, struct
usb_phy_gen_xceiv *nop,
{
int err;
+ if (nop-ulpi_vbus 0) {
+ unsigned int flags = 0;
+
+ if (nop-ulpi_vbus 0x1)
On 12/03/2013 08:37 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 20
1 files changed, 20
This patch series adds DSS support to the AM43x. The DPI LCD
panel is supported on both am43x-epos-evm and am437x-gp-evm.
The LCD panel is from OSD model: OSD057T0559-34TS
Done on top of 3.13-rc1 and below dependent patches
Sourav patches adding device nodes for epos [1] and gp [2] evm
[1]:
From: Tomi Valkeinen tomi.valkei...@ti.com
On AM43xx, if a PLL is in bypass at kernel init, the code in
omap2_get_dpll_rate() will not realize this and will try to calculate
the clock rate using the multiplier and the divider, resulting in
errors.
omap2_init_dpll_parent() has similar issue.
Add
Add DSS hwmod structs for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 104
arch/arm/mach-omap2/prcm43xx.h |1 +
2 files changed, 105 insertions(+)
diff --git
On 12/03/2013 08:37 AM, Peter Chen wrote:
We fix the problem that we only use the 1st controller's related
registers at mxs_phy_disconnect_line, but in fact, it needs to
access registers according to different PHYs.
Are you fixing the code that has been added in this series before? If
so,
Add device node for DSS module for AM4372. Both the
AM437x-Gp evm and Am43x-Epos evm use the same LCD panel.
The lcd timings are added in respective dts files.
Adds display pinctrl and enables required gpio.
Also set the right parent clock to the DSS clock.
Signed-off-by: Sathya Prakash M R
Add DSS features for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
---
arch/arm/mach-omap2/display.c |2 +
drivers/video/omap2/dss/dispc.c|1 +
drivers/video/omap2/dss/dpi.c |2 +
drivers/video/omap2/dss/dsi.c |1 +
On 12/03/2013 08:36 AM, Peter Chen wrote:
The mxs-phy has several bugs and features at different
versions, the driver code can get it through of_device_id.data.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 58
On 12/03/2013 08:37 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 20
1 files
On Tue, Dec 03, 2013 at 09:38:20AM +0100, Marc Kleine-Budde wrote:
On 12/03/2013 08:36 AM, Peter Chen wrote:
The mxs-phy has several bugs and features at different
versions, the driver code can get it through of_device_id.data.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
On Tue, Dec 03, 2013 at 09:34:09AM +0100, Marc Kleine-Budde wrote:
On 12/03/2013 08:37 AM, Peter Chen wrote:
We fix the problem that we only use the 1st controller's related
registers at mxs_phy_disconnect_line, but in fact, it needs to
access registers according to different PHYs.
Are
On 12/03/2013 09:38 AM, Peter Chen wrote:
On 12/03/2013 08:37 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 20
On Sat, Nov 30, 2013 at 09:51:12AM +0100, Gwenhael Goavec-Merou wrote:
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
---
arch/arm/mach-mxs/mach-mxs.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/mach-mxs/mach-mxs.c
On 12/03/2013 09:38 AM, Peter Chen wrote:
On 12/03/2013 08:37 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
On Sat, Nov 30, 2013 at 09:51:13AM +0100, Gwenhael Goavec-Merou wrote:
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
Changed the patch subject to ARM: dts: apf28dev: ... and applied.
Shawn
---
arch/arm/boot/dts/imx28-apf28dev.dts | 13 +
1 file
On Sun, Nov 24, 2013 at 12:38 AM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
This adds a pinctrl, pinmux, pinconf and gpiolib driver for the
Qualcomm TLMM block.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
Overall this is looking *very* good, using established
On 12/03/2013 08:37 AM, Peter Chen wrote:
At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.
Is this also a fix for newly added code? If so please also squash.
Signed-off-by: Peter
On Sat, Nov 30, 2013 at 03:36:08PM +0100, Gwenhael Goavec-Merou wrote:
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
It seems there is only one pwm instance on imx27. So pwm0 in the patch
subject sounds a little confusing.
Shawn
---
On Sun, Nov 24, 2013 at 12:38 AM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
Add initial definition of parameters for pinctrl-msm for the msm8x74
platform.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
SO mostly this looks just normal, nothing to add here except:
On Tue, 3 Dec 2013 16:50:32 +0800
Shawn Guo shawn@linaro.org wrote:
On Sat, Nov 30, 2013 at 09:51:12AM +0100, Gwenhael Goavec-Merou wrote:
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
---
arch/arm/mach-mxs/mach-mxs.c | 13 +
1 file changed, 13
On 12/03/2013 08:37 AM, Peter Chen wrote:
At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.
Is this also a fix for newly added code? If so please also squash.
No, it is a
The TPS65218 chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:
- Regulators.
- Over Temperature warning and Shut down.
This patch adds support for tps65218 mfd device. At this time only
the regulator
On 12/03/2013 10:19 AM, Peter Chen wrote:
On 12/03/2013 08:37 AM, Peter Chen wrote:
At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.
Is this also a fix for newly added code? If so
On Tue, Nov 26, 2013 at 1:30 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
IMHO a way to specify a default safe state of all pins (with lowest power
consumption, without possibility of glitching external devices, etc.)
would be really useful for Samsung platforms (and probably Renesas ones
as
On Tuesday 03 of December 2013 10:31:12 Linus Walleij wrote:
On Tue, Nov 26, 2013 at 1:30 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
IMHO a way to specify a default safe state of all pins (with lowest power
consumption, without possibility of glitching external devices, etc.)
would be
Add DT bindings for TPS65218 PMIC.
Signed-off-by: Keerthy j-keer...@ti.com
---
Documentation/devicetree/bindings/mfd/tps65218.txt | 27
.../devicetree/bindings/regulator/tps65218.txt | 22
2 files changed, 49 insertions(+)
create mode
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
---
Changelog:
v2:
* rename mail subject : pwm0 - pwm
arch/arm/boot/dts/imx27-pingrp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx27-pingrp.h b/arch/arm/boot/dts/imx27-pingrp.h
index
On 11/29/2013 06:28 PM, Santosh Shilimkar wrote:
Ivan,
On Thursday 21 November 2013 06:28 AM, Ivan Khoronzhuk wrote:
This series contains fixes and updates of Davinci nand driver in
order to reuse it for Keystone platform.
The series is combination of two following series:
- Davinci nand
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
---
arch/arm/boot/dts/imx27-apf27dev.dts | 34 +++---
1 file changed, 31 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts
b/arch/arm/boot/dts/imx27-apf27dev.dts
On 12/03/2013 10:19 AM, Peter Chen wrote:
On 12/03/2013 08:37 AM, Peter Chen wrote:
At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.
Is this also a fix for newly added
Hi Laurent,
On 12/03/2013 05:54 AM, Laurent Pinchart wrote:
Hi Roger,
On Monday 25 November 2013 15:55:45 Roger Quadros wrote:
Beagle (rev. C4) and Beagle-XM (all revs) need VAUX2 1.8V supply
for the USB PHY.
As the generic PHY driver can't handle more than one supply
at the moment, we
On Mon, Dec 02, 2013 at 02:28:54PM +0100, Thierry Reding wrote:
[...]
+ host1x@5000 {
+ ...
+
+ dsi@5430 {
+ ...
+
+ nvidia,mipi-calibrate = mipi 0x060;
I just occurred to me that perhaps having a list of pad
On Sat, Sep 21, 2013 at 12:19:33PM -0700, Mike Dunn wrote:
This patch adds device tree support to the PXA's PWM driver. Nothing
needs to be extracted from the device tree node by the PWM device.
Client devices need only specify the period; the per-chip index is
implicitly zero because one
On Mon, Dec 2, 2013 at 12:03 PM, Lee Jones lee.jo...@linaro.org wrote:
+Optional properties:
+ - st,syscfg : Phandle to boot-device system configuration
registers
+ - st,boot-device-reg : Address of the aforementioned boot-device
register(s)
+ - st,boot-device-spi :
On Tue, Dec 03, 2013 at 03:36:56PM +0800, Peter Chen wrote:
The mxs-phy has several bugs and features at different
versions, the driver code can get it through of_device_id.data.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 58
On Thu, Sep 12, 2013 at 10:33:50AM +0900, Milo Kim wrote:
This is the other of the LP3943 MFD driver.
LP3943 can be used as a PWM generator, up to 2 channels.
* Two PWM generators supported
* Supported PWM operations
request, free, config, enable and disable
* Pin assignment
A
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the
interrupt lines from the subsystems are not needed at the same
time, so they have to be muxed to the irq-controller appropriately.
In such places a interrupt controllers are
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers appropriately.
In such places a interrupt
The wakeup gen mask/unmask callback uses the irq element of the
irq_data to setup. The irq is the linux virtual irq number and
is same as the hardware irq number only when the parent irqchip
is setup as a legacy domain. When it is used as a linear domain,
the virtual irqs are allocated dynamically
Enable the crossbar IP support for DRA7xx soc.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Linus Walleij
On Mon, Dec 02, 2013 at 06:08:16PM +, Kumar Gala wrote:
On Dec 2, 2013, at 10:20 AM, Lorenzo Pieralisi lorenzo.pieral...@arm.com
wrote:
ARM based platforms implement a variety of power management schemes that
allow processors to enter at run-time low-power states, aka C-states
in
Hi,
On Thu, Oct 17, 2013 at 09:54:26AM -0500, Felipe Balbi wrote:
On Wed, Oct 16, 2013 at 04:27:26PM +0300, Roger Quadros wrote:
On 10/16/2013 04:10 PM, Kishon Vijay Abraham I wrote:
Do you know if there are users of dwc3 other than exynos5250 and omap5?
If not, we should get rid of the
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
crossbar routes that to one of the free gic input line.
The DT entries for peripherals provides the
On 11/29/2013 05:32 PM, Santosh Shilimkar wrote:
On Wednesday 20 November 2013 10:46 AM, Ivan Khoronzhuk wrote:
Add new AEMIF driver for EMIF16 Texas Instruments controller.
The EMIF16 module is intended to provide a glue-less interface to
a variety of asynchronous memory devices like ASRA M,
On 11/29/2013 05:10 PM, Santosh Shilimkar wrote:
On Friday 29 November 2013 10:00 AM, Grygorii Strashko wrote:
Hi Kumar Gala,
On 11/22/2013 11:06 PM, Kumar Gala wrote:
On Nov 20, 2013, at 1:03 PM, ivan.khoronzhuk ivan.khoronz...@ti.com wrote:
On 11/20/2013 08:21 PM, Jean-Christophe
On Tuesday 03 December 2013 03:06 PM, Lee Jones wrote:
Add DT bindings for TPS65218 PMIC.
Signed-off-by: Keerthy j-keer...@ti.com
---
Documentation/devicetree/bindings/mfd/tps65218.txt | 27
.../devicetree/bindings/regulator/tps65218.txt | 22
2
On Sat, Nov 30, 2013 at 03:36:10PM +0100, Gwenhael Goavec-Merou wrote:
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
Please try to keep the patch subject shorter and move necessary words
into commit log.
Shawn
---
arch/arm/boot/dts/imx27-apf27dev.dts | 34
On Sun, Dec 01, 2013 at 10:20:21PM +0100, Marek Vasut wrote:
Add support for the MXS DCP block. The driver currently supports
SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard
CRC32 is not yet supported.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Herbert Xu
Hi Roger,
On Tuesday 03 December 2013 11:36:57 Roger Quadros wrote:
On 12/03/2013 05:54 AM, Laurent Pinchart wrote:
Hi Roger,
On Monday 25 November 2013 15:55:45 Roger Quadros wrote:
Beagle (rev. C4) and Beagle-XM (all revs) need VAUX2 1.8V supply
for the USB PHY.
As the generic
On Tue, 03 Dec 2013, Linus Walleij wrote:
On Mon, Dec 2, 2013 at 12:03 PM, Lee Jones lee.jo...@linaro.org wrote:
+Optional properties:
+ - st,syscfg : Phandle to boot-device system configuration
registers
+ - st,boot-device-reg : Address of the aforementioned boot-device
On Mon, Dec 02, 2013 at 05:07:40PM -0700, Jason Gunthorpe wrote:
On Mon, Dec 02, 2013 at 08:25:43PM +, Dave Martin wrote:
This might be easier to parse as well, since you know everything under
'axi' is related to interconnect and not jumbled with other stuff.
That is true, but I do
On 12/02/2013 05:20 PM, Lorenzo Pieralisi wrote:
ARM based platforms implement a variety of power management schemes that
allow processors to enter at run-time low-power states, aka C-states
in ACPI jargon. The parameters defining these C-states vary on a per-platform
basis forcing the OS to
Hi Kishon,
On Wed, Oct 16, 2013 at 01:24:12AM +0530, Kishon Vijay Abraham I wrote:
+ count = of_property_match_string(node, phy-names, usb2-phy);
+ if (count = 0 || (pdata pdata-usb2_generic_phy)) {
+ dwc-usb2_generic_phy = devm_phy_get(dev, usb2-phy);
+ if
On Mon, 2013-12-02 at 20:12 +0100, Florian Meier wrote:
Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.
Overall looks okay now.
Few minors comments below and my
Reviewed-by: Andy Shevchenko andriy.shevche...@linux.intel.com
On Tue, Dec 03, 2013 at 02:04:18PM +0200, Andy Shevchenko wrote:
On Mon, 2013-12-02 at 20:12 +0100, Florian Meier wrote:
+static void bcm2835_dma_free(struct bcm2835_dmadev *od)
+{
+ while (!list_empty(od-ddev.channels)) {
+ struct bcm2835_chan *c =
Hi,
The lis302 has already a DT binding described in [0],
which descibes misc. hardware properties. The problem
is, that the Nokia N900 needs negative values for some
of the properties, which seem to be unsupported by DT.
The following values would be needed for the N900 (taken
from board code):
On Tue, Dec 3, 2013 at 12:31 PM, Lee Jones lee.jo...@linaro.org wrote:
On Tue, 03 Dec 2013, Linus Walleij wrote:
So it can be in linux/mfd/my-sysconfig-regs.h as
a
#define MY_SYSCON_V1_BOOT_DEV_REG 0x958
#define MY_SYSCON_V1_BOOT_DEV_SPI 0x1a
The kernel should know which SoC is in use and
On Tue, 03 Dec 2013, Linus Walleij wrote:
On Tue, Dec 3, 2013 at 12:31 PM, Lee Jones lee.jo...@linaro.org wrote:
On Tue, 03 Dec 2013, Linus Walleij wrote:
So it can be in linux/mfd/my-sysconfig-regs.h as
a
#define MY_SYSCON_V1_BOOT_DEV_REG 0x958
#define MY_SYSCON_V1_BOOT_DEV_SPI
On Mon, 02 Dec 2013 17:21:28 -0600, Rob Herring rob.herr...@calxeda.com wrote:
On 12/02/2013 05:12 PM, Grant Likely wrote:
On Fri, 29 Nov 2013 15:57:33 +, Ian Campbell ian.campb...@citrix.com
wrote:
On Wed, 2013-11-27 at 14:36 +, Grant Likely wrote:
On Fri, 22 Nov 2013 11:22:23
From: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
---
arch/arm/boot/dts/imx27-pingrp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx27-pingrp.h
From: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
---
arch/arm/boot/dts/imx27-apf27dev.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@armadeus.com
- add chip-select pinctrl for cspi
- add card-detect for sdhci2
- add pinctrl for gpio-leds and gpio-keys
---
Changelog:
v3:
* use short subject and add commit log
arch/arm/boot/dts/imx27-apf27dev.dts | 34
On Wed, 6 Nov 2013 17:32:00 +, Jason Cooper ja...@lakedaemon.net wrote:
Signed-off-by: Jason Cooper ja...@lakedaemon.net
---
All,
Since I've now had to answer this question a couple of times, I thought it
might be worth trying to put it in a document. I don't like long documents,
so
This new header file defines pincontrol constants for Tegra to
use from Tegra's DTS file for pincontrol properties option.
Signed-off-by: Laxman Dewangan ldewan...@nvidia.com
---
Changes from V1:
- Get rid of lots of macro and converge it to TEGRA_PIN_ENABLE/DISABLE.
- Change macro name for PULL
On Tue, Dec 03, 2013 at 11:21:07AM +, Lee Jones wrote:
other is that you shouldn't be doing this at all with regulators. Mark
likes the idea of having a single regulator controller node which
contains all of these individual regulator sub-nodes and you initiate
a single call to
On Tue, Dec 03, 2013 at 12:10:14PM +0100, Gwenhael Goavec-Merou wrote:
From: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
---
arch/arm/boot/dts/imx27-apf27dev.dts | 9 +
1 file changed, 9
On Tue, Dec 03, 2013 at 12:10:13PM +0100, Gwenhael Goavec-Merou wrote:
From: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
Signed-off-by: Gwenhael Goavec-Merou gwenhael.goavec-me...@trabucayre.com
Applied all 3 with some small fix-ups (see replies to patch #2 and #3).
Shawn
Currently, of_match_node compares each given match against all node's
compatible strings with of_device_is_compatible.
To achieve multiple compatible strings per node with ordering from
specific to generic, this requires given matches to be ordered from
specific to generic. For most of the
On Tue, 3 Dec 2013 11:56:52 +0100
Gerhard Sittig g...@denx.de wrote:
the 'soc' node in the common .dtsi for MPC5121 has an '#interrupt-cells'
property although this node is not an interrupt controller
remove this erroneously placed property because starting with v3.13-rc1
lookup and
+
+static const struct mxs_phy_data imx23_phy_data = {
+ .flags = MXS_PHY_ABNORAML_IN_SUSPEND | MXS_PHY_SENDING_SOF_TOO_FAST,
+};
ABNORAML? - ABNORMAL
My careless, will change. Thanks.
Peter
+
+static const struct mxs_phy_data imx6q_phy_data = {
+ .flags =
Hi,
On Tuesday 03 December 2013 05:29 PM, Heikki Krogerus wrote:
Hi Kishon,
On Wed, Oct 16, 2013 at 01:24:12AM +0530, Kishon Vijay Abraham I wrote:
+count = of_property_match_string(node, phy-names, usb2-phy);
+if (count = 0 || (pdata pdata-usb2_generic_phy)) {
+
On Tue, Dec 03, 2013 at 12:13:24PM +0530, Keerthy wrote:
+static int tps65218_ldo1_dcdc3_vsel_to_uv(unsigned int vsel)
+{
+ int uV = 0;
+
+ if (vsel = 26)
+ uV = vsel * 25000 + 90;
+ else
+ uV = (vsel - 26) * 5 + 155;
+
+ return uV;
On Tue, Dec 03, 2013 at 12:13:23PM +0530, Keerthy wrote:
+static struct regmap_config tps65218_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
You should consider using a register cache for at least the interrupt
mask registers, it'll improve performance.
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On Thursday 21 November 2013 08:16 PM, Mark Brown wrote:
On Thu, Nov 21, 2013 at 07:50:22PM +0530, Balaji T K wrote:
+static int pbias_regulator_set_voltage(struct regulator_dev *dev,
+ int min_uV, int max_uV, unsigned *selector)
+{
+ struct pbias_regulator_data
On Tue, Dec 03, 2013 at 09:24:15PM +0530, Balaji T K wrote:
On Thursday 21 November 2013 08:16 PM, Mark Brown wrote:
These don't match up with each other - the get and set voltage calls
should reflect what the hardware state is, not what was requested by the
caller. You should be able to use
From: Jamie Iles ja...@jamieiles.com
The Synopsys DesignWare block is used in some ARM devices (picoxcell)
and can be configured to provide multiple banks of GPIO pins.
Signed-off-by: Alan Tull at...@altera.com
Reviewed-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
v8: - remove
From: Alan Tull at...@altera.com
Minor cleanup from v7 as noted below.
Hi Jamie,
I changed the interrupt implementation of your driver to work with the
current kernel (wouldn't build othewise). Could you please test and
let me know if this will work for you?
Alan
Jamie Iles (1):
gpio: add
On 12/01/2013 04:56 PM, Jason Cooper wrote:
Unlike other build products in the Linux kernel, there is no 'make
*install' mechanism to put devicetree blobs in a standard place.
This patch is an attempt to fix this problem. Akin to 'make install',
this creates a new make target, dtbs_install.
On Tue, Dec 03, 2013 at 10:37:28AM -0700, Stephen Warren wrote:
On 12/01/2013 04:56 PM, Jason Cooper wrote:
Unlike other build products in the Linux kernel, there is no 'make
*install' mechanism to put devicetree blobs in a standard place.
This patch is an attempt to fix this problem.
On Mon, Dec 02, 2013 at 03:12:35PM +0100, Krzysztof Kozlowski wrote:
Do you wish me to change the patch to previous version using
of_get_child_by_name()?
It'd be more standard, yes.
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On 12/02/2013 01:52 AM, Thierry Reding wrote:
On Sun, Dec 01, 2013 at 12:05:44PM -0700, Stephen Warren wrote:
On 11/29/2013 04:49 AM, Thierry Reding wrote:
On Fri, Nov 15, 2013 at 01:53:56PM -0700, Stephen Warren wrote:
[...]
@@ -60,6 +81,12 @@ of the following host1x client modules: -
On 11/29/2013 04:49 AM, Thierry Reding wrote:
On Fri, Nov 15, 2013 at 01:53:56PM -0700, Stephen Warren wrote:
...
+ - clock-names : Must include the following entries:
One other thing I noticed here is that you use a space between the
property name and the :. None of the other properties
On 12/02/2013 02:08 AM, Thierry Reding wrote:
On Sun, Dec 01, 2013 at 12:06:49PM -0700, Stephen Warren wrote:
On 11/29/2013 05:23 AM, Thierry Reding wrote:
On Fri, Nov 15, 2013 at 01:53:57PM -0700, Stephen Warren wrote:
[...]
diff --git
On 11/29/2013 05:29 AM, Thierry Reding wrote:
On Fri, Nov 15, 2013 at 01:53:58PM -0700, Stephen Warren wrote:
diff --git
a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
- ranges : The bus address mapping
On 11/29/2013 06:00 AM, Thierry Reding wrote:
On Fri, Nov 15, 2013 at 01:53:59PM -0700, Stephen Warren wrote:
...
@@ -110,6 +118,8 @@ reg = 0x5408 0x0004; interrupts =
GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH; clocks = tegra_car
TEGRA30_CLK_VI; + resets = tegra_car 164;
I
On 12/03/2013 02:17 AM, Thierry Reding wrote:
On Sat, Sep 21, 2013 at 12:19:33PM -0700, Mike Dunn wrote:
This patch adds device tree support to the PXA's PWM driver. Nothing
needs to be extracted from the device tree node by the PWM device.
Client devices need only specify the period; the
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