On Tue, Jan 07, 2014 at 09:39:09AM +, Jingchang Lu wrote:
@@ -90,7 +91,7 @@
uart0: serial@40027000 {
compatible = fsl,vf610-lpuart;
reg = 0x40027000 0x1000;
-
On Tuesday 07 January 2014 18:29:01 Rahul Sharma wrote:
From: Young-Gun Jang yg1004.j...@samsung.com
Add Samsung Exynos5260 SoC specific data to enable pinctrl
support for all platforms based on EXYNOS5260.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Young-Gun Jang
On Mon, Jan 06, 2014 at 03:57:37PM -0500, Anson Huang wrote:
Add ocram driver support on i.MX6SL.
s/driver/device, both commit log and patch subject.
Signed-off-by: Anson Huang b20...@freescale.com
---
arch/arm/boot/dts/imx6sl.dtsi |6 ++
1 file changed, 6 insertions(+)
diff
On Mon, Jan 06, 2014 at 09:32:24PM +0100, Stephen Warren wrote:
On 12/24/2013 06:32 AM, Peter De Schrijver wrote:
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124.
diff --git a/drivers/misc/fuse/Kconfig b/drivers/misc/fuse/Kconfig
+config FUSE_TEGRA
+ tristate Tegra
Hi,
On Friday 06 of December 2013 12:32:14 Krzysztof Kozlowski wrote:
Add document describing device tree bindings for MAX14577 MFD driver.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Got them, thanks!
Sent from my iPad
在 2014-1-7，21:52，Shawn Guo shawn@linaro.org 写道：
On Mon, Jan 06, 2014 at 03:57:37PM -0500, Anson Huang wrote:
Add ocram driver support on i.MX6SL.
s/driver/device, both commit log and patch subject.
Signed-off-by: Anson Huang b20...@freescale.com
From: Lars Poeschel poesc...@lemonage.de
This adds interrupt functionality for i2c chips to the driver.
They can act as a interrupt-controller and generate interrupts, if
the inputs change.
This is tested on a mcp23017 chip.
Signed-off-by: Lars Poeschel poesc...@lemonage.de
---
Hi,
On Thursday, January 02, 2014 07:03:23 PM Yuvaraj Kumar wrote:
On Tue, Dec 31, 2013 at 9:00 PM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
@@ -8,3 +8,4 @@ obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) +=
phy-exynos-mipi-video.o
obj-$(CONFIG_PHY_MVEBU_SATA) +=
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/dt-bindings/clock/exynos5250.h | 159
The patch replaces private enum clock IDs in the driver with macros provided
by the DT header.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clk/samsung/clk-exynos5440.c | 81 +++-
1 file
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/dt-bindings/clock/exynos4.h | 244
The patch replaces magic numbers with macros defined in DT header
in exynos5420 clock bindings.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree/bindings/clock/exynos5420-clock.txt | 184 +
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/dt-bindings/clock/exynos5440.h | 42
The patch replaces magic numbers with macros defined in DT header
in exynos5250 clock bindings.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree/bindings/clock/exynos5250-clock.txt | 162 +
On Tue, Jan 07, 2014 at 03:10:04PM +0100, Tomasz Figa wrote:
On Friday 06 of December 2013 12:32:14 Krzysztof Kozlowski wrote:
+- regulators :
+ Required properties:
+ - compatible : maxim,max14577-regulator
+ May contain a sub-node per regulator from the list below. Each
On Tuesday 07 January 2014, Roger Quadros wrote:
USB Host driver (drivers/mfd/omap-usb-host.c) expects the 60MHz
reference clock to be named init_60m_fclk. Provide this
information.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 2 ++
1 file changed, 2
Hi Mike,
On Tuesday 07 of January 2014 15:47:28 Andrzej Hajda wrote:
Hi,
This patch set adds header files with macros defining exynos clocks.
Then it converts dts files and drivers to use macros instead
of magic numbers or enums to describe clock bindings.
The patch set is rebased on the
On Tuesday 07 January 2014, Tanmay Inamdar wrote:
On Fri, Jan 3, 2014 at 1:49 AM, Arnd Bergmann a...@arndb.de wrote:
+Required properties:
+- status: Either ok or disabled.
+- device_type: set to pci
+- compatible: should contain xgene,pcie to identify the core.
+- reg: base addresses
On Monday 06 January 2014, Florian Meier wrote:
Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.
Signed-off-by: Florian Meier florian.me...@koalo.de
Acked-by: Arnd Bergmann a...@arndb.de
--
To unsubscribe from this list: send the
On Tuesday 07 January 2014 16:35:01 Arnd Bergmann wrote:
+SoC specific DT Entry:
+ pcie0: pcie@1f2b {
+ status = disabled;
+ device_type = pci;
+ compatible = xgene,pcie;
+ #interrupt-cells = 1;
+ #size-cells
From: Dinh Nguyen dingu...@altera.com
Sets the appropriate L2-cache latencies for the SOCFPGA platform.
Signed-off-by: Dinh Nguyen dingu...@altera.com
---
arch/arm/boot/dts/socfpga.dtsi |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi
On Tuesday 07 January 2014 15:55:45 Sudeep Holla wrote:
On 07/01/14 12:54, Arnd Bergmann wrote:
On Tuesday 07 January 2014 12:41:42 Sudeep Holla wrote:
Hi Tushar,
This has been discussed couple of times in past[1][2], and the opinion was
not
to have these in DT as they are more
On 01/06/2014 09:21 PM, Nishanth Menon wrote:
Hi Tero,
On 12/20/2013 10:34 AM, Tero Kristo wrote:
Hopefully final post of this series. At least this is going to be the last
post this year as I will be going to x-mas vacation and won't be back before
Jan 2nd. This time I just sent the patches
On 07/01/14 16:12, Arnd Bergmann wrote:
On Tuesday 07 January 2014 15:55:45 Sudeep Holla wrote:
On 07/01/14 12:54, Arnd Bergmann wrote:
On Tuesday 07 January 2014 12:41:42 Sudeep Holla wrote:
Hi Tushar,
This has been discussed couple of times in past[1][2], and the opinion was
not
to have
On Fri, Jan 03, 2014 at 03:29:49PM +0530, Sachin Kamat wrote:
LDO indices start from 1. Update the example accordingly.
Applied, thanks.
signature.asc
Description: Digital signature
On Sat, Dec 21, 2013 at 3:13 AM, Sherman Yin s...@broadcom.com wrote:
Adds pinctrl driver devicetree binding for Broadcom Capri (BCM281xx) SoCs.
Signed-off-by: Sherman Yin s...@broadcom.com
Reviewed-by: Christian Daudt b...@fixthebug.org
Reviewed-by: Matt Porter matt.por...@linaro.org
---
On Mon, Jan 06, 2014 at 08:18:24PM +0100, Florian Meier wrote:
Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.
Applied, thanks
--
~Vinod
--
To unsubscribe from this list: send the line unsubscribe devicetree in
the body of a message
On Mon, Jan 06, 2014 at 06:56:21PM -0800, Tanmay Inamdar wrote:
There is some kind of an addressing problem because you've done this:
+static void xgene_pcie_fixup_bridge(struct pci_dev *dev)
+{
+ int i;
+
+ for (i = 0; i DEVICE_COUNT_RESOURCE; i++) {
+
Thanks to you and to all who have looked at/corrected my patch!
I learned a lot!
On 01/07/2014 05:15 PM, Vinod Koul wrote:
On Mon, Jan 06, 2014 at 08:18:24PM +0100, Florian Meier wrote:
Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
Currently it only supports cyclic
On Tue, Jan 07, 2014 at 04:35:01PM +0100, Arnd Bergmann wrote:
+ 0x 0x0 0xd000 0xe0 0xd000 0x0
0x0020 /* cfg */
config space is not normally in the ranges property, and I think you will
need
it in the pcie node itself as a 'reg'
On Tue, Jan 7, 2014 at 3:05 PM, Lars Poeschel la...@wh2.tu-dresden.de wrote:
From: Lars Poeschel poesc...@lemonage.de
This adds interrupt functionality for i2c chips to the driver.
They can act as a interrupt-controller and generate interrupts, if
the inputs change.
This is tested on a
The board schematic states that the SD_CARD_DET_N gets pulled to GND
when card is inserted so the polarity has been updated to active low.
Polarity is now specified with a GPIO define instead of a magic number.
Signed-off-by: Tim Kryger tim.kry...@linaro.org
Reviewed-by: Matt Porter
On Sat, Dec 14, 2013 at 12:14 AM, Christian Daudt b...@fixthebug.org wrote:
On Thu, Dec 5, 2013 at 11:20 AM, Tim Kryger tim.kry...@linaro.org wrote:
Enable the external clock needed by the host controller during the
probe and disable it during the remove.
Signed-off-by: Tim Kryger
On 01/07, Lorenzo Pieralisi wrote:
Not sure this binding (cache node) belongs in cpus.txt
I am working on defining cache bindings for ARM within the C-state
standardization effort:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/215543.html
Thanks I'll take a look.
On Mon, Jan 06, 2014 at 13:32 -0600, dingu...@altera.com wrote:
---
drivers/mmc/host/Kconfig |8 ---
drivers/mmc/host/dw_mmc-socfpga.c | 138
-
2 files changed, 146 deletions(-)
delete mode 100644 drivers/mmc/host/dw_mmc-socfpga.c
Isn't
On 01/07/2014 07:05 AM, Peter De Schrijver wrote:
On Mon, Jan 06, 2014 at 09:32:24PM +0100, Stephen Warren wrote:
On 12/24/2013 06:32 AM, Peter De Schrijver wrote:
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124.
diff --git a/drivers/misc/fuse/tegra/fuse-tegra20.c
Hi,
On 01/06/2014 04:45 PM, Mark Rutland wrote:
On Sun, Jan 05, 2014 at 11:04:39PM +, Hans de Goede wrote:
Add support for ohci-platform instantiation from devicetree, including
optionally getting clks and a phy from devicetree, and enabling / disabling
those on power_on / off.
This
Hi,
On 01/06/2014 04:49 PM, Alan Stern wrote:
On Mon, 6 Jan 2014, Hans de Goede wrote:
Add support for ohci-platform instantiation from devicetree, including
optionally getting clks and a phy from devicetree, and enabling / disabling
those on power_on / off.
This should allow using
On Tuesday 07 January 2014 22:03:11 Hans de Goede wrote:
+
+Optional properties:
+ - clocks: array of clocks
+ - clock-names: clock names ahb and/or ohci
Where does ahb come from, what does it mean, and how is it relevant
to generic platforms?
ahb is an ARM specific thing, so your
On 01/02/2014 08:58 PM, Mauro Carvalho Chehab wrote:
Em Thu, 17 Oct 2013 20:06:49 +0200
Sylwester Nawrockis.nawro...@samsung.com escreveu:
This patch adds clock provider to expose the sclk_cam0/1 clocks
for external image sensor devices.
Signed-off-by: Sylwester
Hi,
On 01/07/2014 10:16 PM, Arnd Bergmann wrote:
On Tuesday 07 January 2014 22:03:11 Hans de Goede wrote:
+
+Optional properties:
+ - clocks: array of clocks
+ - clock-names: clock names ahb and/or ohci
Where does ahb come from, what does it mean, and how is it relevant
to generic platforms?
* Laurent Pinchart laurent.pinch...@ideasonboard.com [131220 07:52]:
From: Tony Lindgren t...@atomide.com
+/*
+ * Macros to allow using the absolute physical address instead of the
+ * padconf registers instead of the offset from padconf base.
+ */
+#define OMAP_IOPAD_OFFSET(pa, offset)
* Laurent Pinchart laurent.pinch...@ideasonboard.com [131220 07:52]:
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -117,7 +117,18 @@
omap3_pmx_core: pinmux@48002030 {
compatible = ti,omap3-padconf, pinctrl-single;
-
Remove the use of the mask attribute in the X-Gene reboot driver and
use fixed value.
Signed-off-by: Feng Kan f...@apm.com
---
drivers/power/reset/xgene-reboot.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/power/reset/xgene-reboot.c
Select X-Gene reboot driver for X-Gene platform.
Signed-off-by: Feng Kan f...@apm.com
---
arch/arm64/Kconfig |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 249acb9..3d0c81e 100644
--- a/arch/arm64/Kconfig
+++
Add ACPI code for X-Gene reboot platform driver.
Signed-off-by: Feng Kan f...@apm.com
---
drivers/acpi/acpi_platform.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/acpi/acpi_platform.c b/drivers/acpi/acpi_platform.c
index dbfe49e..9fe1d4f 100644
---
Enable the X-Gene reboot driver to use either the ACPI or the DTS
resource using the platform driver method.
Signed-off-by: Feng Kan f...@apm.com
---
drivers/power/reset/xgene-reboot.c | 33 -
1 files changed, 28 insertions(+), 5 deletions(-)
diff --git
Add X-Gene reboot device tree node documentation.
Signed-off-by: Feng Kan f...@apm.com
---
.../devicetree/bindings/arm64/xgene/reboot.txt | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm64/xgene/reboot.txt
diff
* Sricharan R r.sricha...@ti.com [131229 22:30]:
On Friday 27 December 2013 07:19 PM, Sricharan R wrote:
On Thursday 26 December 2013 11:14 PM, Santosh Shilimkar wrote:
On Wednesday 25 December 2013 11:52 PM, Sricharan R wrote:
On Wednesday 18 December 2013 02:49 PM, Sricharan R wrote:
I
Hi Tony,
On Tuesday 07 January 2014 15:20:18 Tony Lindgren wrote:
* Laurent Pinchart laurent.pinch...@ideasonboard.com [140107 15:10]:
On Tuesday 07 January 2014 14:30:21 Tony Lindgren wrote:
* Laurent Pinchart laurent.pinch...@ideasonboard.com [131220 07:52]:
From: Tony Lindgren
* Laurent Pinchart laurent.pinch...@ideasonboard.com [140107 15:26]:
Hi Tony,
On Tuesday 07 January 2014 15:20:18 Tony Lindgren wrote:
* Laurent Pinchart laurent.pinch...@ideasonboard.com [140107 15:10]:
On Tuesday 07 January 2014 14:30:21 Tony Lindgren wrote:
* Laurent Pinchart
From: Stephen Warren swar...@nvidia.com
The Chungwa CLAA101WA01A is a 10.1 1366x768 panel, which can be
supported by the simple panel driver.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
.../bindings/panel/chunghwa,claa101wa01a.txt | 7 ++
drivers/gpu/drm/panel/panel-simple.c
* Tony Lindgren t...@atomide.com [140107 15:10]:
* Sricharan R r.sricha...@ti.com [131229 22:30]:
On Friday 27 December 2013 07:19 PM, Sricharan R wrote:
On Thursday 26 December 2013 11:14 PM, Santosh Shilimkar wrote:
On Wednesday 25 December 2013 11:52 PM, Sricharan R wrote:
On
Hi Gerhard,
On Tue, 2014-01-07 at 21:17 +0100, Gerhard Sittig wrote:
On Mon, Jan 06, 2014 at 13:32 -0600, dingu...@altera.com wrote:
---
drivers/mmc/host/Kconfig |8 ---
drivers/mmc/host/dw_mmc-socfpga.c | 138
-
2 files changed,
On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote:
+Recommended properties:
+- ranges: Allows valid translation between child's address space and
+ parent's. Must be present if the device has sub-nodes.
+- #address-cells: Specifies the number of cells used to represent
+
* Suman Anna s-a...@ti.com [131223 15:01]:
The irq data for rng module defined in hwmod data previously
missed the OMAP_INTC_START relative offset, so the interrupt
number is probably misconfigured during the DT node addition
adjusting for this OMAP_INTC_START. Interrupt #36 is associated
On Monday 06 of January 2014 17:14:48 Rahul Sharma wrote:
Hi Tomasz,
On 19 December 2013 17:15, Tomasz Figa t.f...@samsung.com wrote:
Hi Rahul,
On Friday 06 of December 2013 21:26:30 Rahul Sharma wrote:
Add support for pll2650xx in samsung pll file. This pll variant
is close to
On Tuesday 07 of January 2014 15:47:29 Andrzej Hajda wrote:
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
* Paul Walmsley p...@pwsan.com [140106 15:43]:
On Tue, 31 Dec 2013, Rob Herring wrote:
On Mon, Dec 30, 2013 at 4:10 PM, Paul Walmsley p...@pwsan.com wrote:
On Tue, 10 Dec 2013, Paul Walmsley wrote:
Is it possible to get this patch, or something similar, merged for
v3.13-rc?
Once
On 01/07/2014 07:17 PM, Eduardo Valentin wrote:
* PGP Signed by an unknown key
On 06-01-2014 22:48, Wei Ni wrote:
Hi, Eduardo
Will you consider my comments :)
By now Wei, it is better if you start a new thread, by sending a patch
on top of it, as this thread has been already merged by
On 01/08/2014 11:24 AM, Hu Yaohui wrote:
I am new here. How can I could not mail a new message to this mail list?
TIA
I use Thunderbird, it's a pretty good mail client :)
On Tue, Jan 7, 2014 at 10:19 PM, Wei Ni w...@nvidia.com
mailto:w...@nvidia.com wrote:
On 01/07/2014 07:17 PM,
Thanks Arnd,
On 7 January 2014 18:54, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 07 January 2014 18:29:00 Rahul Sharma wrote:
From: Pankaj Dubey pankaj.du...@samsung.com
This patch add basic arch side support for exynos5260 SoC.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
On 01/07/2014 08:43 PM, Arnd Bergmann wrote:
On Tuesday 07 January 2014, Roger Quadros wrote:
USB Host driver (drivers/mfd/omap-usb-host.c) expects the 60MHz
reference clock to be named init_60m_fclk. Provide this
information.
Signed-off-by: Roger Quadros rog...@ti.com
---
Hi Tomasz,
Thanks for the review comments, please find my replies inline.
On Thu, Dec 19, 2013 at 6:49 PM, Tomasz Figa t.f...@samsung.com wrote:
On Thursday 19 of December 2013 17:42:28 Shirish S wrote:
This patch adds dt support to hdmiphy config settings
as it is board specific and depends
The USB PHY gets its clock from AUXCLK3. Provide this
information.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi
Hi Benoit Tony,
This patchset brings up USB Host ports and Ethernet port on
the OMAP5 uEVM board.
It depends on the TI Clock DT conversion patches [1] and is based
on 3.13-rc7
[1] - http://article.gmane.org/gmane.linux.ports.arm.kernel/289895
Changelog:
v4:
- Updated DT binding document for
The necessary clock phandle for the EHCI clock is now provided
via device tree so we no longer need this legacy method.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/pdata-quirks.c | 16
1 file changed, 16 deletions(-)
diff --git
The HS USB 2 PHY gets its clock from AUXCLK1. Provide this
information.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
The omap-usb-host driver expects the 60MHz functional clock
of the USB host module to be named as init_60m_fclk.
Add this information in the DT binding document.
CC: Lee Jones lee.jo...@linaro.org
CC: Samuel Ortiz sa...@linux.intel.com
Signed-off-by: Roger Quadros rog...@ti.com
---
USB Host driver (drivers/mfd/omap-usb-host.c) expects the 60MHz
reference clock to be named init_60m_fclk. Provide this
information.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi
Add support for S2MPA01 voltage and current regulator.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/regulator/Kconfig |7 +
drivers/regulator/Makefile |1 +
drivers/regulator/s2mpa01.c | 497 +++
3 files changed, 505
Add the necessary entries required for S2MPA01 multi-function
device. While at it also convert whitespaces to tabs in core.h.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/mfd/sec-core.c | 39 +++
include/linux/mfd/samsung/core.h| 16 ++-
Added initial binding documentation for S2MPA01 MFD.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Documentation/devicetree/bindings/mfd/s2mpa01.txt | 91 +
1 file changed, 91 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/s2mpa01.txt
@@ -601,6 +601,23 @@ static inline int of_property_read_u32(const struct
device_node *np,
return of_property_read_u32_array(np, propname, out_value, 1);
}
+/**
+ * of_property_optional - Find one optional property
+ * @np:device node from which the property to be
Hi,
On 2014년 01월 07일 16:39, Dan Carpenter wrote:
Hello Jonghwa Lee,
The patch 5c49a6256bed: charger-manager: Modify the way of checking
battery's temperature from Dec 18, 2013, leads to the following
static checker warning:
drivers/power/charger-manager.c:563
Hi Benoit,
On 12/23/2013 11:28 AM, Peter Ujfalusi wrote:
Hi,
The audio frequency has been incorrectly set in the DTS file which results
incorrect playback frequency on EVM-SK.
The SD card can not be used without the second patch on 3.13-rc5.
Can you take a look at these and if it is
Please let me know if this is suitable and I can keep your Ack.
This patch doesn't seem to have made it into next-20140106. I assume
that's just because of the holidays, not because it was forgotten?
Right, it was pushed yesterday morning.
mfd: Revert mfd: Always assign of_node
On Mon, Jan 06, 2014 at 02:04:33PM +0800, Shawn Guo wrote:
On Wed, Dec 25, 2013 at 02:19:27PM +0800, Huang Shijie wrote:
This patch uses the IRQ_TYPE_LEVEL_HIGH/IRQ_TYPE_NONE to replace
the hardcode.
Signed-off-by: Huang Shijie b32...@freescale.com
---
arch/arm/boot/dts/vf610.dtsi |
On Tuesday 07 January 2014, Tanmay Inamdar wrote:
Also, the implementation is wrong since the I/O port range already needs
to be ioremapped in order for inb/outb to work. There is already a
generic implementation of this in include/asm-generic/iomap.h, which
correctly calls ioport_map.
On Thursday 02 January 2014 07:13 PM, Yuvaraj Kumar wrote:
On Tue, Dec 31, 2013 at 4:18 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi Yuvaraj,
On Monday 30 December 2013 06:37 PM, Yuvaraj Kumar C D wrote:
This patch adds the sata phy driver for Exynos5250.Exynos5250 sata
phy comprises
Hi,
On Monday 30 December 2013 03:13 PM, Vivek Gautam wrote:
Hi Kishon,
On Tue, Dec 24, 2013 at 11:15 PM, Kishon Vijay Abraham I kis...@ti.com
wrote:
Hi,
On Thursday 05 December 2013 01:44 PM, Vivek Gautam wrote:
Hi Kishon,
On Wed, Dec 4, 2013 at 7:58 PM, Kishon Vijay Abraham I
Hi Maxime,
Am Montag, den 06.01.2014, 19:14 +0100 schrieb Maxime Ripard:
+struct reset_control *gpio_reset_control_get(struct device *dev, const
char *id)
+{
+ const char *assert_prop = reset-initially-asserted;
I guess you meant reset-boot-asserted here, right?
Yes, thank you.
-Original Message-
From: Huang Shijie [mailto:b32...@freescale.com]
Sent: Tuesday, January 07, 2014 3:52 PM
To: Shawn Guo
Cc: Lu Jingchang-B35083; devicetree@vger.kernel.org; linux-arm-
ker...@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: vf610: use the interrupt macros
On
Cc: Richard Purdie rpur...@rpsys.net
Cc: Jingoo Han jg1@samsung.com
Cc: Laurent Pinchart laurent.pinch...@ideasonboard.com
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell
On Monday 06 January 2014 11:46 PM, Mark Rutland wrote:
On Fri, Dec 20, 2013 at 05:35:51PM +, Balaji T K wrote:
pbias register controls internal power supply to sd card i/o pads
in most OMAPs (OMAP2-5, DRA7).
Control bits for selecting voltage level and
enabling/disabling are in the same
On Monday 06 January 2014 11:49 PM, Mark Rutland wrote:
On Fri, Dec 20, 2013 at 05:35:53PM +, Balaji T K wrote:
Add pbias regulator node as a child of system control
module - syscon.
Signed-off-by: Balaji T K balaj...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 18 ++
Hi,
On Thu, Jan 2, 2014 at 9:11 PM, srinivas kandagatla
srinivas.kandaga...@st.com wrote:
Hi Chen,
On 24/12/13 03:27, Chen-Yu Tsai wrote:
Srinivas,
Let's keep platform data as of_data, so SoC compatibles can pass
hardware feature flags for cores that don't support auto-detection.
I
On Tue, Jan 07, 2014 at 06:26:42AM +, Dongsheng Wang wrote:
From: Wang Dongsheng dongsheng.w...@freescale.com
P1020, P1021, P1022, P1023 when the lbc get error, the error
interrupt will be triggered. The corresponding interrupt is
internal IRQ0. So system have to process the lbc IRQ0
On Tue, Jan 07, 2014 at 10:02:53AM +, Denis Carikli wrote:
Cc: Richard Purdie rpur...@rpsys.net
Cc: Jingoo Han jg1@samsung.com
Cc: Laurent Pinchart laurent.pinch...@ideasonboard.com
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland
On Mon, Dec 30, 2013 at 08:14:15PM +, Stephen Boyd wrote:
The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for the L2 cache.
Cc: Lorenzo Pieralisi lorenzo.pieral...@arm.com
Cc: Mark Rutland
On Tue, Jan 07, 2014 at 10:18:15AM +, Balaji T K wrote:
On Monday 06 January 2014 11:49 PM, Mark Rutland wrote:
On Fri, Dec 20, 2013 at 05:35:53PM +, Balaji T K wrote:
Add pbias regulator node as a child of system control
module - syscon.
Signed-off-by: Balaji T K
HI Kishon
On Tue, Jan 7, 2014 at 3:19 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi,
On Monday 30 December 2013 03:13 PM, Vivek Gautam wrote:
Hi Kishon,
On Tue, Dec 24, 2013 at 11:15 PM, Kishon Vijay Abraham I kis...@ti.com
wrote:
Hi,
On Thursday 05 December 2013 01:44 PM,
On 06-01-2014 22:48, Wei Ni wrote:
Hi, Eduardo
Will you consider my comments :)
By now Wei, it is better if you start a new thread, by sending a patch
on top of it, as this thread has been already merged by Rui.
Thanks.
Wei.
On 12/31/2013 06:17 PM, Wei Ni wrote:
On 11/13/2013 03:46 AM,
Hi Philipp,
On Tue, Jan 07, 2014 at 10:52:21AM +0100, Philipp Zabel wrote:
+ const char *gpio_con_id = reset;
+ struct reset_controller_dev *rcdev;
+ struct reset_control *rstc;
+ struct gpio_desc *gpiod;
+ bool asserted = false;
+ char scratch[48];
+ int ret;
+
+ if
On Tue, Jan 07, 2014 at 12:28:09PM +0100, Philipp Zabel wrote:
Am Dienstag, den 07.01.2014, 12:19 +0100 schrieb Maxime Ripard:
I was under the (wrong) impression that gpiod_direction_output takes a
logical value as gpiod_set_value does. Will fix that.
I don't think gpiod_set_value does
On Tue, Jan 07, 2014 at 12:06:37PM +0530, Satish Patel wrote:
+ if (pdata-irq == 0) {
+ /* look for the field irq-gpio in DT */
+ irq_gpio = of_get_named_gpio(np, irq-gpio, 0);
+ if (!gpio_is_valid(irq_gpio)) {
+
On Tuesday 07 January 2014 17:11:28 Tushar Behera wrote:
Parsed auxiliary control properties for PL310 cache controller.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
These properties are set for Exynos4 platform. If we can pass these properties
through device tree for Exynos4,
On Tue, Jan 07, 2014 at 02:44:10AM +, Wei Ni wrote:
On 01/06/2014 10:54 PM, Eduardo Valentin wrote:
* PGP Signed by an unknown key
On 06-01-2014 09:51, Mark Rutland wrote:
On Thu, Jan 02, 2014 at 05:50:06PM +, Matthew Longnecker wrote:
I think the platform driver may set
On 7 January 2014 17:27, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 07 January 2014 17:11:28 Tushar Behera wrote:
Parsed auxiliary control properties for PL310 cache controller.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
These properties are set for Exynos4 platform. If we
Hi Benoit Tony,
This patchset brings up USB Host ports and Ethernet port on
the OMAP5 uEVM board.
It depends on the TI Clock DT conversion patches [1].
[1] - http://article.gmane.org/gmane.linux.ports.arm.kernel/289895
cheers,
-roger
Roger Quadros (4):
ARM: dts: OMAP5: Add 60MHz clock
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