Hi Grant,
On Mar 13, 2014, at 12:49 AM, Grant Likely wrote:
> From: Pantelis Antoniou
>
> After the move to having device nodes be proper kobjects the lifecycle
> of the node needs to be controlled better.
>
> At first convert of_add_node() in the unflattened functions to
> of_init_node() whic
On Wed, Mar 12, 2014 at 04:13:51PM +0800, Huang Shijie wrote:
> On Mon, Feb 24, 2014 at 06:37:34PM +0800, Huang Shijie wrote:
>Could you please review this patch set? I really hope it can be merged
>as soon as possibel. But now, the patch set has stalled for a long time.
I'm sorry for the
Le 13/03/2014 07:00, Yang, Wenyou a écrit :
Hi JC,
-Original Message-
From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagn...@jcrosoft.com]
Sent: Tuesday, March 11, 2014 7:14 PM
To: Yang, Wenyou
Cc: Jean-Christophe PLAGNIOL-VILLARD; mark.rutl...@arm.com;
devicetree@vger.kernel.org; pawe
On 13 March 2014 10:31, Rahul Sharma wrote:
> Thanks Pankaj,
>
> On 13 March 2014 06:19, Pankaj Dubey wrote:
>> Hi Rahul,
>>
>>
>> On 03/13/2014 12:16 AM, Rahul Sharma wrote:
>>>
>>> The patch adds the dts files for xyref5260 board which
>>> is based on Exynos5260 Evt0 sample.
>>>
>>> Signed-off-
Hi JC,
> -Original Message-
> From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagn...@jcrosoft.com]
> Sent: Tuesday, March 11, 2014 7:14 PM
> To: Yang, Wenyou
> Cc: Jean-Christophe PLAGNIOL-VILLARD; mark.rutl...@arm.com;
> devicetree@vger.kernel.org; pawel.m...@arm.com;
> ijc+devicet...@he
On 13 March 2014 06:53, Pankaj Dubey wrote:
> Hi Rahul,
>
>
> On 03/12/2014 11:56 PM, Rahul Sharma wrote:
>>
>> Add macros which are used as Clock IDs in DT and clock file.
>> It also adds the documentation for the exynos5260 clocks.
>>
>> Signed-off-by: Rahul Sharma
>> ---
>> .../devicetree/bi
On 13 March 2014 06:28, Pankaj Dubey wrote:
> On 03/13/2014 12:16 AM, Rahul Sharma wrote:
>>
>> The patch adds the dts files for exynos5260.
>>
>> Signed-off-by: Pankaj Dubey
>> Signed-off-by: Rahul Sharma
>> Signed-off-by: Arun Kumar K
>> Reviewed-by: Tomasz Figa
>> ---
>> arch/arm/boot/dts
Thanks Pankaj,
On 13 March 2014 06:19, Pankaj Dubey wrote:
> Hi Rahul,
>
>
> On 03/13/2014 12:16 AM, Rahul Sharma wrote:
>>
>> The patch adds the dts files for xyref5260 board which
>> is based on Exynos5260 Evt0 sample.
>>
>> Signed-off-by: Rahul Sharma
>> ---
>> arch/arm/boot/dts/Makefile
Tony,
On Wednesday 12 March 2014 11:04 PM, Tony Lindgren wrote:
* Sourav Poddar [140310 04:54]:
These add device tree entry for qspi controller driver on dra7-evm.
It seems that we need to wait for the crossbar dependencies
to get cleared in the mainline kernel before we can apply this
as oth
On Wed, 2014-03-12 at 19:42 -0500, Vince Bridgers wrote:
> As I was working through the V4 patch and looking at the names used by
> other drivers, it occurred to me it would be useful to create a set of
> standard definitions that referenced the relevant IEEE Specification
> and RFC. I'm willing to
Please find attached to this message our charity trust event.
Thank you.Please find attached to this message our charity trust event.
Thank you.
THE WEIR CHARITABLE TRUST.pdf
Description: Adobe PDF document
On Wednesday, March 12, 2014 at 01:53:14 PM, Matt Ranostay wrote:
> AS3935 chipset can detect lightning strikes and reports those back as
> events and the estimated distance to the storm.
>
> Signed-off-by: Matt Ranostay
Reviewed-by: Marek Vasut
Best regards,
Marek Vasut
--
To unsubscribe from
Dear Kukjin,
On 03/12/2014 08:21 PM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 12.03.2014 07:19, Chanwoo Choi wrote:
>> This patch add missing dt data of Exynos4x12 to bring up kernel feature and
>> code clean. This patchset is based on 'v3.15-next/dt-clk-exynos' branch.
>> - git://git.kernel.org/p
Hi Rahul,
On 03/12/2014 11:56 PM, Rahul Sharma wrote:
Add support for pll2650xx in samsung pll file. This PLL variant
is close to pll36xx but uses CON2 registers instead of CON1.
Aud_pll in Exynos5260 is pll2650xx and uses this code.
Signed-off-by: Rahul Sharma
---
drivers/clk/samsung/clk-p
Hi Rahul,
On 03/12/2014 11:56 PM, Rahul Sharma wrote:
Add macros which are used as Clock IDs in DT and clock file.
It also adds the documentation for the exynos5260 clocks.
Signed-off-by: Rahul Sharma
---
.../devicetree/bindings/clock/exynos5260-clock.txt | 55 +
include/dt-bindings/c
Hi Joe,
On Wed, Mar 12, 2014 at 3:31 PM, Joe Perches wrote:
> On Wed, 2014-03-12 at 15:15 -0500, Vince Bridgers wrote:
>> This patch adds the MSGDMA soft IP support for the Altera Triple
>> Speed Ethernet driver.
>
> []
>
>> Signed-off-by: Vince Bridgers
>> ---
>> V4: - Modify use of dev_* to ne
Hi Joe,
On Wed, Mar 12, 2014 at 3:42 PM, Joe Perches wrote:
> On Wed, 2014-03-12 at 15:15 -0500, Vince Bridgers wrote:
>> This patch adds the main driver and header file for the Altera Triple
>> Speed Ethernet driver.
> []
>> diff --git a/drivers/net/ethernet/altera/altera_tse.h
>> b/drivers/net
On Wed, Mar 12, 2014 at 7:28 PM, Ben Hutchings wrote:
> On Wed, 2014-03-12 at 15:26 -0700, Joe Perches wrote:
>> On Wed, 2014-03-12 at 21:14 +, Ben Hutchings wrote:
>> > These look like the statistic names specified in IEEE 802.3. I would
>> > support a general move to using standard names fo
On 03/13/2014 12:16 AM, Rahul Sharma wrote:
The patch adds the dts files for exynos5260.
Signed-off-by: Pankaj Dubey
Signed-off-by: Rahul Sharma
Signed-off-by: Arun Kumar K
Reviewed-by: Tomasz Figa
---
arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 574 +
arch/ar
Hi Rahul,
On 03/13/2014 12:16 AM, Rahul Sharma wrote:
The patch adds the dts files for xyref5260 board which
is based on Exynos5260 Evt0 sample.
Signed-off-by: Rahul Sharma
---
arch/arm/boot/dts/Makefile |1 +
arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts | 110 +
On Wed, 2014-03-12 at 15:26 -0700, Joe Perches wrote:
> On Wed, 2014-03-12 at 21:14 +, Ben Hutchings wrote:
> > These look like the statistic names specified in IEEE 802.3. I would
> > support a general move to using standard names for MAC stats in Ethernet
> > drivers, because they are quite
On Wed, Mar 12, 2014 at 05:41:33PM +0900, Jingoo Han wrote:
> On Wednesday, March 05, 2014 8:49 PM, Liviu Dudau wrote:
> >
> > Use the generic host bridge functions to provide support for
> > PCI Express on arm64. There is no support for ISA memory.
> >
> > Signed-off-by: Liviu Dudau
> > Tested-
From: Pantelis Antoniou
After the move to having device nodes be proper kobjects the lifecycle
of the node needs to be controlled better.
At first convert of_add_node() in the unflattened functions to
of_init_node() which initializes the kobject so that of_node_get/put
work correctly even before
On Wed, 2014-03-12 at 21:14 +, Ben Hutchings wrote:
> These look like the statistic names specified in IEEE 802.3. I would
> support a general move to using standard names for MAC stats in Ethernet
> drivers, because they are quite clearly defined and widely implemented
> in hardware. However
On Mar 12, Jason Gunthorpe wrote:
> On Wed, Mar 12, 2014 at 06:11:47PM -0300, Ezequiel Garcia wrote:
>
> > I've pushed a branch so people can test this easily, e.g. ensuring
> > no regressions on Dove, Kirkwood and A370/XP:
> >
> > https://github.com/MISL-EBU-System-SW/mainline-public/tree/wdt_a3
On Mon, Sep 23, 2013 at 10:20:35AM -0700, Christian Daudt wrote:
> Currently ARCH_BCM has been used for Broadcom
> Mobile V7 based SoCs. In order to allow other Broadcom
> SoCs to also use mach-bcm directory and files, this patch
> renames the original ARCH_BCM to ARCH_BCM_MOBILE, and
> uses ARCH_B
On Wed, Mar 12, 2014 at 06:11:47PM -0300, Ezequiel Garcia wrote:
> I've pushed a branch so people can test this easily, e.g. ensuring
> no regressions on Dove, Kirkwood and A370/XP:
>
> https://github.com/MISL-EBU-System-SW/mainline-public/tree/wdt_a385_a375_v3
This branch worked for me, the wat
On Mar 13, Sergei Shtylyov wrote:
> On 03/12/2014 11:30 PM, Ezequiel Garcia wrote:
>
> >>>The Armada 38x SoC family has a NAND controller, compatible
> >>>with the controller in Armada 370/375/XP SoCs. Add support for
> >>>it in the devicetree file.
>
> >>>Signed-off-by: Ezequiel Garcia
> >>>---
(added David Miller to cc's)
On Wed, 2014-03-12 at 21:14 +, Ben Hutchings wrote:
> On Tue, 2014-03-11 at 19:28 -0500, Vince Bridgers wrote:
> > On Tue, Mar 11, 2014 at 5:59 PM, Joe Perches wrote:
> > > On Tue, 2014-03-11 at 17:43 -0500, Vince Bridgers wrote:
> > >> This patch adds miscellaneo
On Thursday 13 March 2014 12:00 AM, Vinod Koul wrote:
> On Wed, Mar 12, 2014 at 03:50:32AM +0800, Santosh Shilimkar wrote:
>> On Tuesday 11 March 2014 06:23 PM, Vinod Koul wrote:
>>> On Fri, Feb 28, 2014 at 05:56:40PM -0500, Santosh Shilimkar wrote:
From: Sandeep Nair
The Packet DMA
On Tue, 2014-03-11 at 19:28 -0500, Vince Bridgers wrote:
> Hi Joe,
>
> On Tue, Mar 11, 2014 at 5:59 PM, Joe Perches wrote:
> > On Tue, 2014-03-11 at 17:43 -0500, Vince Bridgers wrote:
> >> This patch adds miscellaneous files for the Altera Ethernet Driver,
> >> including ethtool support.
> >
> >
This commit documents the new support for "marvell,armada-{375,380}-wdt"
compatible strings and the extra 'reg' entry requirement.
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/watchdog/marvel.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/dev
On Mar 11, Jason Gunthorpe wrote:
> On Thu, Mar 06, 2014 at 09:13:46PM -0300, Ezequiel Garcia wrote:
>
> > > On the driver side, we need to implement per-SoC stop() and enabled()
> > > functions. Such somewhat complex infrastructure is needed to ensure the
> > > driver
> > > performs proper reset
Separate the RSTOUT register mapping for the different compatible
strings supported by the driver. This allows to use devm_ioremap
on SoC variants that share the RSTOUT register, and devm_ioremap_resource
(which requests the MMIO region) on SoCs that have a dedicated RSTOUT
register.
Signed-off-by
In order to support other SoCs, it's needed to have a different stop()
implementation for each SoC. This commit adds no functionality, and it
consists of preparation work.
Reviewed-by: Guenter Roeck
Signed-off-by: Ezequiel Garcia
---
drivers/watchdog/orion_wdt.c | 29 +++
The RSTOUT register on the Armada 370 SoC variant is a dedicated register
(not shared across orthogonal subsystems) and so it's not needed to write
it atomically.
Signed-off-by: Ezequiel Garcia
---
drivers/watchdog/orion_wdt.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --
In order to support other SoCs, it's needed to have a different enabled()
implementation for each SoC. This commit adds no functionality, and it
consists of preparation work.
Reviewed-by: Guenter Roeck
Signed-off-by: Ezequiel Garcia
---
drivers/watchdog/orion_wdt.c | 15 +--
1 file
This commit adds support for the Armada 375 and Armada 380 SoCs.
This SoC variant has a second RSTOUT register, in addition to the already
existent, which is shared with the system-controller. To handle this RSTOUT,
we introduce a new MMIO register 'rstout_mask' to be required on
'armada-{375,380}
Add the DT nodes to enable the watchdog support available on
Armada 380/385 SoC.
Signed-off-by: Ezequiel Garcia
---
arch/arm/boot/dts/armada-38x.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi
b/arch/arm/boot/dts/armada-38x.dtsi
index 812ce28..2
Add the DT nodes to enable the watchdog support available on
Armada 375 SoC.
Signed-off-by: Ezequiel Garcia
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375.dtsi
b/arch/arm/boot/dts/armada-375.dtsi
index 3877693f..0bfa5
Third round of the patchset adding support for watchdog on Armada 375 and
Armada 38x SoCs.
The new Armada 375/385 SoCs have two registers for the watchdog RSTOUT:
1. It has a dedicated register (similar to the one in A370/XP)
2. Also has a bit in a shared RSTOUT register.
Therefore, in order t
On Wed, 2014-03-12 at 15:15 -0500, Vince Bridgers wrote:
> This patch adds the main driver and header file for the Altera Triple
> Speed Ethernet driver.
[]
> diff --git a/drivers/net/ethernet/altera/altera_tse.h
> b/drivers/net/ethernet/altera/altera_tse.h
[]
> +/* MAC register Space. Note that s
On 03/12/2014 11:30 PM, Ezequiel Garcia wrote:
The Armada 38x SoC family has a NAND controller, compatible
with the controller in Armada 370/375/XP SoCs. Add support for
it in the devicetree file.
Signed-off-by: Ezequiel Garcia
---
arch/arm/boot/dts/armada-38x.dtsi | 10 ++
1 file
On Wed, 2014-03-12 at 15:15 -0500, Vince Bridgers wrote:
> This patch adds miscellaneous files for the Altera Ethernet Driver,
> including ethtool support.
>
> Signed-off-by: Vince Bridgers
> ---
> V4: - Change names of statistics to match common usage found in most
> drivers instead of TSE
On Wed, 2014-03-12 at 15:15 -0500, Vince Bridgers wrote:
> This patch adds the MSGDMA soft IP support for the Altera Triple
> Speed Ethernet driver.
[]
> Signed-off-by: Vince Bridgers
> ---
> V4: - Modify use of dev_* to netdev_* where possible
Hi again Vince.
trivia:
It'd be better to also u
On Mar 13, Sergei Shtylyov wrote:
> On 03/12/2014 06:16 PM, Ezequiel Garcia wrote:
>
> >The Armada 38x SoC family has a NAND controller, compatible
> >with the controller in Armada 370/375/XP SoCs. Add support for
> >it in the devicetree file.
>
> >Signed-off-by: Ezequiel Garcia
> >---
> > arch
This patch adds a bindings description for the Altera Triple Speed Ethernet
(TSE) driver. The bindings support the legacy SGDMA soft IP as well as the
preferred MSGDMA soft IP. The TSE can be configured and synthesized in soft
logic using Altera's Quartus toolchain. Please consult the bindings docu
This is the version 4 submission for the Altera Triple Speed Ethernet (TSE)
driver. All comments received during the version 2 and 3 submissions have
been accepted. Please find the change log and a description of the driver
files submission below.
Please consider this patch set for inclusion in
This patch adds the SGDMA soft IP support for the Altera Triple
Speed Ethernet driver.
Signed-off-by: Vince Bridgers
---
V4: - use netdev_* logging instead of dev_* logging.
V3: - Reorder commits, otherwise no changes to these files
V2: - Use 32-bit lower/upper physical address accessors per co
This patch adds miscellaneous files for the Altera Ethernet Driver,
including ethtool support.
Signed-off-by: Vince Bridgers
---
V4: - Change names of statistics to match common usage found in most
drivers instead of TSE databook names.
- Remove unnecessary cast
V3: - Reorder commits
This patch adds a bindings description for the Altera Triple Speed Ethernet
(TSE) driver. The bindings support the legacy SGDMA soft IP as well as the
preferred MSGDMA soft IP. The TSE can be configured and synthesized in soft
logic using Altera's Quartus toolchain. Please consult the bindings docu
This patch adds the MSGDMA soft IP support for the Altera Triple
Speed Ethernet driver.
Signed-off-by: Vince Bridgers
---
V4: - Modify use of dev_* to netdev_* where possible
V3: - Reorder commits, otherwise no changes to these files.
V2: - Use 32-bit upper/lower physical address accessors per
Add a MAINTAINERS entry covering the Altera Triple Speed
Ethernet Driver, with support for the MSGDMA and SGDMA
soft DMA IP components.
Signed-off-by: Vince Bridgers
---
V4: - No changes to MAINTAINERS for V4
V3: - Reorder commits, otherwise no change to these files from V2
V2: - Add a patch to
This patch adds the Altera Triple Speed Ethernet Makfile and
Kconfig file.
Signed-off-by: Vince Bridgers
---
V4: - No changes to these files for V4
V3: - Reorder commits from V2, otherwise no changes to these files
V2: - Break up the driver files submission, no change to
the Makefile or K
This patch adds APM X-Gene SoC AHCI SATA host controller DTS entries.
Signed-off-by: Loc Ho
Signed-off-by: Tuan Phan
Signed-off-by: Suman Tripathi
---
arch/arm64/boot/dts/apm-storm.dtsi | 75
1 files changed, 75 insertions(+), 0 deletions(-)
diff --git a
This patch changes the Ethernet Makefile and Kconfig files to add the Altera
Ethernet driver component.
Signed-off-by: Vince Bridgers
---
V4: - No changes to these files for V4
V3: - Reorder commits so kernel Kconfig and Makefile are last commit,
otherwise no change to these files from V2
This patch adds support for the APM X-Gene SoC AHCI SATA host controller
driver. It requires the corresponding APM X-Gene SoC PHY driver. This
initial version only supports Gen3 speed.
Signed-off-by: Loc Ho
Signed-off-by: Tuan Phan
Signed-off-by: Suman Tripathi
---
drivers/ata/Kconfig |
This patch adds documentation for the APM X-Gene SoC SATA host controller DTS
binding.
Signed-off-by: Loc Ho
Signed-off-by: Tuan Phan
Signed-off-by: Suman Tripathi
---
.../devicetree/bindings/ata/apm-xgene.txt | 70
1 files changed, 70 insertions(+), 0 deletions
This patch adds support for the APM X-Gene SoC AHCI SATA host controller. In
order for the host controller to work, the corresponding PHY driver
musts also be available. Currently, only Gen3 disk is supported with this
initial version.
v17:
* Add comment on no support for PM currently
* Add xgen
This patch adds the DTS entries for the APM X-Gene SoC 15Gbps Multi-purpose
PHY driver. The PHY for SATA controller 2 and 3 are enabled by default.
Signed-off-by: Loc Ho
Signed-off-by: Tuan Phan
Signed-off-by: Suman Tripathi
---
arch/arm64/boot/dts/apm-storm.dtsi | 75 +++
Add the binding description for the Kona PWM controller found on Broadcom's
mobile SoCs.
Signed-off-by: Tim Kryger
Reviewed-by: Alex Elder
Reviewed-by: Markus Mayer
---
.../devicetree/bindings/pwm/bcm-kona-pwm.txt | 24 ++
1 file changed, 24 insertions(+)
create mode
On Mar 12, 2014, at 1:07 PM, Jason Gunthorpe
wrote:
> On Wed, Mar 12, 2014 at 05:46:53PM +0100, Boris BREZILLON wrote:
>> I'm not a big fan of this name. I think timing structs should not
>> contain onfi in their names, because these timings are also
>> available on non ONFI chips.
>
> Explici
Add support for the six-channel Kona PWM controller found on Broadcom
mobile SoCs like bcm281xx.
Signed-off-by: Tim Kryger
Reviewed-by: Alex Elder
Reviewed-by: Markus Mayer
---
drivers/pwm/Kconfig| 10 ++
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-bcm-kona.c | 304 +++
Enable PWM drivers and the PWM-based backlight driver.
Signed-off-by: Tim Kryger
Reviewed-by: Alex Elder
Reviewed-by: Markus Mayer
---
arch/arm/configs/bcm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index 2519
Hello.
On 03/12/2014 06:16 PM, Ezequiel Garcia wrote:
The Armada 38x SoC family has a NAND controller, compatible
with the controller in Armada 370/375/XP SoCs. Add support for
it in the devicetree file.
Signed-off-by: Ezequiel Garcia
---
arch/arm/boot/dts/armada-38x.dtsi | 10 ++
This series introduces the driver for the Kona PWM controller found in
Broadcom mobile SoCs like bcm281xx and updates the device tree and the
defconfig to enable use of this hardware on the bcm28155 AP board.
Changes since v2:
- SoC DTS file updated to use real clock's phandle + specifier
- To
Add the device tree node for the PWM on bcm11351 SoCs.
Signed-off-by: Tim Kryger
Reviewed-by: Alex Elder
Reviewed-by: Markus Mayer
---
arch/arm/boot/dts/bcm11351.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
i
Mark the PWM as enabled on the bcm28155 AP board.
Signed-off-by: Tim Kryger
Reviewed-by: Alex Elder
Reviewed-by: Markus Mayer
---
arch/arm/boot/dts/bcm28155-ap.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/bcm28155-ap.dts
b/arch/arm/boot/dts/bcm28155-ap.dts
ind
From: Michal Simek
Register port numbers according to order in DT aliases.
If aliases are not defined, order in DT is used.
If aliases are defined, register port id based
on that.
This patch ensures proper ttyPS0/1 assignment.
[soren]: Combined integer declarations in probe(), removed warning me
On Wed, Mar 12, 2014 at 05:46:53PM +0100, Boris BREZILLON wrote:
> >>I see at least 3 of those timings that could be useful (for the moment) :
> >>- tR: this one should be used to fill the chip_delay field
> >>- tPROG and tBERS: could be used within nand_wait to choose the timeo
> >> value appro
A comment states, that, according to the data sheet, to enable
interrupts the disable register should be written, but the enable
register could be left untouched. And it suspsects a HW bug requiring
to write both.
Reviewing the data sheet, these statements seem wrong. Just as one would
expect. Writ
This is all white space and comment clean up. Mostly reformatting
comments.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 210 +
1 file changed, 74 insertions(+), 136 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/dr
Print a warning if the clock notifier rejects a clock frequency change
to facilitate debugging (see:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/304329/focus=304379)
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 4 +++-
1 file changed, 3 insertions(+), 1 deleti
A lot of read-modify-write sequences used a one-line statement which
nests a readl() within a writel(). Convert this into code sequences that
make the three steps more obvious.
Signed-off-by: Soren Brinkmann
---
drivers/tty/serial/xilinx_uartps.c | 52 ++
1 fi
Add binding documentation for the Cadence UART.
Signed-off-by: Soren Brinkmann
Acked-by: Peter Crosthwaite
Acked-by: Rob Herring
---
.../devicetree/bindings/serial/cdns,uart.txt | 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bin
The Zynq UART is Cadence IP and the driver has been renamed accordingly.
Migrate the DT to use the new binding for the UART driver.
Signed-off-by: Soren Brinkmann
Acked-by: Peter Crosthwaite
Acked-by: Rob Herring
---
This change depends on 'tty: xuartps: Rebrand driver as Cadence UART',
which i
From: Michal Simek
No functional changes.
Signed-off-by: Michal Simek
---
drivers/tty/serial/xilinx_uartps.c | 109 +
1 file changed, 49 insertions(+), 60 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/drivers/tty/serial/xilinx_uartps.c
ind
Here is a fixed and extended v3. I picked up Michal's patches and
incorporated them into the series. Those are the first two patches.
The 'rebranding' patch is correspondingly extended to convert the new
code as well.
The erroneously changed compatibility string has been reverted back to
what it s
Hi,
>> +MODULE_DEVICE_TABLE(of, xgene_ahci_of_match);
>> +
>> +static struct platform_driver xgene_ahci_driver = {
>> + .probe = xgene_ahci_probe,
>> + .remove = ata_platform_remove_one,
>
> It is good to use ata_platform_remove_one() here but some code still needs
> to callback ahci_platf
On Wednesday 12 March 2014 17:14:52 Lee Jones wrote:
> > > > > +This binding describes a SATA device.
> > > > > +
> > > > > +Required properties:
> > > > > + - compatible : Must be "st,ahci"
> > > >
> > > > Is there not a more specific name? This is awfully generic.
> > >
> > > There isn'
Le 12/03/2014 19:27, Warner Losh a écrit :
On Mar 12, 2014, at 12:07 PM, Boris BREZILLON wrote:
Add documentation for the ONFI NAND timing mode property.
I don’t see a Toggle/JEDEC mode timing property. Will that be defined for
Toshiba, Samsung
and San Disk flash? Or will this be limited to
On Mar 12, 2014, at 12:07 PM, Boris BREZILLON wrote:
> Add documentation for the ONFI NAND timing mode property.
I don’t see a Toggle/JEDEC mode timing property. Will that be defined for
Toshiba, Samsung
and San Disk flash? Or will this be limited to Micron, Intel and Hynix (the
only ones
sup
Hi,
Thanks for updating this patch, there are still some issue left though
(please see below).
On Tuesday, March 11, 2014 04:11:34 PM Loc Ho wrote:
> This patch adds support for the APM X-Gene SoC AHCI SATA host controller
> driver. It requires the corresponding APM X-Gene SoC PHY driver. This
>
Add a function to retrieve NAND timing mode (ONFI timing mode) from a given
DT node.
Signed-off-by: Boris BREZILLON
---
drivers/of/of_mtd.c| 19 +++
include/linux/of_mtd.h |8
2 files changed, 27 insertions(+)
diff --git a/drivers/of/of_mtd.c b/drivers/of/of_m
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON
---
include/linux/mtd/nand.h | 49 ++
1 file changed, 49 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nan
Add documentation for the ONFI NAND timing mode property.
Signed-off-by: Boris BREZILLON
---
Documentation/devicetree/bindings/mtd/nand.txt |8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt
b/Documentation/devicetree/bindings/mtd/nand.
Add NAND Flash controller node definition to the A20 SoC.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 9ff0948..4c14ed8 100644
--- a
Define the NAND controller pin configs.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sun7i-a20.dtsi | 80 ++
1 file changed, 80 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 4c14ed8..c8095c5 100
Add support for the sunxi NAND Flash Controller (NFC).
Signed-off-by: Boris BREZILLON
---
drivers/mtd/nand/Kconfig |6 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/sunxi_nand.c | 1276 +
3 files changed, 1283 insertions(+)
create mo
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/mtd/sunxi-nand.txt | 48
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt
diff --git
Enable the NFC and describe the NAND flash connected to this controller.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
b/arch/arm/boot/dts/sun7i-a2
Add a converter to retrieve NAND timings from an ONFI NAND timing mode.
This only support SDR NAND timings for now.
Signed-off-by: Boris BREZILLON
---
drivers/mtd/nand/Makefile |2 +-
drivers/mtd/nand/nand_timings.c | 248 +++
include/linux/mtd/nand
This series adds support for the sunxi NAND Flash Controller (NFC).
I'll split this series for the next round:
1) NAND timings
2) sunxi NAND controller driver
But I'd like to have some feedback on the NAND timings stuff before doing this.
Any review on the sunxi driver is welcome (for the moment
This section will list xtfpga platform-specific drivers.
Signed-off-by: Max Filippov
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c6d0e93..9f75849 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9768,6 +9768,12 @@ L: linux-ser...@
Signed-off-by: Max Filippov
---
Documentation/devicetree/bindings/spi/spi-xtensa-xtfpga.txt | 9 +
1 file changed, 9 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-xtensa-xtfpga.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-xtensa-xtfpga.txt
b/D
This simple SPI master controller is built into xtfpga bitstreams. It
always transfers 16 bit words in SPI mode 0, automatically asserting CS
on transfer start and deasserting on end.
Signed-off-by: Max Filippov
---
Changes v2 -> v3:
- support all transfer widths in the range 1...16 bit;
- don't
Hello,
this series adds driver for SPI controller used on xtfpga xtensa platform,
device tree binding documentation and an entry to MAINTAINERS.
Changes v2 -> v3:
- support all transfer widths in the range 1...16 bit;
- don't swap bytes of 16 bit transfers.
Changes v1 -> v2:
- support 8 bit tran
* George Cherian [140311 22:02]:
> Hi Tony,
>
> On 3/7/2014 5:26 PM, George Cherian wrote:
> >The patch series adds USB dt nodes for am43xx epos and gp evm
> >
> >Boot tested with Benoit's for_3.15 + following patches
> >
> >https://patchwork.kernel.org/patch/3600821/
> >https://patchwork.kernel
If the sh_eth device is registered using OF, then the driver
should call of_mdiobus_register() to register the PHYs described
in the devicetree and then use of_phy_connect() to connect the
PHYs to the device.
This ensures that any PHYs registered in the device tree are
appropriately connected to t
* Roger Quadros [140307 02:18]:
> From: Keshava Munegowda
>
> Create hwmods for ocp2scp3 and sata modules.
Paul, does this look OK to you?
Regards,
Tony
> [Roger Q] Clean up.
>
> CC: Benoit Cousson
> CC: Paul Walmsley
> CC: Tony Lindgren
> Signed-off-by: Balaji T K
> Signed-off-by: Rog
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