On Sunday 29 June 2014 16:01:12 Robert Jarzmik wrote:
> +Required properties:
> + - compatible: Should be "marvell,pxa270-udc" for USB controllers
> + used in device mode.
> + - reg: usb device MMIO address space
> + - interrupts: single interrupt generated by the UDC IP
> + - clocks: input clock
On Sunday 29 June 2014 20:32:20 Robert Jarzmik wrote:
> As the RFC posted in [1] didn't meet an unrivaled success for
> review, I'm posting this serie for PXA27x transition to clock
> framework.
>
> This transition is needed :
> - to enable device-tree drivers port, as clocks are needed almost
>
On Sunday 29 June 2014 20:35:10 Vince Bridgers wrote:
> The synopsys EMAC can be configured for different numbers of multicast hash
> bins and perfect filter entries at device creation time and there's no way
> to query this configuration information at runtime. As a result, a devicetree
> paramete
* Andreas Fenkart [140629 12:43]:
> 2014-06-28 9:23 GMT+02:00 Tony Lindgren :
> > * James Cameron [140628 08:24]:
> >> On Fri, Jun 27, 2014 at 04:39:42PM +0200, Andreas Fenkart wrote:
> >> > I have an mwifiex module(sd8787) behind omap_hsmmc(am33xx-soc)
> >> > The module is non-removable wired fi
Hi Javier,
On 06/27/2014 09:23 PM, Javier Martinez Canillas wrote:
> Hello Peter,
>
> On Fri, Jun 27, 2014 at 8:01 AM, Peter Ujfalusi wrote:
>> Palmas class of devices can provide 32K clock(s) to be used by other devices
>> on the board. Depending on the actual device the provided clocks can be:
On 06/30/2014 03:14 AM, Jingoo Han wrote:
> On Friday, June 27, 2014 10:03 PM, Ajay kumar wrote:
>> On Fri, Jun 27, 2014 at 6:14 PM, Andrzej Hajda wrote:
>>> On 06/27/2014 01:48 PM, Ajay kumar wrote:
On Fri, Jun 27, 2014 at 4:52 PM, Andrzej Hajda wrote:
> +CC DT
>
> On 06/27/2014
Hi,
On Sun, Jun 29, 2014 at 1:50 PM, Andreas Färber wrote:
> This allows to boot the Adapteva Parallella board to serial console.
>
> Cc: Andreas Olofsson
> Signed-off-by: Andreas Färber
Nice and clean DTS, just a couple of comments below.
> diff --git a/arch/arm/boot/dts/zynq-parallella.dts
Hi Javier,
On Thu, Jun 26, 2014 at 11:45 PM, Javier Martinez Canillas
wrote:
> Maxim Integrated Power Management ICs are very similar with
> regard to their clock outputs. Most of the clock drivers for
> these chips are duplicating code and are simpler enough that
> can be converted to use a gene
On Sat, Jun 28, 2014 at 11:16 AM, Peter Chen wrote:
> On Fri, Jun 27, 2014 at 02:55:15PM +0200, Michael Grzeschik wrote:
>> Hi,
>>
>> On Fri, Jun 27, 2014 at 04:53:53PM +0530, Punnaiah Choudary Kalluri wrote:
>> > Zynq soc uses Chipidea/Synopsys usb IP core(CI13612). This patch adds
>> > necessary
On Fri, Jun 27, 2014 at 6:25 PM, Michael Grzeschik wrote:
> Hi,
>
> On Fri, Jun 27, 2014 at 04:53:53PM +0530, Punnaiah Choudary Kalluri wrote:
>> Zynq soc uses Chipidea/Synopsys usb IP core(CI13612). This patch adds
>> necessary glue to allow the chipidea driver to work on zynq soc.
>>
>
> Did you
On Fri, Jun 27, 2014 at 5:53 PM, Sergei Shtylyov
wrote:
> Hello.
>
>
> On 06/27/2014 03:23 PM, Punnaiah Choudary Kalluri wrote:
>
>> Document device tree binding information as required by
>> the ZYNQ USB controller.
>
>
>> Signed-off-by: Punnaiah Choudary Kalluri
>
> [...]
>
>
>> diff --git a/Do
2014-06-27 18:12 GMT+08:00 Mark Rutland :
> On Fri, Jun 27, 2014 at 04:32:21AM +0100, Vincent Yang wrote:
>> 2014-06-26 19:03 GMT+08:00 Mark Rutland :
>> > On Thu, Jun 26, 2014 at 07:23:30AM +0100, Vincent Yang wrote:
>> >> This patch adds new host controller driver for
>> >> Fujitsu SDHCI controll
Dear Kukjin,
On 06/29/2014 08:50 PM, Jonathan Cameron wrote:
> On 27/06/14 05:30, Chanwoo Choi wrote:
>> Changes from v4:
>> - Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure
>>and remove enum variable of ADC version
>> - Fix wrong name of special clock (sclk_tsadc -> scl
The synopsys EMAC can be configured for different numbers of multicast hash
bins and perfect filter entries at device creation time and there's no way
to query this configuration information at runtime. As a result, a devicetree
parameter is required in order for the driver to program these filters
This patch series adds Synopsys specific bindings for the Synopsys EMAC
filter characteristics since those are implementation dependent. The
multicast and unicast filtering code was improved to handle different
configuration variations based on device tree settings.
I verified the operation of th
This change adds bindings for the number of multicast hash bins and perfect
filter entries supported by the Synopsys EMAC. The Synopsys EMAC core is
configurable at device creation time, and can be configured for a different
number of multicast hash bins and a different number of perfect filter
ent
This patch adds socfpga Ethernet filter attributes for multicast
and unicast filters per Synopsys Ethernet IP configuration chosen
by Altera for the Cyclone 5 and Arria SOC FPGAs.
Signed-off-by: Vince Bridgers
---
V2: None
---
arch/arm/boot/dts/socfpga.dtsi |4
1 file changed, 4 inserti
On Friday, June 27, 2014 10:03 PM, Ajay kumar wrote:
> On Fri, Jun 27, 2014 at 6:14 PM, Andrzej Hajda wrote:
> > On 06/27/2014 01:48 PM, Ajay kumar wrote:
> >> On Fri, Jun 27, 2014 at 4:52 PM, Andrzej Hajda wrote:
> >>> +CC DT
> >>>
> >>> On 06/27/2014 12:12 PM, Ajay Kumar wrote:
> Add the m
On Monday, June 30, 2014 8:29 AM, Rickard Strandqvist wrote:
>
> Fix for possible null pointer dereferenc, and there is a risk for memory leak
> in when something
> unexpected happens and the function returns.
Would you split the patch into two patches?
[PATCH 1/2] i2c: pxa: Fix for possible
This patch attaches selftest's device tree data (required by
/drivers/of/selftest.c)
dynamically into live device tree. First, it links selftest device tree data
into the
kernel image and then iterates over all the nodes and attaches them into the
live tree.
This patch will remove the manual pr
Hi
Can someone please check on this!
This will cause an error, and is one of the most obvious ones I've found.
So give it one minute please.
Kind regards
Rickard Strandqvist
2014-06-01 22:03 GMT+02:00 Rickard Strandqvist
:
> In this case the wrong variable is used, which has never been initial
Hi Tomasz,
On 06/27/2014 08:26 PM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 27.06.2014 06:30, Chanwoo Choi wrote:
>> Changes from v4:
>> - Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure
>> and remove enum variable of ADC version
>> - Fix wrong name of special clock (sclk_t
After discussion with especially Wolfram it was decided to convert the code to
use the Managed Device Resource.
I have now tried to create a patch with Devres, hope it is correct.
But a code review is probably more relevant than usual.
I also lack this kind of hardware so preferably should someone
Fix for possible null pointer dereferenc, and there is a risk for memory leak
in when something unexpected happens and the function returns.
Signed-off-by: Rickard Strandqvist
---
drivers/i2c/busses/i2c-pxa.c | 37 -
1 file changed, 16 insertions(+), 21 del
Hi Laura,
Am 29.06.2014 21:06, schrieb Laura Abbott:
> Commit 1c2f87c22566cd057bc8cde10c37ae9da1a1bb76
> (ARM: 8025/1: Get rid of meminfo) dropped the upper bound on
> the number of memory banks that can be added as there was no
> technical need in the kernel. It turns out though, some bootloaders
This allows to boot the Adapteva Parallella board to serial console.
Cc: Andreas Olofsson
Signed-off-by: Andreas Färber
---
arch/arm/boot/dts/Makefile| 4 ++-
arch/arm/boot/dts/zynq-parallella.dts | 63 +++
2 files changed, 66 insertions(+), 1 deleti
Hello,
This patch adds an initial device tree for the Parallella board.
UART, SD card, Ethernet are enabled.
Not yet enabled are HDMI (FPGA, ADV7513), QSPI and 2x USB.
Where I'm a bit unsure is the PHY placement; placement as subnode of the
GEM corresponds to what was in the downstream 3.12 base
On 06/27/2014 10:53 AM, Johannes Pointner wrote:
This patch adds the vendor prefix for "epcos" to the vendor-prefixes.
Signed-off-by: Johannes Pointner
Copying devicetree mailing list for Ack.
Guenter
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 ins
Currently, early_init_dt_scan validates the header, sets the
boot params, and scans for chosen/memory all in one function.
Split this up into two separate functions (validation/setting
boot params in one, scanning in another) to allow for
additional setup between boot params and scanning the memory
Commit 1c2f87c22566cd057bc8cde10c37ae9da1a1bb76
(ARM: 8025/1: Get rid of meminfo) dropped the upper bound on
the number of memory banks that can be added as there was no
technical need in the kernel. It turns out though, some bootloaders
(specifically the arndale-octa exynos boards) may pass invali
Document the device-tree binding of Marvell PXA based SoCs.
PXA clocks are mostly fixed rate and fixed ratio clocks derived from an
external oscillator, and gated by a register set (CKEN or CKEN*).
Signed-off-by: Robert Jarzmik
---
.../devicetree/bindings/clock/pxa-clock.txt| 32
As the RFC posted in [1] didn't meet an unrivaled success for
review, I'm posting this serie for PXA27x transition to clock
framework.
This transition is needed :
- to enable device-tree drivers port, as clocks are needed almost
everywhere
- to enable the long term multi-platform kernel to su
Add the clock tree description for the PXA27x based boards.
Signed-off-by: Robert Jarzmik
---
arch/arm/boot/dts/pxa27x.dtsi| 134 ++-
include/dt-bindings/clock/pxa2xx-clock.h | 45 +++
2 files changed, 178 insertions(+), 1 deletion(-)
create mode
Move pxa27x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
This is the preliminary step in the conversion. The remainin
Transition the PXA27x CPUs to the clock framework.
This transition still enables legacy platforms to run without device
tree as before, ie relying on platform data encoded in board specific
files.
Signed-off-by: Robert Jarzmik
---
arch/arm/Kconfig | 1 +
arch/arm/mach-pxa/Makefile |
Skip creating the UIO SRAM memory region if no SRAM genalloc has been
passed along. This will be the case for am33xx SoCs.
The order of the memory regions is not changed for already supported
platforms. That is to keep the current behavior for existing userland
drivers.
For am33x this gives one m
Signed-off-by: Andre Heider
---
arch/arm/boot/dts/am33xx.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 4a4e02d..28a7e5d 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -409,6
hwmod's hardreset lines are not deasserted after a reset.
Add the HWMOD_INIT_DEASSERT_HARD_RESET flag to deassert those after a
successful reset.
This is required to get the PRU-ICSS in a usable state on am33xx SoCs.
Signed-off-by: Andre Heider
---
arch/arm/mach-omap2/omap_hwmod.c | 2 ++
arch/
Add support to probe via devicetree.
Signed-off-by: Andre Heider
---
drivers/uio/uio_pruss.c | 46 +++---
1 file changed, 39 insertions(+), 7 deletions(-)
diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pruss.c
index afaf726..2df54ab 100644
--- a/d
Signed-off-by: Andre Heider
---
arch/arm/boot/dts/am335x-boneblack.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts
b/arch/arm/boot/dts/am335x-boneblack.dts
index 305975d..eeb5c2e 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm
Signed-off-by: Andre Heider
---
drivers/uio/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/uio/Kconfig b/drivers/uio/Kconfig
index 5a90914..1678387 100644
--- a/drivers/uio/Kconfig
+++ b/drivers/uio/Kconfig
@@ -106,10 +106,10 @@ config UIO_NETX
config U
Set HWMOD_INIT_DEASSERT_HARD_RESET to get the PRUSS out of hardreset
upon boot.
Signed-off-by: Andre Heider
---
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
b/arch/arm/mach-oma
Replace dma_alloc_coherent() with dmam_alloc_coherent() and remove the
dma_free_coherent() call.
This shaves off 2 vars in the driver data struct.
Signed-off-by: Andre Heider
---
drivers/uio/uio_pruss.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/
This enables the hwmod's associated clocks and gets the device in a
working state.
Signed-off-by: Andre Heider
---
drivers/uio/uio_pruss.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pruss.c
index 2df54ab..28a1c1f 100644
--- a/drivers/ui
Replace resource_size() followed by ioremap() with
devm_ioremap_resource() and remove the iounmap() call.
Signed-off-by: Andre Heider
---
drivers/uio/uio_pruss.c | 20
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pr
Signed-off-by: Andre Heider
---
Documentation/devicetree/bindings/misc/ti,pruss.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/ti,pruss.txt
diff --git a/Documentation/devicetree/bindings/misc/ti,pruss.txt
b/Documentation
Replace kzalloc() by devm_kzalloc() and remove the kfree() calls.
Signed-off-by: Andre Heider
---
drivers/uio/uio_pruss.c | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pruss.c
index c28d6e2..f07545b 100644
--- a/dri
Get rid of the repeating &dev->dev constructs and prevent introducing
new ones.
Signed-off-by: Andre Heider
---
drivers/uio/uio_pruss.c | 37 +++--
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pruss.c
in
Hi,
this series adds PRUv2 support to uio_pruss through devicetree, makes the
device usable on am33xx and enables it on beaglebone black.
Inspired by old patches from Matt Porter found in a downstream tree.
To archieve that this series:
* adds a flag to omap_hwmod.c to get PRUSS out of hardreset
On Sat, Jun 28, 2014 at 12:40 AM, Felipe Balbi wrote:
> On Wed, Jun 18, 2014 at 02:15:42PM +0900, Magnus Damm wrote:
>> Hi Felipe,
>>
>> On Fri, Jun 13, 2014 at 11:25 PM, Felipe Balbi wrote:
>> > Hi,
>> >
>> > On Fri, Jun 13, 2014 at 09:20:31PM +0900, Yoshihiro Shimoda wrote:
>> >> The R-Car H2 a
Add device-tree support to pxa_camera host driver.
Signed-off-by: Robert Jarzmik
---
Since V1: Mark's review
- tmp u32 to long conversion for clock rate
- use device-tree clock binding for mclk output clock
- wildcard pxa27x becomes pxa270
---
drivers/media/platfor
Add device-tree bindings documentation for pxa_camera driver.
Signed-off-by: Robert Jarzmik
---
Since V1: Mark's review
- wildcard pxa27x becomes pxa270
- clock name "camera" becomes "ciclk"
- add mclk clock provider
---
.../devicetree/bindings/media/pxa-camera.txt
It has taken me a long long time to get the OOB interrupt working on the
AP6210 sdio wifi/bt module found on various Allwinner A20 boards. In the
end I found these magic register pokes in the cubietruck kernel tree:
https://github.com/cubieboard2/linux-sunxi/commit/7f08ba395617d17e7a711507503d89a50
From: Chen-Yu Tsai
brcmfmac devices can use an out-of-band interrupt on a GPIO line.
Currently this is specified using platform data. Add support for
specifying out-of-band interrupt via device tree.
Signed-off-by: Chen-Yu Tsai
[ar...@broadcom.com: conditionalize more of-code, use driver debug
Hi All,
Here is v2 of the brcmfmac: OOB interrupt support series.
Changes since v1:
-Post as a stand alone series, rather then together with sunxi pinctrl changes,
etc.
-Add a patch to fixup the names of the register addresses used in the
"brcmfmac: Fix OOB interrupt not working for BCM43362" p
Signed-off-by: Hans de Goede
---
drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h
b/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h
index 3deab79..6e6a366 1
From: Arend van Spriel
The Broadcom bcm43xx sdio devices are fullmac devices that may be
integrated in ARM platforms. Currently, the brcmfmac driver for
these devices support use of platform data. This patch specifies
the bindings that allow this platform data to be expressed in the
devicetree.
Add support for device-tree device discovery. If devicetree is not
provided, fallback to legacy platform data "discovery".
Signed-off-by: Robert Jarzmik
Cc: devicetree@vger.kernel.org
---
Since V1: change OF id mrvl,pxa27x_udc -> marvell,pxa27x-udc
This is a consequence of other DT rev
Add documentation for device-tree binding of arm PXA 27x udc (usb
device) driver.
Signed-off-by: Robert Jarzmik
Cc: devicetree@vger.kernel.org
---
Since V1: change OF id mrvl,pxa27x_udc -> marvell,pxa27x-udc
This is a consequence of other DT reviews on the marvell
namings.
Si
On 27/06/14 05:30, Chanwoo Choi wrote:
Changes from v4:
- Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure
and remove enum variable of ADC version
- Fix wrong name of special clock (sclk_tsadc -> sclk_adc)
- Add reviewed message by Naveen Krishna Chatradhi
- Add functions
On 27/06/14 05:30, Chanwoo Choi wrote:
This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
special clock ('sclk_adc') for ADC which provide clock to internal ADC.
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
Reviewed-by: Naveen Krishna Chatradhi
One trivial i
On 24/06/14 15:46, Denis Carikli wrote:
From: Markus Pargmann
This is a conversion queue driver for the mx25 SoC. It uses the central
ADC which is used by two seperate independent queues. This driver
prepares different conversion configurations for each possible input.
For a conversion it creat
> -Original Message-
> From: iommu-boun...@lists.linux-foundation.org [mailto:iommu-
> boun...@lists.linux-foundation.org] On Behalf Of Fabian Frederick
> Sent: Sunday, June 29, 2014 1:31 PM
> To: linux-ker...@vger.kernel.org
> Cc: Fabian Frederick; Grant Likely; io...@lists.linux-foundat
On 24/06/14 11:38, Denis Carikli wrote:
On 06/21/2014 12:30 PM, Jonathan Cameron wrote:
+.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),\
No known info on converting this to real voltages? I'd normally expect
a scale parameter at least with any raw channel output, but fair enough
if
On 27/06/14 21:48, Belisko Marek wrote:
PIng? Jonathan do you have any objections to this approach? Can you
please pick it? Thx.
Sorry, this one dropped through the cracks.
Applied to the togreg branch of iio.git along with the documentation patch that
goes with it.
Jonathan
On Tue, Feb 18,
On Fri, Jun 27, 2014 at 05:07:25PM +0100, Mark Brown wrote:
> On Sun, Jun 22, 2014 at 05:31:42PM +0200, Beniamino Galvani wrote:
> > When platform data is populated from DT all the regulators are
> > instantiated and the value of num_regulators should be the number of
> > all available regulators r
2014-06-28 9:23 GMT+02:00 Tony Lindgren :
> * James Cameron [140628 08:24]:
>> On Fri, Jun 27, 2014 at 04:39:42PM +0200, Andreas Fenkart wrote:
>> > I have an mwifiex module(sd8787) behind omap_hsmmc(am33xx-soc)
>> > The module is non-removable wired fix to soc. Now the wifi module
>> > needs 2 cl
Mark Rutland writes:
> On Wed, Jun 25, 2014 at 08:54:01PM +0100, Robert Jarzmik wrote:
>> > The name of the clock input doesn't make sense.
>> I don't understand. With [1] does it make any more sense ? If not you'll
>> have to
>> expand a bit more the "doesn't make sense".
>
> My concern is that
Fix checkpatch warning:
WARNING: kfree(NULL) is safe this check is probably not required
Cc: Joerg Roedel
Cc: Grant Likely
Cc: io...@lists.linux-foundation.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Fabian Frederick
---
drivers/iommu/fsl_pamu_domain.c | 3 +--
1 file changed, 1 insertio
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