Hello Arnaud,
On Wed, Nov 19, 2014 at 12:02:11AM +0100, Arnaud Ebalard wrote:
+
+ sdio_pins: sdio-pins {
+ marvell,pins = mpp30, mpp31, mpp32,
+mpp33, mpp34, mpp35;
+ marvell,function = sd0;
+ };
+};
\ No newline at end of file
On Tue, Nov 18, 2014 at 11:39 PM, Eduardo Valentin edubez...@gmail.com wrote:
Different drivers request API extensions in of-thermal. For this reason,
additional callbacks are required to fit the new drivers needs.
The current API implementation expects the registering sensor driver
to
Hi Eduardo,
Different drivers request API extensions in of-thermal. For this
reason, additional callbacks are required to fit the new drivers
needs.
The current API implementation expects the registering sensor driver
to provide a get_temp and get_trend callbacks as function parameters.
On 19 November 2014 00:11, Rob Herring rob.herr...@linaro.org wrote:
On Tue, Nov 18, 2014 at 4:11 PM, Grant Likely grant.lik...@linaro.org wrote:
On Tue, 18 Nov 2014 17:25:45 +
, Mark Rutland mark.rutl...@arm.com
wrote:
On Tue, Nov 18, 2014 at 04:51:45PM +, Grant Likely wrote:
On
Hi,
Following on from Arnds comments about the picophy driver here
https://lkml.org/lkml/2014/11/13/161, this series fixes the
remaining upstreamed drivers for STI, which are mixing address spaces
in the reg property. We do this in a way similar to the keystone
and bcm7445 platforms, by having
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
we should not be mixing address spaces in the reg property like this driver
currently does. This patch updates the driver, dt docs and also the existing
dt nodes to pass the sysconfig offset in the syscon dt property.
This
This patch adds the DT nodes for the extra ehci and ohci usb controllers
on the stih410 SoC.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
arch/arm/boot/dts/stih410.dtsi | 52 ++
1 file changed, 52 insertions(+)
diff --git
This patch adds the dt nodes for the extra usb2 picophys found on the stih410.
These two picophys are used in conjunction with the extra ehci/ohci usb
controllers also found on the stih410.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
arch/arm/boot/dts/stih410.dtsi | 18
This patch adds the dt nodes for the usb2 picophy found on the stih407
device family. It is used on stih407 by the dwc3 usb3 controller when
controlling usb2/1.1 devices.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
arch/arm/boot/dts/stih407-family.dtsi | 9 +
1 file
This patch enables the picoPHY usb phy which is used by
the usb2 and usb3 host controllers when controlling usb2/1.1
devices. It is found in stih407 family SoC's from STMicroelectronics.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
Acked-by: Lee Jones lee.jo...@linaro.org
---
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update
the phy driver to not use the reg property to access the sysconfig register
offsets.
This is because other phy's (miphy28, miphy365) have a combination of memory
mapped
registers and sysconfig control regs, and we
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update
the miphy365 phy driver to access sysconfig register offsets via syscfg dt
property.
This is because the reg property should not be mixing address spaces like it
does
currently for miphy365. This change then also
Hi Uwe,
Uwe Kleine-König u.kleine-koe...@pengutronix.de writes:
On Wed, Nov 19, 2014 at 12:02:11AM +0100, Arnaud Ebalard wrote:
+
+sdio_pins: sdio-pins {
+marvell,pins = mpp30, mpp31, mpp32,
+ mpp33, mpp34, mpp35;
+marvell,function =
On Wednesday 19 November 2014 13:35:44 Benjamin Herrenschmidt wrote:
On Wed, 2014-11-19 at 10:39 +1100, Jeremy Kerr wrote:
Hi Rob,
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 20da3ad..8c7b607 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -493,6
On Tue, Nov 18, 2014 at 12:07:13PM +0100, Hans de Goede wrote:
Review of the u-boot sunxi simplefb patches has led to the decision that
u-boot should not use a specific path to find the nodes as this goes contrary
to how devicetree usually works.
Instead a platform specific compatible +
On Wed, 19 Nov 2014, Peter Griffin wrote:
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
we should not be mixing address spaces in the reg property like this driver
currently does. This patch updates the driver, dt docs and also the existing
dt nodes to pass the
On Wed, 19 Nov 2014 10:02:53 +0800
Mark yao mark@rock-chips.com wrote:
On 2014年11月19日 09:09, Mark yao wrote:
On 2014年11月18日 22:24, Daniel Vetter wrote:
On Tue, Nov 18, 2014 at 02:21:30PM +0100, Boris Brezillon wrote:
Hi Daniel,
On Tue, 18 Nov 2014 09:32:34 +0100
Daniel Vetter
Hi Lorenzo,
You should send this to Bjorn instead of cc. Other, why put the OF related
function in PCI core. Why not move it in drivers/of/of_pci.c ?
On 2014/11/11 0:41, Lorenzo Pieralisi wrote:
The current logic used for PCI domain assignment in arm64
pci_bus_assign_domain_nr() is flawed in
From: Philipp Zabel philipp.za...@gmail.com
This patch adds support for the GiantPlus GPG48273QS5 4.3 WQVGA TFT LCD panel
to the simple-panel driver.
This panel is connected via a parallel bus and uses both HSYNC and VSYNC,
whose lengths are unfortunately not clearly defined. The datasheet only
From: Philipp Zabel philipp.za...@gmail.com
Signed-off-by: Philipp Zabel philipp.za...@gmail.com
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
On Tue, Nov 18, 2014 at 11:55:46PM +0100, Beniamino Galvani wrote:
Would it be better to introduce something like:
static inline bool
spi_transfer_is_last(struct spi_master *master, struct spi_transfer *xfer)
{
return list_is_last(xfer-transfer_list,
master-cur_msg-transfers);
}
Hello Ajay,
On 11/18/2014 07:20 AM, Ajay kumar wrote:
On Sat, Nov 15, 2014 at 3:24 PM, Ajay Kumar ajaykumar...@samsung.com wrote:
This series is based on master branch of Linus tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
I applied your series on top of 3.18-rc5 +
Hi Javier,
In the cover letter, I have mentioned that it is tested on Linus tree:
This series is based on master branch of Linus tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Kindly test the patches with that.
Ajay
On Wed, Nov 19, 2014 at 3:05 PM, Javier Martinez
On Wed, Nov 19, 2014 at 09:16:34AM +, Yijing Wang wrote:
Hi Lorenzo,
You should send this to Bjorn instead of cc. Other, why put the OF related
function in PCI core. Why not move it in drivers/of/of_pci.c ?
I did, you missed v1, and the problem is that with ACPI forthcoming we
do not
Hi Pavel, Sakari,
On 11/18/2014 05:51 PM, Pavel Machek wrote:
Hi!
If the hardware LED changes with one that needs different current, the
block for the adp1653 stays the same, but white LED block should be
updated with different value.
I think that you are talking about sub nodes. Indeed I
Hello Ajay,
On 11/19/2014 10:38 AM, Ajay kumar wrote:
Hi Javier,
In the cover letter, I have mentioned that it is tested on Linus tree:
This series is based on master branch of Linus tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Kindly test the patches with
On Wed, Nov 19, 2014 at 04:39:54PM +0900, Gyungoh Yoo wrote:
If of_match and regulators_node are assigned, don't I need to
call of_regulator_match()? Does regulator_register() call it internally?
So can I write code like below?
static const struct regulator_desc sky81452_reg = {
Doug,
在 2014/11/19 13:14, Doug Anderson 写道:
Caesar,
On Tue, Nov 18, 2014 at 7:25 PM, Caesar Wang caesar.w...@rock-chips.com wrote:
We use the new PWM IP on RK3288,but the PWM's clock indeed incorrect.
Signed-off-by: Caesar Wang caesar.w...@rock-chips.com
---
arch/arm/boot/dts/rk3288.dtsi |
On 4 November 2014 15:03, Addy Ke addy...@rock-chips.com wrote:
The bit of sdio interrupt is 16 in designware implementation,
but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the
number of slot0 in the SDIO interrupt registers.
Signed-off-by: Addy Ke addy...@rock-chips.com
Thanks!
On Wed, 19 Nov 2014, Peter Griffin wrote:
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update
the miphy365 phy driver to access sysconfig register offsets via syscfg dt
property.
This is because the reg property should not be mixing address spaces like it
On Wed, Nov 19, 2014 at 10:35:40AM +0100, Javier Martinez Canillas wrote:
Hello Ajay,
On 11/18/2014 07:20 AM, Ajay kumar wrote:
On Sat, Nov 15, 2014 at 3:24 PM, Ajay Kumar ajaykumar...@samsung.com
wrote:
This series is based on master branch of Linus tree at:
On 06/11/2014 06:27, Vinod Koul :
On Wed, Oct 22, 2014 at 05:22:17PM +0200, Ludovic Desroches wrote:
Hi,
This set of patches introduces support for the new Atmel DMA controller know
as
XDMAC and available on SAMA5D4.
Applied all, thanks
Vinod,
I saw that you had created a topic branch
On Wed, Nov 19, 2014 at 12:03:31PM +0100, Nicolas Ferre wrote:
On 06/11/2014 06:27, Vinod Koul :
On Wed, Oct 22, 2014 at 05:22:17PM +0200, Ludovic Desroches wrote:
Hi,
This set of patches introduces support for the new Atmel DMA controller
know as
XDMAC and available on SAMA5D4.
Hello Paolo,
On 11/19/2014 11:55 AM, Paolo Pisati wrote:
to get a working framebuffer out of linus 318rc4 on my peach pi, i had
to cherry pick these 3 patches:
arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy
I was missing this patch, I've display working now. Thanks for the
Hi Arnd,
On 11/18/2014 09:32 PM, Arnd Bergmann wrote:
On Tuesday 18 November 2014 20:54:36 Grygorii Strashko wrote:
Hi All,
Thank you for your comments.
On 11/17/2014 11:50 PM, Kevin Hilman wrote:
Arnd Bergmann a...@arndb.de writes:
On Monday 17 November 2014 11:14:16 Kevin Hilman wrote:
[adding Kukjin to cc list]
Hello Vivek,
On Wed, Nov 12, 2014 at 5:21 AM, Jingoo Han jg1@samsung.com wrote:
On Thursday, October 30, 2014 10:24 PM, Vivek Gautam wrote:
DP PHY now require pmu-system-controller to handle PMU register
to control PHY's power isolation. Adding the same to
Add the DT fragment for the Marvell Dove LCD controllers.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
The documentation for this binding was submitted previously as part of
the code which parses this - v3.17-rc1~82^2~32^2~2.
arch/arm/boot/dts/dove.dtsi | 14 ++
1
Add micrel,rmii-reference-clock-select-25-mhz to Micrel ethernet PHY
binding documentation.
This property is needed to properly describe some revisions of Micrel
PHYs which has the function of this configuration bit inverted so that
setting it enables 25 MHz rather than 50 MHz clock mode.
Note
Reduce indentation of Micrel PHY binding documentations somewhat.
Also fix reference input clock typo while at it.
Cc: devicetree@vger.kernel.org
Signed-off-by: Johan Hovold jo...@kernel.org
---
Documentation/devicetree/bindings/net/micrel.txt | 26
1 file changed, 13
Hi Javier,
On Wed, Nov 19, 2014 at 5:06 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
[adding Kukjin to cc list]
Hello Vivek,
On Wed, Nov 12, 2014 at 5:21 AM, Jingoo Han jg1@samsung.com wrote:
On Thursday, October 30, 2014 10:24 PM, Vivek Gautam wrote:
DP PHY now require
Dear Arnaud Ebalard,
On Wed, 19 Nov 2014 00:01:47 +0100, Arnaud Ebalard wrote:
This patch adds uartX labels for Armada SoC serial nodes. This is
a preliminary work to be able to easily reference the serial lines
in Device Tree files. One expected use is when providing stdout-path
property
Dear Arnaud Ebalard,
On Wed, 19 Nov 2014 00:01:59 +0100, Arnaud Ebalard wrote:
Now that labels for uartX are available in Marvell Armada .dtsi files,
this patch replaces the /soc/internal-regs/serial@12000 found in
armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more
On Wed, 19 Nov 2014 13:32:31 +1100
, Benjamin Herrenschmidt b...@kernel.crashing.org
wrote:
On Tue, 2014-11-18 at 16:57 +, Grant Likely wrote:
On Fri, 14 Nov 2014 17:58:23 +1100
, Benjamin Herrenschmidt b...@kernel.crashing.org
wrote:
The core always tries to translate any reg
Add node for RTC.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
[n...@ti.com: update with rtc crossbar number]
Signed-off-by: Nishanth Menon n...@ti.com
---
Changes since v1:
- Fixed rtc dt node label.
arch/arm/boot/dts/dra7.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git
Introduce the Texas Instruments lp8860
4 channel LED driver.
This driver configures the device in display cluster mode
as this seems to be the most used configuration at the
time of the driver configuration.
For more product information please see the link below:
Hello everyone,
I've been using several Linux distributions, and writing user-space programs,
for 15 years.
I recently seized an opportunity to move into kernel development, mainly
writing drivers
for an ARM SoC, and I'm finding the transition harder than I expected.
I'm having a hard time
On Tue, 2014-11-18 at 22:11 +, Grant Likely wrote:
* It also helps with exposing the reserved map to userspace, but kexec
has done without that feature for years, and it is in the process of
being deprecated in favour of /reserved-memory anyway.
This is the first I'd heard of
On Wed, Nov 19, 2014 at 10:04:13AM +0100, Boris Brezillon wrote:
AFAIU, the suggestion was to split drm_connector_init and
drm_connector_register calls:
- drm_connector_init call should still be part of the load procedure
(this function adds the connector to the connector list which is
Hey Lukasz,
On Wed, Nov 19, 2014 at 09:21:39AM +0100, Lukasz Majewski wrote:
Hi Eduardo,
big cut
}
On which branch should I apply this patch?
This is based in my -linus branch. That means I will send this for the
next major window, not rc. The branch -fixes of thermal-soc include
On Wednesday 19 November 2014 13:32:45 Grygorii Strashko wrote:
On 11/18/2014 09:32 PM, Arnd Bergmann wrote:
On Tuesday 18 November 2014 20:54:36 Grygorii Strashko wrote:
Have one pmdomain driver in the generic code that knows about clocks,
possibly also regulators and pins and just
If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent,
so theoretically multiple parents could be enabled at the same time, but in
practice only one bit should ever be 1. So to select parent 0, set
the register (*) to 0x01, to select parent 1 set it 0x02, parent 2, 0x04,
parent
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
controller device.
The HLCDC block provides a single RGB output port, and only supports LCD
panels connection to LCD panels for now.
The atmel,panel
Hello,
This patch series adds support for the Atmel HLCDC Display Controller
embedded in the HLCDC block.
The drivers supports basic CRTC functionalities, several overlays and
provides an hardware cursor.
At the moment, it only supports connection to LCD panels through an RGB
connector (defined
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
controller device.
This display controller supports at least one primary plane and might
provide several overlays and an hardware cursor depending on the IP
On Wed, Nov 19, 2014 at 1:37 AM, Frank Rowand frowand.l...@gmail.com wrote:
On 11/18/2014 7:10 AM, Grant Likely wrote:
On Sun, 16 Nov 2014 20:52:56 -0800
, Gaurav Minocha gaurav.minocha...@gmail.com
wrote:
This patch improves the implementation of device tree structure.
Traditional child
On Mon, Nov 17, 2014 at 3:55 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Mon, Nov 17, 2014 at 01:39:18PM +, Grant Likely wrote:
On Mon, Nov 17, 2014 at 12:47 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Mon, Nov 17, 2014 at 12:34:46PM +0100, Hans de Goede
This series is 7th version of interrupt polarity support for MediaTek SoCs.
I rebased previous version on latest tip/irq/irqdomain and use newly added
helper function irq_domain_add_hierarchy(). I also changed according to
Marc's suggestion.
Simplified block diagram for interrupt on my system:
Add binding documentation for Mediatek SoC SYSIRQ.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
.../bindings/arm/mediatek/mediatek,sysirq.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
Add sysirq settings for mt6589/mt8135/mt8127
This also correct timer interrupt flag. The old setting works
because boot loader already set polarity for timer interrupt.
Without intpol support, the setting was not changed so gic
can get the irq correctly.
Signed-off-by: Yingjoe Chen
Mediatek SoCs have interrupt polarity support in sysirq which
allows to invert polarity for given interrupt. Add this support
using hierarchy irq domain.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-mtk-sysirq.c | 158
Add support to use gic as a parent for stacked irq domain.
Signed-off-by: Yingjoe Chen yingjoe.c...@mediatek.com
---
drivers/irqchip/Kconfig | 1 +
drivers/irqchip/irq-gic.c | 78 ---
2 files changed, 55 insertions(+), 24 deletions(-)
diff --git
On Fri, Nov 14, 2014 at 05:03:31PM +0100, Geert Uytterhoeven wrote:
This allows checkpatch to validate more DTSes.
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
Applied to for-next, thanks!
signature.asc
Description: Digital signature
On Fri, Nov 14, 2014 at 05:03:30PM +0100, Geert Uytterhoeven wrote:
This allows checkpatch to validate more DTSes.
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
Applied to for-next, thanks!
signature.asc
Description: Digital signature
Hello Mark,
On 18.11.2014 17:00, Vladimir Zapolskiy wrote:
Hello,
I need to set a GPIO (active high) output high on boot, which enables a
power rail supplying some external devices.
I have a question regarding regulator-boot-on and enable-active-high
fixed regulator device tree
On Tue, 18 Nov 2014 21:16:08 -0600
, Rob Herring r...@kernel.org
wrote:
On Wed, Nov 12, 2014 at 2:54 PM, Kevin Cernekee cerne...@gmail.com wrote:
If an earlycon (stdout-path) node is being used, check for big-endian
or native-endian properties and pass the appropriate iotype to the
driver.
On Wed, Nov 19, 2014 at 2:38 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 19 November 2014 13:35:44 Benjamin Herrenschmidt wrote:
On Wed, 2014-11-19 at 10:39 +1100, Jeremy Kerr wrote:
Hi Rob,
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 20da3ad..8c7b607 100644
On Wed, 12 Nov 2014 12:54:03 -0800
, Kevin Cernekee cerne...@gmail.com
wrote:
With a few tweaks, the PXA serial driver can handle other 16550A clones.
Add a fifo-size DT property to override the FIFO depth (BCM7xxx uses 32),
and {native,big}-endian properties similar to regmap to support SoCs
On Wed, Nov 19, 2014 at 3:29 AM, Lucas Stach l.st...@pengutronix.de wrote:
From: Philipp Zabel philipp.za...@gmail.com
Signed-off-by: Philipp Zabel philipp.za...@gmail.com
Signed-off-by: Lucas Stach l.st...@pengutronix.de
Acked-by: Rob Herring r...@kernel.org
---
On Wednesday 19 November 2014 08:45:58 Rob Herring wrote:
static inline struct device_node *dev_of_node(struct device *of_node)
{
if (!IS_ENABLED(CONFIG_OF))
return NULL;
return dev-of_node;
}
Adding the IS_ENABLED() in a lot of drivers isn't
Hi,
Am 19.11.2014 um 13:50 schrieb Mason:
[...] I'm writing a driver for a temperature sensor, which is
supposed to work
within the hwmon/lm-sensors framework.
The sensor's API consists of 3 memory-mapped registers, which are
accessible over the
SoC's memory bus. [...]
1) Which bus
On Wed, 19 Nov 2014 13:09:36 +
, Ian Campbell ian.campb...@citrix.com
wrote:
On Tue, 2014-11-18 at 22:11 +, Grant Likely wrote:
* It also helps with exposing the reserved map to userspace, but kexec
has done without that feature for years, and it is in the process of
On Wed, 19 Nov 2014 09:24:41 +0100
, Ard Biesheuvel ard.biesheu...@linaro.org
wrote:
On 19 November 2014 00:11, Rob Herring rob.herr...@linaro.org wrote:
On Tue, Nov 18, 2014 at 4:11 PM, Grant Likely grant.lik...@linaro.org
wrote:
On Tue, 18 Nov 2014 17:25:45 +
, Mark Rutland
Am 13.11.2014 um 17:41 schrieb Tomi Valkeinen tomi.valkei...@ti.com:
On 13/11/14 18:25, Dr. H. Nikolaus Schaller wrote:
Hi,
Am 13.11.2014 um 12:51 schrieb Tomi Valkeinen tomi.valkei...@ti.com:
On 13/11/14 00:10, Marek Belisko wrote:
opa362 is amplifier for video and can be connected to
This clock drives the irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.
By making it available to the driver, we make sure it gets enabled when
needed, and allow it to be managed by system or runtime PM.
Signed-off-by: Geert Uytterhoeven
On Wed, Nov 19, 2014 at 8:49 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 19 November 2014 08:45:58 Rob Herring wrote:
static inline struct device_node *dev_of_node(struct device *of_node)
{
if (!IS_ENABLED(CONFIG_OF))
return NULL;
return
On 11/18/2014 04:39 PM, Eduardo Valentin wrote:
Different drivers request API extensions in of-thermal. For this reason,
additional callbacks are required to fit the new drivers needs.
The current API implementation expects the registering sensor driver
to provide a get_temp and get_trend
On 11/19/2014 05:41 PM, Mikko Perttunen wrote:
On 11/18/2014 04:39 PM, Eduardo Valentin wrote:
Different drivers request API extensions in of-thermal. For this reason,
additional callbacks are required to fit the new drivers needs.
The current API implementation expects the registering sensor
On 30/09/2014 18:19, Boris Brezillon :
Add ISI (Image Sensor Interface) DT node.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
I take this one for at91-3.19-dt2
Thanks, best regards.
---
arch/arm/boot/dts/at91sam9g45.dtsi | 32
1 file
Spotted in the Chrome OS 3.8 based device tree.
Needs CONFIG_SENSORS_LM90.
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/exynos5250-spring.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts
Reported-by: Doug Anderson diand...@chromium.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/exynos5250-spring.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts
b/arch/arm/boot/dts/exynos5250-spring.dts
index
The HP Chromebook 11 uses an Atmel maXTouch as trackpad.
The keymap was found by trial-and-error.
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/exynos5250-spring.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git
multi_v7_defconfig has it as Y already, so build it in here, too, for
consistency, and therefore build in HWMON as well.
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/configs/exynos_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Add a memory-controller node for the DDR3 Bus State Controller (DBSC3),
which lies in the A4S PM domain.
There are no documented bindings for the DBSC3 yet (so far there's still
no need for a driver), but all of its properties follow the standard
conventions.
This has no visible effect for now,
On 30/09/2014 18:19, Boris Brezillon :
Add a DT node for the TRNG (True Random Number Generator) block.
Keep this block enabled as it does not depend on any external connection,
and thus should be available on all boards.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
If the default PM domain using PM_CLK is used for PM runtime, the real PM
domain(s) cannot be registered from DT later.
Hence do not enable it when running a multi-platform kernel with genpd
support on an sh73a0. The R-Mobile PM domain driver will take care of
PM runtime management of the module
Hi Simon, Magnus,
This patch series enables DT support for PM domains on the Renesas SH-Mobile
AG5 (sh73a0) SoC. It is marked RFC due to the addition of memory-controllers
nodes without bindings in patch [5/7] and [7/7].
This series builds further on the series [PATCH v5 0/8] ARM:
Make adding special PM domains to an array, and looking them up
later, more generic, so it can be used for all special hardware blocks.
The type of PM domain is also stored, so rmobile_setup_pm_domain() can
use a switch() statement instead of a chain of if/else statements.
Signed-off-by: Geert
Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up all devices to their respective PM domains.
Add memory-controller nodes for the SDRAM Bus State Controllers (SBSC1
and SBSC2), which lie in the A4BC0 resp. A4BC1 PM domains, to
Consolidate the identical rmobile_pd_suspend_*() routines that just
return -EBUSY to prevent a PM domain from being powered down into a
single rmobile_pd_suspend_busy().
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
---
arch/arm/mach-shmobile/pm-rmobile.c | 28
SH-Mobile AG5 (sh73a0) can be handled by the existing bindings.
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
---
Documentation/devicetree/bindings/power/renesas,sysc-rmobile.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Add a special case for PM domains containing a memory controller like
the SDRAM Bus State Controller (SBSC). Such a PM domain must not be
turned off if SDRAM is in use.
On sh73a0 PM domains A4BC0 and A4BC1 each contain an SDRAM Bus State
Controller (SBSC1 resp. SBSC2). On r8a73a4 PM domain A3BC
Document DT bindings of Atmel's TRNG (True Random Number Generator) IP.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
Documentation/devicetree/bindings/hwrng/atmel-trng.txt | 16
1 file changed, 16
Use clk_prepare_enable/_disable_unprepare instead of clk_enable/disable
to work properly with the CCF.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Peter Korsgaard pe...@korsgaard.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
Add a DT node for the TRNG (True Random Number Generator) block.
Keep this block enabled as it does not depend on any external connection,
and thus should be available on all boards.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Hello Andreas,
On 19/11/2014 16:02, Andreas Färber wrote:
Am 19.11.2014 um 13:50 schrieb Mason:
[...] I'm writing a driver for a temperature sensor, which is
supposed to work within the hwmon/lm-sensors framework.
The sensor's API consists of 3 memory-mapped registers, which are
accessible
Add DT support.
Make the driver depend on CONFIG_OF as at91sam9g45 was the only SoC making
use of the TRNG block and this SoC is now fully migrated to DT.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
Hello,
This series adds DT support for the TRNG (True Random Generator) block and
adds missing trng nodes to dtsi files.
Best Regards,
Boris
Boris Brezillon (4):
hwrng: atmel: use clk_prepapre_enable/_disable_unprepare
hwrng: atmel: add DT support
hwrng: atmel: Add TRNG DT binding doc
On Wed, 19 Nov 2014 17:15:47 +0100
Nicolas Ferre nicolas.fe...@atmel.com wrote:
On 19/11/2014 17:07, Boris Brezillon :
Hello,
This series adds DT support for the TRNG (True Random Generator) block and
adds missing trng nodes to dtsi files.
Nitpicking: subject of this cover letter
On 19/11/2014 17:07, Boris Brezillon :
Hello,
This series adds DT support for the TRNG (True Random Generator) block and
adds missing trng nodes to dtsi files.
Nitpicking: subject of this cover letter seems not good ;-)
Herbert, do you think you can take this series yourself or do I have to
On Wed, Nov 19, 2014 at 12:20:53PM +0100, Javier Martinez Canillas wrote:
If someone else is interested, I've pushed a branch [0] with 3.18-rc5 + all
the needed patches.
Ajay, feel free to add to your series:
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
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