Hallo Stefan,
On Wed, Dec 03, 2014 at 01:12:04AM +0100, Stefan Agner wrote:
So far only vectors for up to 48 external interrupts have been
registred in the vector table. Increase the amount of registred
s/registred/registered/
external vectors to 112. Also, add a warning in case NVIC reports
Hello,
On 2014-11-25 10:19, Geert Uytterhoeven wrote:
On Tue, Nov 25, 2014 at 9:57 AM, amit daniel kachhap
amit.dan...@samsung.com wrote:
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index
On 12/02/2014 05:07 PM, Soren Brinkmann wrote:
Add USB nodes to zc702, zc706 and zed device trees.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
---
v3:
- rename phy nodes: usb_phy - phy0
- rebased onto zynq/dt
v2:
- remove '@0' from phy node name
- don't add bogus space
On Tue, 02 Dec 2014, Bryan Wu wrote:
On Tue, Dec 2, 2014 at 12:05 AM, gyun...@gmail.com wrote:
From: Gyungoh Yoo jack@skyworksinc.com
Signed-off-by: Gyungoh Yoo jack@skyworksinc.com
This patch looks good to me and I think Jingoo reviewed it already. So
please take my Ack here:
On Tuesday, December 02, 2014 7:04 PM, Krzysztof Kozłowski wrote:
On 02.12.2014 13:45, Yadwinder Singh Brar wrote:
rtc have different i2c client than power(pmic) block. So rtc device
should sit under its own i2c client in device hierarchy, which
reflects in sysfs also.
This patch
On 12/03/2014 12:05 AM, Lina Iyer wrote:
On Tue, Dec 02 2014 at 10:40 -0700, Lina Iyer wrote:
+
[...]
[ ... ]
+static int __init qcom_spm_init(void)
+{
+int ret;
+
+/*
+ * cpuidle driver need to registered before the cpuidle device
+ * for any cpu. Register the device for the
+ gic: interrupt-controller@12001000 {
+ compatible = arm,cortex-a15-gic, arm,cortex-a9-gic;
+ #interrupt-cells = 3;
+ interrupt-controller;
+ reg = 0 0x12001000 0 0x1000,
+ 0 0x12002000 0 0x1000,
+
Some minors remarks below
Thanks Patrice. I will fix these up in v3.
Mark,
Would you mind casting your eye over this submission prior to
the v3 please?
On 12/02/2014 04:40 PM, Lee Jones wrote:
This patch adds support for the SPI portion of ST's SSC device.
Signed-off-by: Lee Jones
2014-11-27 2:29 GMT+08:00 Murali Karicheri m-kariche...@ti.com:
On 11/25/2014 07:16 AM, Chunyan Zhang wrote:
Add a full sc9836-uart driver for SC9836 SoC which is based on the
spreadtrum sharkl64 platform.
This driver also support earlycon.
[...]
+++ b/drivers/tty/serial/sprd_serial.c
Hi Andy,
Am Mittwoch, den 03.12.2014, 08:54 +0800 schrieb Andy Yan:
+Required properities:
+- compatible: platform specific such as:
+ * fsl,imx6q-hdmi
+ * fsl,imx6dl-hdmi
+ * rockchip,rk3288-dw-hdmi
I think we should add a common compatible value snps,dw-hdmi-tx here:
On śro, 2014-12-03 at 14:32 +0530, Yadwinder Singh Brar wrote:
On Tuesday, December 02, 2014 7:04 PM, Krzysztof Kozłowski wrote:
On 02.12.2014 13:45, Yadwinder Singh Brar wrote:
rtc have different i2c client than power(pmic) block. So rtc device
should sit under its own i2c client in
Hi Kevin, Arnd,
I've been giving this some more thoughts...
On Wed, Nov 26, 2014 at 9:11 PM, Kevin Hilman khil...@kernel.org wrote:
Geert Uytterhoeven ge...@linux-m68k.org writes:
On Mon, Nov 24, 2014 at 9:15 PM, Arnd Bergmann a...@arndb.de wrote:
On Monday 24 November 2014 21:10:05 Geert
Hello Stefan,
On Wed, Dec 03, 2014 at 01:12:03AM +0100, Stefan Agner wrote:
Add support for routable irq domain ops like the GIC interrupt
controller provides. This is useful for asymmetrical multi-
processor SoCs, such as Freescale Vybrid (VF6xx) which have
a Cortex-M4 alongside a Cortex-A5
Hi Philipp:
On 2014年12月03日 17:19, Philipp Zabel wrote:
Hi Andy,
Am Mittwoch, den 03.12.2014, 08:54 +0800 schrieb Andy Yan:
+Required properities:
+- compatible: platform specific such as:
+ * fsl,imx6q-hdmi
+ * fsl,imx6dl-hdmi
+ * rockchip,rk3288-dw-hdmi
I think we should add a common
On 2014年12月03日 02:23, Philipp Zabel wrote:
Hi Andy,
Am Dienstag, den 02.12.2014, 15:42 +0800 schrieb Andy Yan:
diff --git a/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
b/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
new file mode 100644
index 000..107c1ca
---
Hi,
On 12/02/2014 04:45 PM, Maxime Ripard wrote:
Ok, so thinking more about this, I'm still convinced that the MFD
framework is only getting in the way here.
You still haven't said of what exactly it's getting in the way of.
Of using of_clk_define to bind to the mod0 clk in the prcm,
Hi, Laurent
On 12/2/2014 6:14 AM, Laurent Pinchart wrote:
Hi Josh,
Thank you for the patch.
On Friday 28 November 2014 18:28:27 Josh Wu wrote:
Add the document for ov2640 dt.
Cc: devicetree@vger.kernel.org
Signed-off-by: Josh Wu josh...@atmel.com
---
On Wednesday 03 December 2014 17:17:13 Lyra Zhang wrote:
2014-11-27 2:29 GMT+08:00 Murali Karicheri m-kariche...@ti.com:
How about sorting this includes? asm/irq.h go first followed linux/ in
alphabatical order?
There are a few compile warnings if I moved asm/irq.h to the top of
all
Hi, Laurent
On 12/2/2014 6:26 AM, Laurent Pinchart wrote:
Hi Josh,
(CC'ing the devicetree@vger.kernel.org mailing list)
Thank you for the patch.
On Friday 28 November 2014 18:28:26 Josh Wu wrote:
The master clock can be optional. It's a common clock framework clock.
It can make sensor
On Wed, 2014-12-03 at 16:05 +0900, gyun...@gmail.com wrote:
+static ssize_t sky81452_bl_store_enable(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t
count)
+{
+ struct regmap *regmap = bl_get_data(to_backlight_device(dev));
+ unsigned
On Wed, Dec 03, 2014 at 10:50:17AM +0100, Arnd Bergmann wrote:
On Wednesday 03 December 2014 17:17:13 Lyra Zhang wrote:
2014-11-27 2:29 GMT+08:00 Murali Karicheri m-kariche...@ti.com:
How about sorting this includes? asm/irq.h go first followed linux/ in
alphabatical order?
There
From: Kumar Gala ga...@kernel.crashing.org
Change-Id: If643fa5ba0a903aef8f5056a2c90ebecc995b760
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by: Hai-Ying Wang haiying.w...@freescale.com
Signed-off-by: Chunhe Lan
This supports SoC(s) with multiple QMan instances
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
Documentation/devicetree/bindings/soc/fsl/qman.txt | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/qman.txt
From: Kumar Gala ga...@kernel.crashing.org
Change-Id: I16e63db731e55a3d60d4e147573c1af8718082d3
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by: Hai-Ying Wang haiying.w...@freescale.com
[Emil Medve: Sync with the upstream
From: Kumar Gala ga...@kernel.crashing.org
Change-Id: If643fa5ba0a903aef8f5056a2c90ebecc995b760
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by: Hai-Ying Wang haiying.w...@freescale.com
Signed-off-by: Chunhe Lan
This supports SoC(s) with multiple BMan instances
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
Documentation/devicetree/bindings/soc/fsl/bman.txt | 10 ++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/bman.txt
v4: Add binding for the portals phandle
Fix portals phandle
v3: Remove no-map
Adjust alloc-ranges for the 32-/36-bit SoC(s)
v2: Remove some reserved-memory properties
Split the patchset per IP block
Refined patch assignment
Emil Medve (2):
From: Kumar Gala ga...@kernel.crashing.org
Change-Id: I16e63db731e55a3d60d4e147573c1af8718082d3
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Geoff Thorpe geoff.tho...@freescale.com
Signed-off-by: Hai-Ying Wang haiying.w...@freescale.com
[Emil Medve: Sync with the upstream
On Tue, 02 Dec 2014, Sean Paul wrote:
This patch refactors the dt parsing code to avoid setting platform_data,
instead just setting lp-pdata directly. This facilitates easier
probe deferral since the current scheme would require us to clear out
dev-platform_data before deferring.
Cc:
On Tue, 02 Dec 2014, Sean Paul wrote:
This patch adds a supply regulator to the lp855x platform data to facilitate
powering on/off the 3V rail attached to the controller.
Cc: Stéphane Marchesin marc...@chromium.org
Cc: Aaron Durbin adur...@chromium.org
Acked-by: Milo Kim milo@ti.com
On Wednesday 03 December 2014 01:12:02 Stefan Agner wrote:
The inline function register_routable_domain_ops is only usable if
CONFIG_ARM_GIC is set. Make it depend on this configuration. This
also allows other SoC interrupt controller to provide such a
function.
Signed-off-by: Stefan Agner
On Wednesday 03 December 2014 01:12:03 Stefan Agner wrote:
+#ifdef CONFIG_ARM_NVIC
+extern const struct irq_domain_ops *nvic_routable_irq_domain_ops;
+static inline void __init register_routable_domain_ops
+ (const struct irq_domain_ops *ops)
+{
+
On Wednesday 03 December 2014 01:12:05 Stefan Agner wrote:
+
+static int vf610_mscm_domain_xlate(struct irq_domain *d,
+ struct device_node *controller,
+ const u32 *intspec, unsigned int intsize,
+ unsigned
On Wednesday 03 December 2014 01:12:06 Stefan Agner wrote:
+Freescale Vybrid Miscellaneous System Control Module
+
+The MSCM IP contains Access Control and TrustZone Security hardware,
+CPU Configuration registers and Interrupt Router control.
+
+Required properties:
+- compatible :
On Wednesday 03 December 2014 01:12:08 Stefan Agner wrote:
Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.
Signed-off-by:
On Wednesday 03 December 2014 01:12:09 Stefan Agner wrote:
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 89c4b5c..fdebe18 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -459,6 +459,18 @@ config ARCH_FOOTBRIDGE
Support for systems based on the DC21285 companion chip
On 12/03/14 01:29, Lad, Prabhakar wrote:
From: Benoit Parrot bpar...@ti.com
This patch adds Video Processing Front End (VPFE) driver for
AM437X family of devices
Driver supports the following:
- V4L2 API using MMAP buffer access based on videobuf2 api
- Asynchronous sensor/decoder sub
On Wednesday 03 December 2014 01:12:10 Stefan Agner wrote:
diff --git a/arch/arm/boot/dts/vf610m4-colibri.dts
b/arch/arm/boot/dts/vf610m4-colibri.dts
new file mode 100644
index 000..051ee0f
--- /dev/null
+++ b/arch/arm/boot/dts/vf610m4-colibri.dts
@@ -0,0 +1,52 @@
+/*
+ * Device tree
AT91 SoCs have a memory range reserved for internal bus configuration.
Expose those registers so that drivers can make use of the matrix syscon
declared in at91 DTs.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Lee Jones lee.jo...@linaro.org
---
Changes since v3:
-
Add a runtime interface to using configfs for generic device tree overlay
usage. With it its possible to use device tree overlays without having
to use a per-platform overlay manager.
Please see Documentation/devicetree/configfs-overlays.txt for more info.
Changes since v2:
- Removed ifdef
On Tue, Dec 02, 2014 at 03:35:47PM +0530, Harini Katakam wrote:
From: Vishnu Motghare vish...@xilinx.com
Cadence I2C controller has bug wherein it generates invalid read transactions
after time-out in master receiver mode. This driver does not use the HW
timeout and this interrupt is
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi
b/arch/arm/boot/dts/at91sam9261.dtsi
index 7119f1f..e52ae97 100644
---
The at91rm9200, at91sam9260, at91sam9261 and at91sam9263 SoCs have slightly
different UDC IPs.
Those differences were previously handled with cpu_is_at91xx macro which
are about to be dropped for multi-platform support, thus we need to
change compatible strings.
Signed-off-by: Boris Brezillon
Allocate udc structure instead of relying on the statically declared
object.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/usb/gadget/udc/at91_udc.c | 101 ++
1 file changed, 27 insertions(+), 74 deletions(-)
diff --git
cpu_is_at91xxx are a set of macros defined in mach/cpu.h and are here used
to detect the SoC we are booting on.
Use compatible string + a caps structure to replace those cpu_is_xxx tests.
Remove all mach and asm headers (which are now unused).
Signed-off-by: Boris Brezillon
Three compatible strings have been added to the at91_udc driver.
Update the documentation accordingly.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
Documentation/devicetree/bindings/usb/atmel-usb.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
Since non-DT board support has been removed from the at91 architecture we
can safely remove non-DT handling code.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/usb/gadget/udc/Kconfig| 1 +
drivers/usb/gadget/udc/at91_udc.c | 16 ++--
2 files
Peripheral clock is named pclk and system clock is named hclk (those are
the names expected by the at91_udc driver).
Drop the deprecated usb_clk (formerly used to configure the usb clock rate
which is now directly configurable through hclk).
Signed-off-by: Boris Brezillon
Make use of devm_ functions to simplify probe and remove code.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/usb/gadget/udc/at91_udc.c | 116 +-
1 file changed, 39 insertions(+), 77 deletions(-)
diff --git
Hello,
This series reworks the at91_udc driver to prepare at91 for multi-platform
support.
It also include several fixes:
- fix clock names to be consistent with other USB drivers
- document clocks and clock-names properties in atmel-usb DT bindings doc
and some cleanup changes:
- remove
The driver is requesting clock by their global name (those declared in the
clk_lookup list), but this only works with !CCF kernels.
Now that all SoCs have moved to CCF, fix the driver to use local names
(hclk and pclk).
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
Now that at91 system clocks forward set_rate request to their parent we
can remove the uclk clock and directly call clk_set_rate on fclk.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/usb/gadget/udc/at91_udc.c | 27 +++
The at91_udc driver request 2 clocks, and thus need them to be defined in
the device tree.
Document the clocks and clock-names properties so that everybody use the
correct names.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
Am Mittwoch, den 03.12.2014, 17:46 +0800 schrieb Andy Yan:
On 2014年12月03日 02:23, Philipp Zabel wrote:
Hi Andy,
Am Dienstag, den 02.12.2014, 15:42 +0800 schrieb Andy Yan:
diff --git a/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
Hi Simon,
On Mon, Nov 10, 2014 at 7:49 PM, Geert Uytterhoeven
geert+rene...@glider.be wrote:
This patch series finalizes the conversion from the vendor-specific
renesas,clock-indices to the generic clock-indices, started by Ben Dooks.
The patches for r8a7790 and r8a7791 were extracted from a
On 2014年12月03日 19:52, Philipp Zabel wrote:
Am Mittwoch, den 03.12.2014, 17:46 +0800 schrieb Andy Yan:
On 2014年12月03日 02:23, Philipp Zabel wrote:
Hi Andy,
Am Dienstag, den 02.12.2014, 15:42 +0800 schrieb Andy Yan:
diff --git a/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
Hi,
This set does a minor fix and an update:
- Fix a typo in the max voltage property of smps6 (vdd_gpu) regulator node
added by
the patch : c56a831ca47e (ARM: dts: DRA7: Add TPS659038 PMIC nodes)
- Update max voltage property of smps7 (vdd_core) regulator node to align
with the
The max expected voltage for VDD_GPU, connected to SMPS6, is 1.25V.
Correct regulator max voltage constraint to meet this requirement.
Document reference: DRA74 Data Manual, SPRS857M - Dec 2012,
Revised Oct 2014.
Fixes: c56a831ca47e (ARM: dts: DRA7: Add TPS659038 PMIC nodes)
As per the latest Data Manual, for newer samples,
the nominal voltage required for VDD_CORE at OPP_NOM can be
upto 1.06V which was 1.03V earlier.
Update the regulator max voltage constraint for SMPS7,
connected to VDD_CORE, to meet this requirement.
Document reference:
DRA74 Data Manual,
2014-12-03 18:11 GMT+08:00 Russell King - ARM Linux li...@arm.linux.org.uk:
On Wed, Dec 03, 2014 at 10:50:17AM +0100, Arnd Bergmann wrote:
On Wednesday 03 December 2014 17:17:13 Lyra Zhang wrote:
2014-11-27 2:29 GMT+08:00 Murali Karicheri m-kariche...@ti.com:
How about sorting this
Hi,
On 30/11/14 15:07, Marek Belisko wrote:
+#include video/omap-panel-data.h
This should not be needed, as the driver is DT only.
+static int opa362_probe(struct platform_device *pdev)
+{
+ struct device_node *node = pdev-dev.of_node;
+ struct panel_drv_data *ddata;
+ struct
2014-12-03 17:50 GMT+08:00 Arnd Bergmann a...@arndb.de:
On Wednesday 03 December 2014 17:17:13 Lyra Zhang wrote:
2014-11-27 2:29 GMT+08:00 Murali Karicheri m-kariche...@ti.com:
How about sorting this includes? asm/irq.h go first followed linux/ in
alphabatical order?
There are a few
On 30/11/14 15:07, Marek Belisko wrote:
Signed-off-by: Marek Belisko ma...@goldelico.com
---
.../devicetree/bindings/video/ti,opa362.txt| 38
++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/ti,opa362.txt
diff
Hi Philipp:
On 2014年12月02日 21:00, Philipp Zabel wrote:
Hi Andy,
Am Dienstag, den 02.12.2014, 20:34 +0800 schrieb Andy Yan:
Hi Philipp:
On 2014年12月02日 18:24, Philipp Zabel wrote:
Hi Andy,
Am Dienstag, den 02.12.2014, 15:45 +0800 schrieb Andy Yan:
[...]
+static int
On Wednesday, December 03, 2014 2:56 PM, Krzysztof Kozlowski wrote:
On śro, 2014-12-03 at 14:32 +0530, Yadwinder Singh Brar wrote:
On Tuesday, December 02, 2014 7:04 PM, Krzysztof Kozłowski wrote:
On 02.12.2014 13:45, Yadwinder Singh Brar wrote:
rtc have different i2c client than
On Tue, Dec 02, 2014 at 09:18:35PM -0800, Doug Anderson wrote:
You still seem to be missing versions in your subject line and missing
info on what changed version to version. The latest version you just
sent (v4?) is still missing it.
Unless Mark says so then I don't think you need to spin
On Wed, 3 Dec 2014, Arnd Bergmann wrote:
On Wednesday 03 December 2014 01:12:02 Stefan Agner wrote:
The inline function register_routable_domain_ops is only usable if
CONFIG_ARM_GIC is set. Make it depend on this configuration. This
also allows other SoC interrupt controller to provide
On 12/03/2014 06:03 AM, Ravikumar Kattekola wrote:
Hi,
This set does a minor fix and an update:
- Fix a typo in the max voltage property of smps6 (vdd_gpu) regulator node
added by
the patch : c56a831ca47e (ARM: dts: DRA7: Add TPS659038 PMIC nodes)
- Update max voltage
Hi Andy,
Am Mittwoch, den 03.12.2014, 20:32 +0800 schrieb Andy Yan:
My question is not about the available gates at the SoC level, but about
the actual clock inputs from point of view of the HDMI TX IP.
It could be that the hdmi_ctrl_clk gates all inputs to the module and
bus clocks
Hi Philipp:
On 2014年12月03日 21:09, Philipp Zabel wrote:
Hi Andy,
Am Mittwoch, den 03.12.2014, 20:32 +0800 schrieb Andy Yan:
My question is not about the available gates at the SoC level, but about
the actual clock inputs from point of view of the HDMI TX IP.
It could be that the hdmi_ctrl_clk
On Thu, Nov 20, 2014 at 1:37 PM, Vincent Yang
vincent.yang.fuji...@gmail.com wrote:
Driver for Fujitsu MB86S7x SoCs that have a memory mapped GPIO controller.
Signed-off-by: Andy Green andy.gr...@linaro.org
Signed-off-by: Jassi Brar jaswinder.si...@linaro.org
Signed-off-by: Vincent Yang
On Mon, Dec 1, 2014 at 8:26 AM, Alexander Stein
alexander.st...@systec-electronic.com wrote:
Default is active low, but if property is specified in DT set INTPOL flag.
Signed-off-by: Alexander Stein alexander.st...@systec-electronic.com
---
Changes in v2:
* Modified the commit message and
On Mon, Dec 1, 2014 at 3:21 PM, Vivek Gautam gautamvivek1...@gmail.com wrote:
On Fri, Nov 28, 2014 at 9:15 PM, Linus Walleij linus.wall...@linaro.org
wrote:
Apart from that, there are *again* a lot of Exynos patches flying around and
I start to loose track of them. If they do not apply
If the default PM domain using PM_CLK is used for PM runtime, the real PM
domain(s) cannot be registered from DT later.
Hence do not enable it when running a multi-platform kernel with genpd
support on an r8a7740. The R-Mobile PM domain driver will take care of
PM runtime management of the module
Hi Simon, Magnus,
This patch series enables DT support for PM domains on Renesas R-Mobile SoCs.
Currently it's limited to R-Mobile A1 (r8a7740), but given the similarity of
the SYSC System-Controller on the various SH-Mobile/R-Mobile SoCs, and the
abstraction of PM domains in DT, it
Replace the hardcoded addresses for accessing the SYSC PM domain
registers by register offsets, relative to the SYSC base address stored
in struct rmobile_pm_domain.
In the future, the SYSC base address will come from DT.
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
Reviewed-by: Ulf
Populate the PM domains from DT, and provide support to hook up devices
to their respective PM domain.
The always-on power area (e.g. C5 on r8a7740) is created as a PM domain
without software control, to allow Run-Time management of module clocks
for hardware blocks inside this area.
Special
Use the just introduced genpd attach/detach callbacks to register the
devices' module clocks, instead of doing it directly, to make it
DT-proof.
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
---
v6:
- No changes,
v5:
- Update for
Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up all devices to their respective PM domains.
Add a minimal device node for the Coresight-ETM hardware block, and hook
it up to the D4 PM domain, so the R-Mobile System Controller
The Renesas R-Mobile System Controller provides a.o. power management
support, following the generic PM domain bindings in
Documentation/devicetree/bindings/power/power_domain.txt.
For now this supports the R-Mobile A1 (r8a7740) only, but it should be
sufficiently generic to handle other members
If CONFIG_PM_RUNTIME is not set, the clocks must be enabled before the
devices can be used.
Currently these clocks are enabled by the !CONFIG_PM_RUNTIME version of
pm_clk_notify, activated by the hack in drivers/sh/pm_runtime.c, but
this will go away soon (at least for DT).
On detach, disabling
On 12/02/2014 09:26 AM, Kevin Hilman wrote:
Doug Anderson diand...@chromium.org writes:
Hi,
On Mon, Dec 1, 2014 at 2:08 PM, Doug Anderson diand...@chromium.org wrote:
Hi,
On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Chris Zhong z...@rock-chips.com writes:
On Tuesday 02 December 2014 17:39:12 Sean Paul wrote:
.../devicetree/bindings/video/backlight/lp855x.txt | 2 ++
drivers/video/backlight/lp855x_bl.c| 18
++
include/linux/platform_data/lp855x.h | 2 ++
3 files changed, 22
On Wed, Dec 03 2014 at 02:11 -0700, Daniel Lezcano wrote:
On 12/03/2014 12:05 AM, Lina Iyer wrote:
On Tue, Dec 02 2014 at 10:40 -0700, Lina Iyer wrote:
+
[...]
[ ... ]
+static int __init qcom_spm_init(void)
+{
+int ret;
+
+/*
+ * cpuidle driver need to registered before the
Le 01/12/2014 11:27, Boris Brezillon a écrit :
The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be access by several drivers (e.g. to configure
external memory bus timings), hence we declare this register set as a
syscon device.
Hi Nicolas,
On Wed, 3 Dec 2014 15:32:49 +0100
Nicolas Ferre nicolas.fe...@atmel.com wrote:
Le 01/12/2014 11:27, Boris Brezillon a écrit :
The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be access by several drivers (e.g. to configure
On Wed, Dec 03 2014 at 07:31 -0700, Lina Iyer wrote:
On Wed, Dec 03 2014 at 02:11 -0700, Daniel Lezcano wrote:
On 12/03/2014 12:05 AM, Lina Iyer wrote:
On Tue, Dec 02 2014 at 10:40 -0700, Lina Iyer wrote:
+
[...]
[ ... ]
+static int __init qcom_spm_init(void)
+{
+int ret;
+
+/*
+
Le 01/12/2014 11:27, Boris Brezillon a écrit :
The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings,
On Mon, Dec 01, 2014 at 02:56:22PM +0100, Linus Walleij wrote:
On Fri, Nov 28, 2014 at 5:49 PM, Ludovic Desroches
ludovic.desroc...@atmel.com wrote:
This patch allows to have gpio controller with status set to disabled.
gpio_banks represents all the gpio banks available on the device
On 2 December 2014 at 12:15, Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Nov 24, 2014 at 01:28:17PM +0100, Tomeu Vizoso wrote:
The ACTMON block can monitor several counters, providing averaging and firing
interrupts based on watermarking configuration. This implementation monitors
On Wed, Dec 3, 2014 at 3:39 AM, Frank Rowand frowand.l...@gmail.com wrote:
On 11/28/2014 8:48 AM, Grant Likely wrote:
On Wed, 19 Nov 2014 11:30:12 -0800
, Frank Rowand frowand.l...@gmail.com
wrote:
On 11/19/2014 5:56 AM, Grant Likely wrote:
On Wed, Nov 19, 2014 at 1:37 AM, Frank Rowand
On Wed, Dec 3, 2014 at 2:24 AM, Frank Rowand frowand.l...@gmail.com wrote:
On 11/27/2014 9:56 AM, Leif Lindholm wrote:
Add a global binding for the chosen node.
Include a description of the stdout-path, and an explicit statement on
its extra options in the context of a UART console.
Opening
Le 03/12/2014 15:56, Nicolas Ferre a écrit :
Le 01/12/2014 11:27, Boris Brezillon a écrit :
The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range
Le 02/12/2014 09:47, Boris Brezillon a écrit :
The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings,
We found Freescale imx6 and Rockchip rk3288 and Ingenic JZ4780 (Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they also have some
lightly differences, such as phy pll configuration, register width(imx hdmi
register is one byte, but rk3288 is 4 bytes width and can only be
CHECK: Alignment should match open parenthesis
+ if ((hdmi-vic == 10) || (hdmi-vic == 11) ||
+ (hdmi-vic == 12) || (hdmi-vic == 13) ||
CHECK: braces {} should be used on all arms of this statement
+ if (hdmi-hdmi_data.video_mode.mdvi)
[...]
+ else {
[...]
drm driver may probe before the i2c bus, so the driver should
defer probing until it is available
Signed-off-by: Andy Yan andy@rock-chips.com
Reviewed-by: Daniel Kurtz djku...@chromium.org
---
Changes in v16: None
Changes in v15: None
Changes in v14: None
Changes in v13: None
Changes in
IMX6 and Rockchip RK3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly differences, such as phy pll configuration,
register width, 4K support, clk useage, and the crtc mux configuration
is also platform specific.
To reuse the imx
hdmi phy configuration is platform specific, which can be adusted
according to the board to get the best SI
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v16: None
Changes in v15: None
Changes in v14: None
Changes in v13:
- split phy configuration from patch#4
Changes in v12:
the original imx hdmi driver is under drm/imx/,
which depends on imx-drm, so move the imx hdmi
driver out to drm/bridge and rename it to dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v16: None
Changes in v15:
- add prefix dw_hdmi/DW_HDMI for public used dw_hdmi structs
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