RE: [linux-sunxi] [PATCH] ARM: dts: Fix missing usb0_reset for sun4i / sun5i

-Original Message- From: linux-su...@googlegroups.com [mailto:linux- su...@googlegroups.com] On Behalf Of Hans de Goede Sent: Thursday, 25 December 2014 6:19 AM To: Maxime Ripard Cc: linux-arm-ker...@lists.infradead.org; devicetree; linux- su...@googlegroups.com; Roman Byshko; Alain

[PATCH] ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 alias

The Ippo q8h has its serial console connected to the r-uart. Adjust the serial0 alias to match. This fixes the kernel serial console no longer working since 3.19-rc1, because 8250_dw.c now honors dt aliases, causing the serial console to be ttyS5 rather then being ttyS0, as it was in 3.18 and

[PATCH 3.19 REGRESSION FIX] ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 alias

Hi Maxime, ChenYu, The Ippo q8h has its serial console connected to the r-uart. Adjust the serial0 alias to match. This fixes the kernel serial console no longer working since 3.19-rc1, because 8250_dw.c now honors dt aliases, causing the serial console to be ttyS5 rather then being ttyS0, as it

Re: [PATCH v3 1/1] add support for Seagate BlackArmor NAS220

On 22.12.2014 13:57, Evgeni Dobrev wrote: This patch adds support for Seagate BlackArmor NAS220. The Seagate BlackArmor NAS 220 is a NAS system based on Marvell 88f6192. It has 32MB NAND and 128MB DRAM. It has two SATA slots, one Gigabit Ethernet port, two USB 2.0 ports, two buttons and three

Re: [PATCH 2/2] ARM: dts: berlin: add PPI cpu mask to twd timer interrupts

On 25.12.2014 07:12, Jisheng Zhang wrote: Signed-off-by: Jisheng Zhang jszh...@marvell.com Jisheng, thanks for the patches! Please always add some text to the commit log, no matter how simple the change is. --- arch/arm/boot/dts/berlin2.dtsi | 3 ++- arch/arm/boot/dts/berlin2cd.dtsi |

Re: [PATCH v3 1/1] add support for Seagate BlackArmor NAS220

On Thu, Dec 25, 2014 at 02:08:12PM +0100, Sebastian Hesselbarth wrote: +status = okay; +}; + +sata@8 { +status = okay; +nr-ports = 2; I need some update from the other mvebu guys here: Do we have SATA

Re: [PATCH v3 1/1] add support for Seagate BlackArmor NAS220

On 25.12.2014 14:31, Andrew Lunn wrote: On Thu, Dec 25, 2014 at 02:08:12PM +0100, Sebastian Hesselbarth wrote: + status = okay; + }; + + sata@8 { + status = okay; + nr-ports = 2; I need some

Re: [PATCH v3 1/1] add support for Seagate BlackArmor NAS220

Hi Sebastian I'm not sure what you mean here. The binding Documentation says: I was hoping that using phys/phy-names would allow us to get rid of nr-ports property. I haven't checked the corresponding code and likely will not before next year, but we should try to get rid of the nr-ports

Re: [PATCH v3 1/1] add support for Seagate BlackArmor NAS220

On 25.12.2014 15:12, Andrew Lunn wrote: Hi Sebastian I'm not sure what you mean here. The binding Documentation says: I was hoping that using phys/phy-names would allow us to get rid of nr-ports property. I haven't checked the corresponding code and likely will not before next year, but we

Re: [PATCH v4] scsi: ufs: add support of generic PHY and ICE in Qualcomm chips

thanks for inputs. shortly I will upload a new version, where I address you comments thanks, Yaniv On Thursday 04 December 2014 09:24 PM, Christoph Hellwig wrote: On Thu, Nov 27, 2014 at 05:59:58PM +0200, Yaniv Gardi wrote: In this change we add support to the generic PHY framework. Two

[PATCH V6 00/25] Generic BMIPS kernel

V5-V6: Incorporate several fixes/enhancements from Jaedon Shin: - Fix register read/modify/write in RAC flush code. - Fix use of SYS_HAS_CPU_BMIPS32_3300 Kconfig symbol. - Add base platform support for 7358 and 7362. The DTS files follow Andrew Bresticker's new per-vendor directory layout.

[PATCH V6 23/25] MIPS: BMIPS: Refresh BCM3384 DTS files

The DT bindings for this platform have changed as the bootloader and product requirements evolved. In particular, there are both Linux-on-Zephyr and Linux-on-Viper configurations. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/boot/dts/brcm/bcm3384.dtsi| 109

[PATCH V6 09/25] irqchip: bcm7120-l2: Split STB-specific logic into its own function

The BCM7xxx instances of this block (listed in the register manual as simply IRQ0) all have the following items in common: - brcm,int-map-mask: for routing different bits in the L2 to different parent IRQs - brcm,int-fwd-mask: for hardwiring certain IRQs to bypass the L2 and use

[PATCH V6 04/25] MIPS: Create a common asm/mach-generic/war.h

11 platforms require at least one of these workarounds to be enabled; 22 platforms do not. In the latter case we can fall back to a generic version. Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR. Suggested-by: Arnd Bergmann a...@arndb.de Signed-off-by: Kevin Cernekee

[PATCH V6 06/25] irqchip: Update docs regarding irq_domain_add_tree()

Several drivers now use this API, including the ARM GIC driver, so remove the outdated comment. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/IRQ-domain.txt | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/IRQ-domain.txt

[PATCH V6 14/25] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities

Enabling support for more than one BMIPS CPU in the same build may result in different L1_CACHE_SHIFT values, e.g. CPU_BMIPS5000 selects MIPS_L1_CACHE_SHIFT_7 CPU_BMIPS4380 selects MIPS_L1_CACHE_SHIFT_6 anything else defaults to MIPS_L1_CACHE_SHIFT_5 Ensure that if more than one

[PATCH V6 03/25] MIPS: Add dtbs_install target

From: Andrew Bresticker abres...@chromium.org Add the dtbs_install Makefile target to install the dtb files into $INSTALL_DTBS_PATH. Signed-off-by: Andrew Bresticker abres...@chromium.org Tested-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Makefile | 5 + 1 file changed, 5

[PATCH V6 17/25] MIPS: BMIPS: Rewrite DMA code to use dma-ranges property

This is a more standardized way of handling DMA remapping, and it is suitable for the memory map found on BCM3384. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/dma.c | 100 ++ 1 file changed, 68 insertions(+), 32

[PATCH V6 22/25] MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig

Also, add an LE defconfig for set-top box (BCM7xxx). This will allow the BMIPS kernel to run on several non-BCM3384 platforms. Signed-off-by: Kevin Cernekee cerne...@gmail.com Signed-off-by: Jaedon Shin jaedon.s...@gmail.com --- arch/mips/Kconfig | 18 +--

[PATCH V6 25/25] MIPS: BMIPS: Add DTS files for several platforms

Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee

[PATCH V6 20/25] MIPS: BMIPS: Delete the irqchip driver from irq.c

BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no longer need this code under arch/mips. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../devicetree/bindings/mips/brcm/bcm3384-intc.txt | 37

[PATCH V6 24/25] MIPS: BMIPS: Update DT bindings to reflect new SoC support

Add an entry for each supported Broadcom SoC. Signed-off-by: Kevin Cernekee cerne...@gmail.com Signed-off-by: Jaedon Shin jaedon.s...@gmail.com --- Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt | 11 --- Documentation/devicetree/bindings/mips/brcm/soc.txt| 12 2

[PATCH V6 10/25] irqchip: bcm7120-l2: Add support for BCM3380-style controllers

These controllers support multiple enable/status pairs (64+ IRQs), can put the enable/status words at different offsets, and do not support multiple parent IRQs. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../interrupt-controller/brcm,bcm3380-l2-intc.txt | 41

[PATCH V6 08/25] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets

Currently the driver assumes that REG_BASE+0x00 is the IRQ enable mask, and REG_BASE+0x04 is the IRQ status mask. This is true on BCM3384 and BCM7xxx, but it is not true for some of the controllers found on BCM63xx chips. So we will change a couple of key assumptions: - Don't assume that both

[PATCH V6 21/25] MIPS: BMIPS: Use a non-default FIXADDR_TOP setting

This will be required to support BMIPS3300 platforms. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/include/asm/mach-bmips/spaces.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 arch/mips/include/asm/mach-bmips/spaces.h diff --git

[PATCH V6 01/25] MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init()

This function was renamed to mips_cpu_irq_of_init(), so fix it to avoid a compile error. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bcm3384/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/bcm3384/irq.c b/arch/mips/bcm3384/irq.c index

[PATCH V6 19/25] MIPS: BMIPS: Add quirks for several Broadcom platforms

A couple of chips require special handling in order to make SMP secondary boot and/or exception vectors work correctly. Take care of these in setup.c. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/setup.c | 101 +++- 1 file

[PATCH V6 07/25] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time

From: Brian Norris computersforpe...@gmail.com Wakeable interrupts might be pending at boot/init time, because wakeup interrupts might have triggered a resume from S5. So don't clear such wakeups. This means that any driver which requests a wakeable interrupt bit should be prepared to handle an

[PATCH V6 18/25] MIPS: BMIPS: Remove bogus bus name

There is no bcm3384 bus so let's just remove it to avoid confusion. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c index 5099109..ac402ed 100644 ---

[PATCH V6 15/25] MIPS: BMIPS: Flush the readahead cache after DMA

BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer may cause parts of the DMA buffer to be prefetched into the RAC. To avoid possible coherency problems, flush the RAC upon DMA completion. Signed-off-by:

[PATCH V6 16/25] MIPS: BMIPS: Document the firmware-kernel DTB interface

Add a new section covering the Generic BMIPS machine type. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/devicetree/booting-without-of.txt | 28 + 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/booting-without-of.txt

[PATCH V6 05/25] MIPS: bcm3384: Rename bcm3384 target to bmips

This platform is configured primarily through device tree, and we can reuse the same code to support a bunch of other chips. Change the name to reflect this. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Kbuild.platforms | 2 +-

[PATCH V6 12/25] MIPS: Let __dt_register_buses accept a single bus type

Some machines only have one bus type to register (e.g. simple-bus). Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/kernel/prom.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index 452d435..e303cb1 100644

[PATCH V6 11/25] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers

This is the main peripheral IRQ controller on the BCM7xxx MIPS chips; it has the following characteristics: - 64 to 160+ level IRQs - Atomic set/clear registers - Reasonably predictable register layout (N status words, then N mask status words, then N mask set words, then N mask clear

[PATCH V6 02/25] MIPS: Move device-trees into vendor sub-directories

From: Andrew Bresticker abres...@chromium.org Move the MIPS device-trees into the appropriate vendor sub-directories. Signed-off-by: Andrew Bresticker abres...@chromium.org Tested-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Makefile | 2 +-

[PATCH V6 13/25] MIPS: Fall back to the generic restart notifier

If the machine doesn't set its own _machine_restart callback, call the common do_kernel_restart() instead. This allows arch-independent reset drivers from drivers/power/reset/ to be used to reboot the machine. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/kernel/reset.c | 2 ++

[PATCH] clk-rcar-gen2: ADSP clock support

Add the ADSP clock support to the R-Car generation 2 CPG driver. This clock gets derived from PLL1. The layout of the ADSPCKCR register is similar to those of the clocks supported by the 'clk-div6' driver but the divider encoding is non-linear, so can't be supported by that driver... Based on

[PATCH v4 0/6] Add Support for MediaTek PMIC MT6397 MFD Core and Regulator

Hi, The patch sets add support for MediaTek PMIC MT6397 MFD core and its regulator driver. This is hardware layout for access PMIC MT6397 from AP SoC MT8135. Between PMIC MT6397 and MT8135, the physical signal channel is SPI bus. A specific hardware called PMIC Wrapper or PWRAP to handle access

[PATCH v4 1/6] soc: mediatek: Add PMIC wrapper for MT8135 and MT6397 SoC

Add PMIC wrapper of MT8135 to access MT6397 MFD. Signed-off-by: Flora Fu flora...@mediatek.com --- drivers/soc/Kconfig | 1 + drivers/soc/Makefile| 1 + drivers/soc/mediatek/Kconfig| 12 + drivers/soc/mediatek/Makefile | 1 +

[PATCH v4 5/6] arm: dts: mt8135: Add support for MT8135 PMIC wrapper

Add device tree for MT8135 PMIC wrapper in mt8135.dtsi. Signed-off-by: Flora Fu flora...@mediatek.com --- arch/arm/boot/dts/mt8135.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index ec83e69..ab08063 100644

[PATCH v4 4/6] dt-bindings: Add document for MT6397 MFD

Signed-off-by: Flora Fu flora...@mediatek.com --- Documentation/devicetree/bindings/mfd/mt6397.txt | 75 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/mt6397.txt diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt

[PATCH v4 6/6] arm: dts: mt8135: Add support for MT6397 MFD and regulator

Add device tree for MT6397 MFD and regulator in mt8135 evb board file. Signed-off-by: Flora Fu flora...@mediatek.com --- arch/arm/boot/dts/mt8135-evbp1.dts | 193 + 1 file changed, 193 insertions(+) diff --git a/arch/arm/boot/dts/mt8135-evbp1.dts

[PATCH v4 3/6] dt-bindings:: Add document for MT8135 PMIC Wrapper

Signed-off-by: Flora Fu flora...@mediatek.com --- .../soc/mediatek/mediatek,mt8135-pwrap.txt | 51 ++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8135-pwrap.txt diff --git

[PATCH v4 2/6] mfd: MT6397: Add support for PMIC MT6397 MFD

Add core files for MT6397 MFD driver. Signed-off-by: Flora Fu flora...@mediatek.com --- drivers/mfd/Kconfig | 10 + drivers/mfd/Makefile | 1 + drivers/mfd/mt6397-core.c| 94 + include/linux/mfd/mt6397/core.h | 23 +++