Stefan Wahren stefan.wah...@i2se.com hat am 3. Februar 2015 um 21:41
geschrieben:
Hi Sebastian,
Sebastian Reichel s...@kernel.org hat am 28. Januar 2015 um 23:59
geschrieben:
Hi,
On Wed, Jan 28, 2015 at 11:22:05PM +0100, Stefan Wahren wrote:
Mark Brown broo...@kernel.org
Dear Andrew Lunn,
On Fri, 6 Feb 2015 18:05:21 +0100, Andrew Lunn wrote:
I wondering if there should be an explanation for the less common
names here. I'm guessing dev is a device bus of some sort? What is
xsmi? Some sort of extended System Management Interface? And m?
dev is the Device Bus
From: Carlo Caione ca...@caione.org
Signed-off-by: Carlo Caione ca...@caione.org
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Lee Jones lee.jo...@linaro.org
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
On 02/20/2015 12:38 PM, Felipe Balbi wrote:
On Fri, Feb 20, 2015 at 11:07:21AM +0800, zhangfei wrote:
Hi, Balbi
On 02/18/2015 10:35 PM, Felipe Balbi wrote:
On Wed, Feb 18, 2015 at 01:44:21PM +0800, zhangfei wrote:
Hi, Kishon
On 02/18/2015 01:35 PM, Kishon Vijay Abraham I wrote:
Hi,
On
[...]
IRQF_NO_SUSPEND and wakeup fundamentally don't match due to the way
wakeup is implemented in the IRQ core now.
Unless drivers with IRQF_NO_SUSPEND do the wakeup behind the core's back
which is just disgusting and should never happen.
I completely agree that using
Hi Vinod,
On 02/20/2015 07:29 AM, Vinod Koul wrote:
On Sat, Feb 14, 2015 at 02:21:52PM +, Appana Durga Kedareswara Rao wrote:
Hi Vinod,
-Original Message-
From: Vinod Koul [mailto:vinod.k...@intel.com]
Sent: Thursday, February 12, 2015 3:05 PM
To: Appana Durga Kedareswara Rao
Hi everyone,
This is v10 of the axp20x series. v10 reverts back to the DT bindings
from v8. This is the binding currently supported by the kernel drivers
since 3.18. Mark Brown raised concern on the needless changes to
active regulator bindings in v9.
Maxime, I dropped your Acked-by because of
From: Carlo Caione ca...@caione.org
Bindings documentation for the AXP20x driver. In this file also
sub-nodes are documented.
Signed-off-by: Carlo Caione ca...@caione.org
[w...@csie.org: clarify interrupt source for the axp PMIC]
[w...@csie.org: explain dcdc-workmode in detail and trim lines to
On 20/02/15 02:36, Stephen Boyd wrote:
On 02/19/15 09:08, Srinivas Kandagatla wrote:
diff --git a/drivers/Kconfig b/drivers/Kconfig
index c70d6e4..d7afc82 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -184,4 +184,6 @@ source drivers/thunderbolt/Kconfig
source
Hi Eric,
Am Donnerstag, den 19.02.2015, 16:53 -0700 schrieb Eric Nelson:
The BD-SL-i.MX6 (SABRE Lite board) supports three companion displays:
Okaya 1024x600
Hannstar 1024x768
LG 1280x800
This patch adds timing entries into the LDB device tree and aliases
for them and
Thanks Andrew for your comments,
On 19/02/15 18:12, Andrew Lunn wrote:
+
+Required properties:
+
+eeproms: List of phandle and data cell specifier triplet, one triplet
+for each data cell the device might be interested in. The
+triplet consists of the phandle to the eeprom
On Thu, Feb 12, 2015 at 8:56 AM, Hongzhou Yang
hongzhou.y...@mediatek.com wrote:
Since pinconf relate API changes in pinctrl devel branch, a build error
happened.
Send this small patch to fix it.
---
Due to pinconf_generic_parse_dt_config() API changes in pinctrl devel branch,
add one
Hi Pavel,
On 02/20/2015 09:16 AM, Pavel Machek wrote:
Hi!
+What: /sys/class/leds/led/available_sync_leds
+Date: February 2015
+KernelVersion: 3.20
+Contact: Jacek Anaszewski j.anaszew...@samsung.com
+Description: read/write
+ Space separated list of
On Thu, Feb 19, 2015 at 09:30:58AM -0800, Frank Rowand wrote:
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 18:48 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 6:29 AM, Pantelis Antoniou wrote:
Hi Mark,
On Feb 18, 2015, at 19:31 , Mark
Hi!
+What:/sys/class/leds/led/available_sync_leds
+Date:February 2015
+KernelVersion: 3.20
+Contact: Jacek Anaszewski j.anaszew...@samsung.com
+Description: read/write
+ Space separated list of LEDs available for flash strobe
+ synchronization,
On Thu, Feb 19, 2015 at 12:01:14PM -0600, Rob Herring wrote:
On Wed, Feb 18, 2015 at 8:08 PM, Frank Rowand frowand.l...@gmail.com wrote:
On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
Implement a method of applying DT quirks early in the boot sequence.
A DT quirk is a subtree of the boot
On Thursday 19 February 2015 17:49:50 Pali Rohár wrote:
Offset for smc91x must be zero otherwise smc91x linux kernel driver does not
detect smc91x ethernet hardware in qemu N900 machine.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
Is that the same offset on real hardware, or could this
On Friday 20 February 2015 10:24:35 Arnd Bergmann wrote:
On Thursday 19 February 2015 17:49:50 Pali Rohár wrote:
Offset for smc91x must be zero otherwise smc91x linux kernel
driver does not detect smc91x ethernet hardware in qemu
N900 machine.
Signed-off-by: Pali Rohár
On 20/02/15 08:14, Srinivas Kandagatla wrote:
Doesn't this need some sort of select REGMAP somewhere?
May be depends REGMAP would be good.
You are right, just realized that
it should be select REGMAP
and for QFPROM it should be select REGMAP_MMIO
--srini
--
To unsubscribe from this list:
Dear Stephen Boyd,
On Fri, 06 Feb 2015 11:57:58 -0800, Stephen Boyd wrote:
+static const char * const armada_39x_dt_compat[] = {
__initconst?
Good idea. This wasn't done for the other mach-mvebu dt_compat tables,
so I've added a patch to do this as well for the other mach-mvebu
dt_compat
On 20/02/15 01:36, Andreas Färber wrote:
So it seems the mclk is not always set up properly by the kernel,
relying on firmware. Who's in charge of setting that clock up?
Right, it seems audio is only working due the firmware doing some previous
setup. Probably it works on every boot if
On 02/19/2015 09:41 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 04:08 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
Implement a method of applying DT quirks early in the boot sequence.
A DT quirk is a subtree of the boot DT that
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/omap3.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Dear Andrew Lunn,
On Fri, 6 Feb 2015 18:21:53 +0100, Andrew Lunn wrote:
+ chosen {
+ bootargs = console=ttyS0,115200 earlyprintk;
+ };
+
Arnd has been encouraging people not use earlyprintk here. Also a
stdout-path would be nice. We also seem to be missing aliases for
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19, 2015, at 19:30 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 18:48 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 6:29 AM, Pantelis Antoniou
Both dev and m are already used by many of the existing pinctrl DT
bindings for Marvell platforms, so I'm not sure documenting them
specifically in the Armada 39x pinctrl DT binding document makes a lot
of sense. Where should we document them, then? In the generic
'marvell,mvebu-pinctrl.txt'
Hi Boris,
On Wed, Feb 11, 2015 at 04:38:23PM +, Boris Brezillon wrote:
[...]
For the list of impacted drivers, you can have a look at this series [1]
(patches 2 to 5), and I'll take care of the testing part once every one
has agreed on the solution ;-).
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/omap2.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Hi,
While working on the DMA crossbar support for DRA7 typo of devices I have
noticed that the dma-channels and dma-requests properties of sdma wrongly
has # at the beginning.
According to the documentation, it should not have:
Documentation/devicetree/bindings/dma/dma.txt
Since these properties
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19, 2015, at 19:30 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 18:48 , Frank Rowand
Hi Peter,
On Feb 20, 2015, at 16:21 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19, 2015, at 19:30 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at
Hi,
On Thu, Feb 12, 2015 at 03:37:26PM +0800, Zhangfei Gao wrote:
Add usb phy controller for hi6220 platform
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
---
drivers/phy/Kconfig | 9 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-hi6220-usb.c | 306
+ pinctrl@18000 {
+ uart0_pins: uart0-pins {
+ marvell,pins = mpp0, mpp1;
+ marvell,function = ua0;
+ };
+
+ uart1_pins:
Hi Mark,
On Fri, 20 Feb 2015 14:22:08 +
Mark Rutland mark.rutl...@arm.com wrote:
Hi Boris,
On Wed, Feb 11, 2015 at 04:38:23PM +, Boris Brezillon wrote:
[...]
For the list of impacted drivers, you can have a look at this series [1]
(patches 2 to 5), and I'll take care of the
On Fri 2015-02-20 07:36:16, Greg KH wrote:
On Fri, Feb 20, 2015 at 08:56:11AM +0100, Jacek Anaszewski wrote:
On 02/19/2015 10:40 PM, Greg KH wrote:
On Thu, Feb 19, 2015 at 11:02:04AM +0200, Sakari Ailus wrote:
On Wed, Feb 18, 2015 at 11:47:47PM +0100, Pavel Machek wrote:
On Wed
On Fri, Feb 20, 2015 at 11:02:52PM +0300, Sergei Shtylyov wrote:
Hello.
On 12/30/2014 11:20 PM, Sergei Shtylyov wrote:
Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.
Based on the original patch by Konstantin Kozhevnikov
On Fri, Feb 20, 2015 at 11:04:07PM +0300, Sergei Shtylyov wrote:
On 12/30/2014 11:21 PM, Sergei Shtylyov wrote:
Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7790 device tree.
Based on the original patch by Konstantin Kozhevnikov
konstantin.kozhevni...@cogentembedded.com.
On Fri, 2015-02-20 at 21:00 +0100, Uwe Kleine-König wrote:
On Fri, Feb 20, 2015 at 07:01:13PM +0100, Maxime Coquelin wrote:
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 97d07ed..cfd9532 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -774,6 +774,28 @@ config ARCH_OMAP1
On Fri, 2015-02-20 at 20:54 +0100, Uwe Kleine-König wrote:
On Fri, Feb 20, 2015 at 07:01:03PM +0100, Maxime Coquelin wrote:
This patch adds clocksource support for ARMv7-M's System timer,
also known as SysTick.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
On Fri, Feb 20, 2015 at 1:25 PM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
On 20/02/15 17:21, Rob Herring wrote:
On Thu, Feb 19, 2015 at 11:08 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
From: Maxime Ripard maxime.rip...@free-electrons.com
Up until now,
On Thu, Feb 19, 2015 at 09:44:08AM -0800, Doug Anderson wrote:
On Thu, Feb 19, 2015 at 1:44 AM, Mark Brown broo...@kernel.org wrote:
I think what you're suggesting is that here we should add a new
compatible string google,snow-audio instead of adding
google,snow-audio-max98089 here. Then the
On Fri, Feb 20, 2015 at 08:56:11AM +0100, Jacek Anaszewski wrote:
On 02/19/2015 10:40 PM, Greg KH wrote:
On Thu, Feb 19, 2015 at 11:02:04AM +0200, Sakari Ailus wrote:
On Wed, Feb 18, 2015 at 11:47:47PM +0100, Pavel Machek wrote:
On Wed 2015-02-18 17:20:22, Jacek Anaszewski wrote:
Add a
Hi Peter,
On Feb 20, 2015, at 17:00 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 09:35 AM, Ludovic Desroches wrote:
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19, 2015, at 19:30 , Frank Rowand
* The pmc looks like it could be a valid use of the new flag. It also
seems to function as an irqchip.
Do any of its child IRQs need to be handled during the suspend-resume
cycle? If so using IRQF_NO_SUSPEND would seem to be valid.
No they don't, they are used for clock
Dear Andrew Lunn,
On Fri, 20 Feb 2015 15:45:47 +0100, Andrew Lunn wrote:
Lets look at this from the perspective of lies, damn lies, and
statistics:
Kirkwood has a default pinmux configuration in kirkwood.dtsi. Two of
the sixty six .dts files overwrite the defaults.
Dove has a default
On 02/20/2015 09:35 AM, Ludovic Desroches wrote:
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19, 2015, at 19:30 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
Hi Peter,
On Feb 20, 2015, at 17:24 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 10:02 AM, Pantelis Antoniou wrote:
Hi Peter,
On Feb 20, 2015, at 17:00 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 09:35 AM, Ludovic Desroches wrote:
On Fri, Feb 20, 2015
Hi,
On Fri, Feb 20, 2015 at 11:44:37PM +0800, zhangfei wrote:
Hi, Balbi
On 02/20/2015 10:41 PM, Felipe Balbi wrote:
+static void hi6220_start_peripheral(struct hi6220_priv *priv, bool on)
+{
+ struct usb_otg *otg = priv-phy.otg;
+
+ if (!otg-gadget)
+ return;
+
+ if
On 02/20/2015 04:36 PM, Greg KH wrote:
On Fri, Feb 20, 2015 at 08:56:11AM +0100, Jacek Anaszewski wrote:
On 02/19/2015 10:40 PM, Greg KH wrote:
On Thu, Feb 19, 2015 at 11:02:04AM +0200, Sakari Ailus wrote:
On Wed, Feb 18, 2015 at 11:47:47PM +0100, Pavel Machek wrote:
On Wed 2015-02-18
On Fri, Feb 20, 2015 at 04:12:59PM +, Mark Rutland wrote:
Hi Peter,
On Tue, Feb 10, 2015 at 04:14:25PM +, Peter Zijlstra wrote:
On Tue, Feb 10, 2015 at 04:43:12PM +0100, Boris Brezillon wrote:
Replace remaining 'Dumb' occurrences by 'Virtual'.
Remove inappropriate notes in
On 02/20/2015 10:02 AM, Pantelis Antoniou wrote:
Hi Peter,
On Feb 20, 2015, at 17:00 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 09:35 AM, Ludovic Desroches wrote:
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou
Hi, Balbi
On 02/20/2015 10:41 PM, Felipe Balbi wrote:
+static void hi6220_start_peripheral(struct hi6220_priv *priv, bool on)
+{
+ struct usb_otg *otg = priv-phy.otg;
+
+ if (!otg-gadget)
+ return;
+
+ if (on)
+ usb_gadget_connect(otg-gadget);
+
* Pali Rohár pali.ro...@gmail.com [150220 01:56]:
On Friday 20 February 2015 10:24:35 Arnd Bergmann wrote:
On Thursday 19 February 2015 17:49:50 Pali Rohár wrote:
Offset for smc91x must be zero otherwise smc91x linux kernel
driver does not detect smc91x ethernet hardware in qemu
N900
On 02/19/2015 06:28 PM, Pantelis Antoniou wrote:
Hi Tony,
On Feb 19, 2015, at 20:16 , Tony Lindgren t...@atomide.com wrote:
* Pantelis Antoniou pantelis.anton...@konsulko.com [150218 07:03]:
Implement DT quirks for the am33xx beaglebone boards.
--- /dev/null
+++
Hi Peter,
On Tue, Feb 10, 2015 at 04:14:25PM +, Peter Zijlstra wrote:
On Tue, Feb 10, 2015 at 04:43:12PM +0100, Boris Brezillon wrote:
Replace remaining 'Dumb' occurrences by 'Virtual'.
Remove inappropriate notes in kerneldoc headers.
Signed-off-by: Boris Brezillon
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19, 2015, at 19:30 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 18:48 , Frank Rowand
Hi Peter,
On Feb 20, 2015, at 18:34 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 10:38 AM, Pantelis Antoniou wrote:
Hi Peter,
On Feb 20, 2015, at 17:24 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 10:02 AM, Pantelis Antoniou wrote:
Hi Peter,
On Feb
This commit adds a new clock driver for the Marvell Armada 39x family
of processors. This driver is fairly similar to the ones already used
on other Marvell EBU processors, with the following main differences:
* Different set of ratios
* Different set of core clocks
* Configurable reference
As suggested by Stephen Boyd, this commit adds the __initconst
specifier to the dt_compat table declarations used by the
DT_MACHINE_START structures in mach-mvebu land.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/mach-mvebu/board-v7.c | 6 +++---
This commit adds the Device Tree binding documentation to describe the
pin-muxing controller of the Marvell Armada 39x processors. Two
variants are supported for the moment: the 88F6920 (Armada 390) and
88F6928 (Armada 398).
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
This commit updates the ARM CPUs Device Tree binding to document a new
enable method of Marvell Armada 39x processors.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
The Armada 39x, contrary to its predecessor, has a configurable
reference clock frequency, of either 25 Mhz, or 40 Mhz. For the
previous SoCs, it was fixed to 25 Mhz and described directly as such
in the Device Tree.
For Armada 39x, we need to read certain registers to know whether the
frequency
This commit adds a new pinctrl driver for the Marvell Armada 39x
family of processors, which hooks into the existing infrastructure to
support pin-muxing on Marvell EBU processors. Two variants of the
Armada 39x are supported: 88F6920 (Armada 390) and 88F6928 (Armada
398), which have a few
On 02/20/2015 10:38 AM, Pantelis Antoniou wrote:
Hi Peter,
On Feb 20, 2015, at 17:24 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 10:02 AM, Pantelis Antoniou wrote:
Hi Peter,
On Feb 20, 2015, at 17:00 , Peter Hurley pe...@hurleysoftware.com wrote:
On 02/20/2015 09:35 AM,
The Armada 38x SDHCI controller definition in the SoC Device Tree file
is using hardcoded values instead of the nice GIC and IRQ macros
provided by DT header files. This commit fixes that, which allows the
SDHCI interrupt definition to be consistent with was is done in the
rest of the file.
The Armada 38x had an alias for UART0, but not UART1. This commit
fixes that.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/boot/dts/armada-38x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi
On Marvell Armada 38x, the USB2 controller registers are at 0x58000,
so the corresponding Device Tree node should have a unit address of
58000, and not 5. We were using 5 due to an incorrect
copy/pastebin of Armada 370/XP code.
Signed-off-by: Thomas Petazzoni
On Thu, Feb 19, 2015 at 11:08 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
From: Maxime Ripard maxime.rip...@free-electrons.com
Up until now, EEPROM drivers were stored in drivers/misc, where they all had
to
duplicate pretty much the same code to register a sysfs file, allow
With the introduction of the Marvell Armada 39x SoC, the DT bindings
for Marvell EBU clocks need to be extended. This commit include the
corresponding update to the Device Tree bindings documentation.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
This commit adds the Device Tree files for the Armada 39x family of
processors, as well as one Armada 398 Development Board.
Like for other Marvell EBU families, a common armada-39x.dtsi contains
the description of the common features of all Armada 39x SoCs, while
armada-390.dtsi and
This commit adds the stdout-path property in /chosen for all Armada
boards that were not yet carrying this property.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/boot/dts/armada-370-db.dts | 1 +
arch/arm/boot/dts/armada-370-mirabox.dts |
This commit adds the core support for Armada 39x, which is quite
simple:
- a new Kconfig option which selects the appropriate clock and
pinctrl drivers as well as other common features (GIC, L2 cache,
SMP, etc.)
- a new DT_MACHINE_START which references the top-level compatible
The Marvell Armada 39x is a family of two SoCs: the Armada 390 and the
Armada 398, with a slightly different number of interfaces. This
commit introduces the Device Tree binding that documents the top-level
compatible strings for Armada 39x based platforms.
Signed-off-by: Thomas Petazzoni
Hello,
This is the second version of the patch series adding Armada 39x basic
support.
This set of patches add basic support for a new family of Marvell EBU
processors: the Armada 39x. They are based on Cortex-A9 (like Armada
375 and 38x) and the most important new feature is probably the
Now that we support Armada 39x, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details
about those processors. Unfortunately, no datasheet is publicly
available at this time.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
On Fri, Feb 20, 2015 at 8:35 AM, Ludovic Desroches
ludovic.desroc...@atmel.com wrote:
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19, 2015, at 19:30 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 9:00
Hi Rob,
On Feb 20, 2015, at 19:30 , Rob Herring robherri...@gmail.com wrote:
On Fri, Feb 20, 2015 at 8:35 AM, Ludovic Desroches
ludovic.desroc...@atmel.com wrote:
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
On Feb 19,
On Thu, Feb 19, 2015 at 05:08:40PM +, Srinivas Kandagatla wrote:
+static int sunxi_sid_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *device;
+ struct eeprom_sid *sid;
+ struct resource *res;
+ struct eeprom_device *eeprom;
+ struct device *dev =
On Thu, Feb 19, 2015 at 05:08:28PM +, Srinivas Kandagatla wrote:
+static struct class eeprom_class = {
+ .name = eeprom,
+ .dev_groups = eeprom_dev_groups,
+};
+
+int eeprom_register(struct eeprom_device *eeprom)
+{
+ int rval;
+
+ if (!eeprom-regmap ||
Thanks for the first round of reviews.
Most of the comments made have been taken into account (see below for details),
except that I failed to find an easy/clean way to move vector_table location in
order to limit the waste of memory.
If you have any idea/example to do that, I will be pleased to
This driver adds pinctrl and GPIO support to STMicrolectronic's
STM32 family of MCUs.
Pin muxing and GPIO handling have been tested on STM32F429
based Discovery board.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
drivers/pinctrl/Kconfig | 10 +
The STMicrolectornics's STM32F419 MCU has the following main features:
- Cortex-M4 core running up to @180MHz
- 2MB internal flash, 256KBytes internal RAM
- FMC controller to connect SDRAM, NOR and NAND memories
- SD/MMC/SDIO support
- Ethernet controller
- USB OTFG FS HS controllers
-
Add a MAINTAINER entry covering all STM32 machine and drivers files.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d66a97d..559cd45 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
This adds documentation of device tree bindings for the
STM32 USART
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/serial/st,stm32-usart.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644
Hi Guenter,
On 02/20/2015 11:47 AM, Guenter Roeck wrote:
[...]
I am open to hearing your suggestions for our use case, where the CPU card
with
the eeprom is manufactured separately from its carier cards.
I think your use case may be more compelling than two flavors of Beaglebone
(one of
Quoting Thomas Petazzoni (2015-02-20 09:04:29)
The Armada 39x, contrary to its predecessor, has a configurable
reference clock frequency, of either 25 Mhz, or 40 Mhz. For the
previous SoCs, it was fixed to 25 Mhz and described directly as such
in the Device Tree.
For Armada 39x, we need to
On Thu, Feb 19, 2015 at 05:08:51PM +, Srinivas Kandagatla wrote:
+static int qfprom_remove(struct platform_device *pdev)
+{
+ struct eeprom_device *eeprom = platform_get_drvdata(pdev);
+
+ return eeprom_unregister(eeprom);
Same problem...
+static int qfprom_probe(struct
This adds documentation of device tree bindings for the
STM32 pin controller.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/pinctrl/pinctrl-stm32.txt | 99 ++
1 file changed, 99 insertions(+)
create mode 100644
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
arch/arm/boot/dts/armv7-m.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/armv7-m.dtsi b/arch/arm/boot/dts/armv7-m.dtsi
index 5a660d0..78a0549 100644
--- a/arch/arm/boot/dts/armv7-m.dtsi
+++
From Cortex-M reference manuals, the nvic supports up to 240 interrupts.
So the number of entries in vectors table is up to 256.
This patch adds a new config flag to specify the number of external interrupts.
Some ifdeferies are added in order to respect the natural alignment without
wasting too
When Kernel is executed in place from ROM, the symbol addresses can be
lower than the page offset.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
scripts/link-vmlinux.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/link-vmlinux.sh
This adds documentation of device tree bindings for the
ARM System timer.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/arm/armv7m_systick.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
This adds documentation of device tree bindings for the
STM32 reset controller.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
.../devicetree/bindings/reset/st,stm32-reset.txt | 36 ++
1 file changed,
This patch adds clocksource support for ARMv7-M's System timer,
also known as SysTick.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
drivers/clocksource/Kconfig | 7
drivers/clocksource/Makefile | 1 +
drivers/clocksource/armv7m_systick.c | 78
STM32 MCUs feature 16 and 32 bits general purpose timers with prescalers.
The drivers detects whether the time is 16 or 32 bits, and applies a
1024 prescaler value if it is 16 bits.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
drivers/clocksource/Kconfig | 9 ++
On Fri, Feb 20, 2015 at 01:09:58PM -0500, Peter Hurley wrote:
Hi Guenter,
On 02/20/2015 11:47 AM, Guenter Roeck wrote:
[...]
I am open to hearing your suggestions for our use case, where the CPU card
with
the eeprom is manufactured separately from its carier cards.
I think your
This patch adds a new config for STM32 MCUs.
STM32F429 Discovery board boots successfully with this config applied.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
---
arch/arm/configs/stm32_defconfig | 72
1 file changed, 72 insertions(+)
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