On Thu, Mar 5, 2015 at 3:46 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
This patch adds bindings for simple eeprom framework which allows eeprom
consumers to talk to eeprom providers to get access to eeprom cell data.
Signed-off-by: Maxime Ripard
On 05/03/2015 at 17:27:22 +0100, Boris Brezillon wrote :
@@ -2388,21 +2392,20 @@ static int macb_probe(struct platform_device *pdev)
bp-phy_interface = err;
}
+ config = 0;
if (bp-phy_interface == PHY_INTERFACE_MODE_RGMII)
- macb_or_gem_writel(bp,
On 03/05/2015 12:49 PM, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [150305 10:16]:
On Thu, 5 Mar 2015, Dave Gerlach wrote:
Introduce a dt property, ti,no-init, that prevents hwmod initialization.
Even if a dt node is marked as disabled, hwmod still at least enables
the hwmod and
On Thu, Mar 5, 2015 at 11:04 AM, Peter Hurley pe...@hurleysoftware.com wrote:
[ +cc Greg KH ]
On 03/05/2015 10:23 AM, Rob Herring wrote:
On Wed, Mar 4, 2015 at 10:44 AM, Peter Hurley pe...@hurleysoftware.com
wrote:
stdout-path defines ':' as a path separator and commit 75c28c09af99a
(of:
On Mar 5, 2015, at 1:42 PM, Kevin Hilman khil...@kernel.org wrote:
Kumar Gala ga...@codeaurora.org writes:
The top level qcom,msm-id and qcom,board-id are utilized by bootloaders
on Qualcomm MSM platforms to determine which device tree should be
utilized and passed to the kernel.
Cc:
Hi Andy,
On 03/05/2015 04:43 AM, Andy Shevchenko wrote:
On Wed, 2015-03-04 at 16:01 -0600, Thor Thayer wrote:
Hi Andy,
On 03/04/2015 02:44 PM, Andy Shevchenko wrote:
On Wed, 2015-03-04 at 14:31 -0600, ttha...@opensource.altera.com wrote:
From: Thor Thayer ttha...@opensource.altera.com
The
On Thu, 2015-03-05 at 17:01 +, Zubair Lutfullah Kakakhel wrote:
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -83,6 +83,15 @@ config FSL_IFC
bool
depends on FSL_SOC
+config JZ4780_NEMC
+ bool Ingenic JZ4780 SoC NEMC driver
A bool Kconfig symbol.
+
On 3/5/15 16:06, Geert Uytterhoeven wrote:
On Wed, Mar 4, 2015 at 8:49 PM, Arnd Bergmann a...@arndb.de wrote:
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -979,7 +979,7 @@ static int of_path_platform_device_exists(const char
*path)
return pdev != NULL;
}
-#if
Stephen Warren swar...@wwwdotorg.org writes:
On 03/02/2015 01:54 PM, Eric Anholt wrote:
Many of the operations with the firmware are done through this mailbox
channel pair with a specific packet format. Notably, it's used for
clock control, which is apparently not actually totally possible
On 05/03/15 08:16, Ulf Hansson wrote:
On 5 March 2015 at 16:59, Scott Branden sbran...@broadcom.com wrote:
This series of patchsets contains the IPROC SDHCI driver used
in a series of Broadcom SoCs
Quirks are also added to support this controller.
Corneliu Doban (1):
mmc: sdhci: do not
On Wed, Mar 4, 2015 at 1:58 PM, Pantelis Antoniou
pantelis.anton...@konsulko.com wrote:
Hi Arnd,
On Mar 4, 2015, at 21:49 , Arnd Bergmann a...@arndb.de wrote:
On Wednesday 04 March 2015 16:04:23 Geert Uytterhoeven wrote:
- depends on OF_IRQ OF_EARLY_FLATTREE
+ depends on OF_IRQ
Kumar Gala ga...@codeaurora.org writes:
The top level qcom,msm-id and qcom,board-id are utilized by bootloaders
on Qualcomm MSM platforms to determine which device tree should be
utilized and passed to the kernel.
Cc: devicetree@vger.kernel.org
Signed-off-by: Kumar Gala ga...@codeaurora.org
On 05/03/2015 at 17:27:19 +0100, Boris Brezillon wrote :
Hello,
This removes the #if defined(ARCH_AT91) sections to prevent any problem
when enabling ARM multi-platform support.
The at91 specific logic is now activated when the at91sam9260-macb
compatible string is found.
A small nit in
Stephen Warren swar...@wwwdotorg.org writes:
On 03/02/2015 01:54 PM, Eric Anholt wrote:
I was tempted to have the mailbox property channel support just be in
the 2835 mailbox driver itself, but mbox_request_channel() wants its
device to have the mboxes node, and that appears to be only
* Dave Gerlach d-gerl...@ti.com [150305 11:53]:
On 03/05/2015 12:49 PM, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [150305 10:16]:
On Thu, 5 Mar 2015, Dave Gerlach wrote:
Introduce a dt property, ti,no-init, that prevents hwmod initialization.
Even if a dt node is marked as
On Thu, 2015-03-05 at 14:41 -0600, Thor Thayer wrote:
Hi Andy,
On 03/05/2015 04:43 AM, Andy Shevchenko wrote:
On Wed, 2015-03-04 at 16:01 -0600, Thor Thayer wrote:
Hi Andy,
On 03/04/2015 02:44 PM, Andy Shevchenko wrote:
On Wed, 2015-03-04 at 14:31 -0600, ttha...@opensource.altera.com
On Thu, Mar 05, 2015 at 07:40:44PM +0100, Wolfram Sang wrote:
I don't have the bandwidth for a full review right now. However, I
already wanted to tell you guys that my gut feeling is that this
protocol is quite far away from I2C. P2WI was already at the edge.
Maybe there is a better
Hi Arun,
On Tue, Feb 17, 2015 at 11:20:21AM -0800, Arun Ramamurthy wrote:
This driver adds support for USB 2.0 host and device phy
for Broadcom's Cygnus chipset
Mostly nitpicks...
Reviewed-by: Ray Jui r...@broadcom.com
Reviewed-by: Scott Branden sbran...@broadcom.com
Signed-off-by: Arun
+
+For example:
+
+ /* Provider */
+ qfprom: qfprom@0070 {
+ compatible = qcom,qfprom;
+ reg = 0x0070 0x1000;
+ ...
+
+ /* Data cells */
+ tsens_calibration: calib@404 {
+
On Thu, Mar 5, 2015 at 12:23 PM, Kumar Gala ga...@codeaurora.org wrote:
On Mar 5, 2015, at 1:42 PM, Kevin Hilman khil...@kernel.org wrote:
Kumar Gala ga...@codeaurora.org writes:
The top level qcom,msm-id and qcom,board-id are utilized by bootloaders
on Qualcomm MSM platforms to determine
From that regard, RSB is a multiple device bus, using addresses, just
like I2C. The way it communicates is basically the one used by P2WI.
I am not keen to allow everything which is a bus and has addresses
into the I2C realm. The addresses are 12 bit, whilst I2C has at maximum
10 bit which is
Le 06/03/2015 01:21, Kim Phillips a écrit :
On Thu, 5 Mar 2015 17:46:05 +0100
Christophe Leroy christophe.le...@c-s.fr wrote:
[15/17] crypto: talitos - Implementation of SEC1
...
[16/17] crypto: talitos - SEC1 bugs on 0 data hash
[17/17] crypto: talitos - Update DT bindings with SEC1
On Thu, Mar 05, 2015 at 12:17:21AM +0300, Aleksei Mamlin wrote:
This patch adds vendor-prefix for Wexler.
WEXLER trademark owned by AVIRSA Electronics, a member of the
diversified holding AVIRSA.
Signed-off-by: Aleksei Mamlin mamli...@gmail.com
---
On Thu, Mar 05, 2015 at 12:16:48AM +0300, Aleksei Mamlin wrote:
This patch add support for Wexler TAB7200 tablet.
The Wexler TAB7200 is a A20 based tablet with 7 inch display(800x480),
capacitive touchscreen(5 fingers), 1G RAM, 4G NAND, micro SD card slot,
mini HDMI port, 3.5mm audio plug, 1
Hi,
On 03/06/2015 03:54 AM, Mark Rutland wrote:
Hi,
+ psci {
+ compatible = arm,psci;
+ method = smc;
+ cpu_off = 0x8402;
+ cpu_on = 0xC403;
+ };
Back at v2 you mentioned that CPU_OFF wasn't working [1].
Do
This adds the support for Broadcom iProc PCIe controller
pcie-iproc.c servers as the common core driver, and front-end bus
interface needs to be added to support different bus interfaces
pcie-iproc-pltfm.c contains the support for the platform bus interface
Signed-off-by: Ray Jui
Document the Broadcom iProc PCIe platform interface device tree binding
Signed-off-by: Ray Jui r...@broadcom.com
Reviewed-by: Scott Branden sbra...@broadcom.com
---
.../devicetree/bindings/pci/brcm,iproc-pcie.txt| 63
1 file changed, 63 insertions(+)
create mode
On Thu, Mar 5, 2015 at 8:59 PM, Olof Johansson o...@lixom.net wrote:
On Thu, Mar 5, 2015 at 12:23 PM, Kumar Gala ga...@codeaurora.org wrote:
On Mar 5, 2015, at 1:42 PM, Kevin Hilman khil...@kernel.org wrote:
Kumar Gala ga...@codeaurora.org writes:
The top level qcom,msm-id and qcom,board-id
* Tony Lindgren t...@atomide.com [150305 12:24]:
* Dave Gerlach d-gerl...@ti.com [150305 11:53]:
On 03/05/2015 12:49 PM, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [150305 10:16]:
On Thu, 5 Mar 2015, Dave Gerlach wrote:
Introduce a dt property, ti,no-init, that prevents
On Thu, Mar 05, 2015 at 12:52:30PM -0600, Kumar Gala wrote:
On Mar 3, 2015, at 6:21 PM, Kenneth Westfield kwest...@codeaurora.org wrote:
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
@@ -0,0 +1,49 @@
+* Qualcomm Technologies LPASS CPU DAI
+
+Required subnodes:
+
Some at91 SoCs embed a 10/100 Mbit Ethernet IP, that is based on the
at91sam9260 SoC.
Fix at91 DTs accordingly.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
With multi platform support those sections could lead to unexpected
behavior if both ARCH_AT91 and another ARM SoC using the MACB IP are
selected.
Add two new capabilities to encode the default MII mode and the presence
of a CLKEN bit in USRIO register.
Then define the appropriate config for IPs
On Thu, 2015-03-05 at 19:18 +0300, Aleksei Mamlin wrote:
This patch adds device tree support and binding information for
Goodix GT9xx series touchscreen controller.
It also adds support for 5-finger chips, like GT911 and GT912, which
can be found on ARM tablets, like Wexler TAB7200 and MSI
On 03/05/2015 09:40 AM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [150304 20:14]:
Dave,
Looks like the commit message disappeared during your patch preparation.
Signed-off-by: Suman Anna s-a...@ti.com
Signed-off-by: Dave Gerlach d-gerl...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi
This patch adds device tree support and binding information for Goodix
GT9xx series touchscreen controller.
It also adds support for 5-finger chips, like GT911 and GT912, which
can be found on ARM tablets, like Wexler TAB7200 and MSI Primo73.
Changes since v1:
* Merge patches into single patch.
*
On Thu, Mar 05, 2015 at 12:35:49PM +, yoshihiro shimoda wrote:
Hi Vinod,
Thank you for your review!
On Mon, Feb 09, 2015 at 05:14:05PM +0900, Yoshihiro Shimoda wrote:
+struct usb_dmac_chan {
+ struct dma_chan chan;
+ void __iomem *iomem;
+ unsigned int index;
+
+
Hello,
This removes the #if defined(ARCH_AT91) sections to prevent any problem
when enabling ARM multi-platform support.
The at91 specific logic is now activated when the at91sam9260-macb
compatible string is found.
Best Regards,
Boris
Boris Brezillon (3):
net/macb: Update DT bindings
Add missing cdns,at91sam9260-macb, atmel,sama5d3-gem and
atmel,sama5d4-gem compatible strings.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
Documentation/devicetree/bindings/net/macb.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
Hi Aleksei,
On Thu, Mar 5, 2015 at 11:18 AM, Aleksei Mamlin mamli...@gmail.com wrote:
This patch adds device tree support and binding information for Goodix
GT9xx series touchscreen controller.
It also adds support for 5-finger chips, like GT911 and GT912, which
can be found on ARM tablets,
This patch updates the documentation by including SEC1 into SEC2/3 doc
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
Documentation/devicetree/bindings/crypto/fsl-sec2.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
The purpose of this set of patchs is to add to talitos crypto driver the
support for the SEC1 version of the security engine, which is found in
mpc885 and mpc8272 processors.
The approach has been to split the driver in two main parts:
* talitos.c and talitos.h contains parts that are common
*
Use max number of touches from device config instead of hardcoding.
Signed-off-by: Aleksei Mamlin mamli...@gmail.com
---
drivers/input/touchscreen/goodix.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/input/touchscreen/goodix.c
From: Alex Smith alex.sm...@imgtec.com
Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
well as the hardware BCH controller. DMA is not currently implemented.
While older 47xx SoCs also have a BCH controller, they are incompatible
with the one in the 4780 due to differing
Hi,
Two patches based on 4.0-rc2 that add NAND and BCH controller
drivers for the Ingenic JZ4780 SoC.
Core JZ4780 support is still in-flight.
Review and feedback welcome.
Thanks,
ZubairLK
Alex Smith (2):
dt-bindings: binding for jz4780-{nand,bch}
mtd: nand: jz4780: driver for NAND devices
From: Alex Smith alex.sm...@imgtec.com
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith a...@alex-smith.me.uk
Signed-off-by: Zubair Lutfullah Kakakhel
This patch adds device tree support and binding information for Goodix
GT9xx series touchscreen controller.
It also adds support for 5-finger chips, like GT911 and GT912, which
can be found on ARM tablets, like Wexler TAB7200 and MSI Primo73.
Changes since v2:
* Split to two patches:
The first
Hi,
On Fri, Mar 6, 2015 at 2:04 AM, Mark Rutland mark.rutl...@arm.com wrote:
Hi,
[...]
+ psci {
+ compatible = arm,psci;
+ method = smc;
+ cpu_off = 0x8402;
+ cpu_on = 0xC403;
+ };
Back at v2 you
On Tue, Mar 03, 2015 at 04:21:54PM -0800, Kenneth Westfield wrote:
From: Kenneth Westfield kwest...@codeaurora.org
Add the CPU DAI driver for the Qualcomm
Technologies low-power audio subsystem (LPASS).
Applied, thanks.
signature.asc
Description: Digital signature
On Tue, Mar 03, 2015 at 04:21:55PM -0800, Kenneth Westfield wrote:
From: Kenneth Westfield kwest...@codeaurora.org
Add platform driver for the Qualcomm Technologies
low-power audio subsystem (LPASS) ports.
Applied, thanks.
signature.asc
Description: Digital signature
On Tue, Mar 03, 2015 at 04:21:59PM -0800, Kenneth Westfield wrote:
From: Kenneth Westfield kwest...@codeaurora.org
Model the Qualcomm Technologies LPASS hardware for
the ipq806x SOC.
Reviwed-by: Mark Brown broo...@kernel.org
signature.asc
Description: Digital signature
On Tue, Mar 03, 2015 at 04:21:51PM -0800, Kenneth Westfield wrote:
From: Kenneth Westfield kwest...@codeaurora.org
Add documentation to the sound directory of the
device-tree bindings for the QTi LPASS CPU DAI
device.
Applied, thanks.
signature.asc
Description: Digital signature
On Tue, Mar 03, 2015 at 04:21:50PM -0800, Kenneth Westfield wrote:
From: Kenneth Westfield kwest...@codeaurora.org
Add maintainers for the Qualcomm Technologies
sound drivers.
Applied, thanks.
signature.asc
Description: Digital signature
On Thu, 2015-03-05 at 00:10 +0100, Stefan Agner wrote:
--- /dev/null
+++ b/drivers/mtd/nand/vf610_nfc.c
@@ -0,0 +1,730 @@
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software
On Wed, Feb 11, 2015 at 5:34 AM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 10 February 2015 at 10:12, Alexandre Courbot gnu...@gmail.com wrote:
This code would be a great candidate to use this GPIO array API, but
since it is not in -next yet (should happen soon though) you might
want to
On Wed, 2015-03-04 at 11:05 -0800, Stephen Boyd wrote:
On 03/04/15 02:19, Ivan T. Ivanov wrote:
+
+static const struct of_device_id pmic_spmi_id_table[] = {
+ [COMMON_SUBTYPE] = { .compatible = qcom,spmi-pmic },
+ [PM8941_SUBTYPE] = { .compatible = qcom,pm8941 },
+
On Wed, 2015-03-04 at 11:01 -0800, Stephen Boyd wrote:
On 03/04/15 02:19, Ivan T. Ivanov wrote:
diff --git a/drivers/mfd/qcom-spmi-pmic.c b/drivers/mfd/qcom-spmi-pmic.c
index 4b8beb2..a1af4e5 100644
--- a/drivers/mfd/qcom-spmi-pmic.c
+++ b/drivers/mfd/qcom-spmi-pmic.c
+
+static
On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for changing the parent and clk_set_rate to
change the rate. Use the former for changing the parent and the latter
for changing the rate.
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for changing the parent and clk_set_rate to
change the rate. Use the former for changing the parent and the latter
for changing the rate. What you are interested in is changing the
parent, so use
On 5 March 2015 at 15:42, Sascha Hauer s.ha...@pengutronix.de wrote:
+Cc Viresh Kumar
Viresh, this is the patch for the underlying clocks for the Mediatek
cpufreq driver.
On Thu, Mar 05, 2015 at 10:43:21AM +0800, Pi-Cheng Chen wrote:
Hi Sascha,
On 4 March 2015 at 19:21, Sascha Hauer
On Thu, 2015-03-05 at 09:11 +0100, Paul Bolle wrote:
On Wed, 2015-03-04 at 16:35 -0800, Ray Jui wrote:
+MODULE_AUTHOR(Ray Jui r...@broadcom.com);
+MODULE_DESCRIPTION(Broadcom Cygnus GPIO Driver);
+MODULE_LICENSE(GPL v2);
These three macros will be preprocessed away. (There's also
Le 05/03/2015 02:52, Josh Wu a écrit :
Hi, Nicolas
On 3/4/2015 11:19 PM, Nicolas Ferre wrote:
Le 15/01/2015 11:05, Boris Brezillon a écrit :
Hi Josh,
On Thu, 15 Jan 2015 17:59:15 +0800
Josh Wu josh...@atmel.com wrote:
Hi， Boris
Thanks for the review.
On 1/15/2015 4:45 PM, Boris
On Wed, 2015-03-04 at 16:35 -0800, Ray Jui wrote:
--- a/drivers/pinctrl/bcm/Kconfig
+++ b/drivers/pinctrl/bcm/Kconfig
@@ -20,6 +20,28 @@ config PINCTRL_BCM2835
select PINMUX
select PINCONF
+config PINCTRL_CYGNUS_GPIO
+ bool Broadcom Cygnus GPIO (with PINCONF) driver
bool
On Wed, Mar 4, 2015 at 8:49 PM, Arnd Bergmann a...@arndb.de wrote:
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -979,7 +979,7 @@ static int of_path_platform_device_exists(const char
*path)
return pdev != NULL;
}
-#if IS_ENABLED(CONFIG_I2C)
+#if
On Wed, 2015-03-04 at 16:35 -0800, Ray Jui wrote:
diff --git a/drivers/pinctrl/bcm/Kconfig b/drivers/pinctrl/bcm/Kconfig
index bc6d048..eb13201 100644
--- a/drivers/pinctrl/bcm/Kconfig
+++ b/drivers/pinctrl/bcm/Kconfig
@@ -19,3 +19,16 @@ config PINCTRL_BCM2835
bool
select PINMUX
On Wed, 04 Mar 2015, Paul Bolle wrote:
Lee Jones schreef op wo 04-03-2015 om 18:06 [+]:
--- /dev/null
+++ b/drivers/rtc/rtc-st-lpc.c
@@ -0,0 +1,354 @@
+/*
+ * rtc-st-lpc.c - ST's LPC RTC, powered by the Low Power Timer
+ *
+ * Copyright (C) 2014 STMicroelectronics Limited
+ *
On 03/05, Kumar Gala wrote:
On Mar 4, 2015, at 4:33 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 03/04/15 13:13, Kumar Gala wrote:
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1b8e973..4c8b119 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -177,6
On Thu, Mar 05, 2015 at 03:42:51PM +, Charles Keepax wrote:
Signed-off-by: Charles Keepax ckee...@opensource.wolfsonmicro.com
Applied, thanks.
signature.asc
Description: Digital signature
* Suman Anna s-a...@ti.com [150305 08:47]:
On 03/05/2015 09:40 AM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [150304 20:14]:
Dave,
Looks like the commit message disappeared during your patch preparation.
Signed-off-by: Suman Anna s-a...@ti.com
Signed-off-by: Dave Gerlach
From: Alex Smith alex.sm...@imgtec.com
Add device tree bindings for the NAND/External Memory Controller (NEMC)
on Ingenic JZ4780
Signed-off-by: Alex Smith a...@alex-smith.me.uk
Signed-off-by: Zubair Lutfullah Kakakhel zubair.kakak...@imgtec.com
---
.../memory-controllers/ingenic,jz4780-nemc.txt
[ +cc Greg KH ]
On 03/05/2015 10:23 AM, Rob Herring wrote:
On Wed, Mar 4, 2015 at 10:44 AM, Peter Hurley pe...@hurleysoftware.com
wrote:
stdout-path defines ':' as a path separator and commit 75c28c09af99a
(of: add optional options parameter to of_find_node_by_path()) added
the necessary
Hi,
[...]
+ psci {
+ compatible = arm,psci;
+ method = smc;
+ cpu_off = 0x8402;
+ cpu_on = 0xC403;
+ };
Back at v2 you mentioned that CPU_OFF wasn't working [1].
Do both CPU_ON and CPU_OFF work for
From: Alex Smith alex.sm...@imgtec.com
Add a driver for the NAND/External Memory Controller (NEMC) on JZ4780
and later SoCs.
The primary function of this driver is to configure parameters, such
as timings, for external memory devices using data supplied in the
device tree. Devices connected to
Hi Greg,
I don't see any maintainer for drivers/memory.
And as you are the committer for most of the drivers in there.
Two patches based on 4.0-rc2 that add an external memory controller
driver for the Ingenic JZ4780 SoC.
Core jz4780 support is still in-flight.
Tested on the MIPS Creator
On Wed, Mar 04, 2015 at 02:12:58PM -0500, Matt Porter wrote:
The fsl-imx-cspi binding contains language indicating compatible
strings to be used that is not valid for all supported parts
e.g. Should be fsl,soc-cspi or fsl,soc-ecspi. Fix this
by enumerating the set of valid compatible strings.
On Tue, Mar 03, 2015 at 04:21:53PM -0800, Kenneth Westfield wrote:
From: Kenneth Westfield kwest...@codeaurora.org
Add the LPASS header files for ipq806x SOC. This
includes the register definitions for the ipq806x
LPAIF, and the structure definition for the driver
data.
Applied, thanks.
Hi Paul,
On 3/5/2015 12:36 AM, Paul Bolle wrote:
On Thu, 2015-03-05 at 09:11 +0100, Paul Bolle wrote:
On Wed, 2015-03-04 at 16:35 -0800, Ray Jui wrote:
+MODULE_AUTHOR(Ray Jui r...@broadcom.com);
+MODULE_DESCRIPTION(Broadcom Cygnus GPIO Driver);
+MODULE_LICENSE(GPL v2);
These three macros
Add IPROC SDHCI driver for IPROC family of Broadcom devices.
Acked-by: Ray Jui r...@broadcom.com
Signed-off-by: Corneliu Doban cdo...@broadcom.com
Signed-off-by: Scott Branden sbran...@broadcom.com
---
drivers/mmc/host/Kconfig | 14 +++
drivers/mmc/host/Makefile | 1 +
This series of patchsets contains the IPROC SDHCI driver used
in a series of Broadcom SoCs
Quirks are also added to support this controller.
Corneliu Doban (1):
mmc: sdhci: do not set AUTO_CMD12 for multi-block CMD53
Scott Branden (3):
mmc: sdhci: add quirk for ACMD23 broken
mmc:
Add quirk to handle broken auto-CMD23.
Some controllers do not respond after the first auto-CMD23 is issued.
This allows CMD23 to still work (mandatory for the faster UHS-I mode)
rather than disabling CMD23 entirely via SDHCI_QUIRK2_HOST_NO_CMD23.
Signed-off by: Corneliu Doban
Add device tree binding documentation for IPROC SDHCI driver.
Acked-by: Ray Jui r...@broadcom.com
Signed-off-by: Corneliu Doban cdo...@broadcom.com
Signed-off-by: Scott Branden sbran...@broadcom.com
---
.../devicetree/bindings/mmc/brcm,sdhci-iproc.txt | 23 ++
1 file
Hi Mark,
On Thu, Mar 5, 2015 at 9:24 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Mar 05, 2015 at 05:38:23AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433
Initial version of device tree for Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek michal.si...@xilinx.com
Acked-by: Sören Brinkmann soren.brinkm...@xilinx.com
---
Changes in v2:
- move timer out of amba_apu bus because it is not on bus
Reported by Mark
- FIC GICC and GICV addresses -
Dear Michal Simek,
On Thu, 5 Mar 2015 14:53:34 +0100, Michal Simek wrote:
+ pmu {
+ compatible = arm,armv8-pmuv3;
+ interrupts = 0 143 4,
+ 0 144 4,
+ 0 145 4,
+ 0 146 4;
Any reason not
Hi Michal,
On 05/03/15 13:53, Michal Simek wrote:
Initial version of device tree for Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek michal.si...@xilinx.com
Acked-by: Sören Brinkmann soren.brinkm...@xilinx.com
---
Changes in v2:
- move timer out of amba_apu bus because it is not on bus
Hi Thomas,
On 03/05/2015 03:03 PM, Thomas Petazzoni wrote:
Dear Michal Simek,
On Thu, 5 Mar 2015 14:53:34 +0100, Michal Simek wrote:
+pmu {
+compatible = arm,armv8-pmuv3;
+interrupts = 0 143 4,
+ 0 144 4,
+ 0
Thankyou all for providing inputs and comments on RFC patchset.
Here is the v1 of the patchset addressing all the issues raised as
part of RFC review.
This patchset adds a new simple EEPROM framework to kernel.
Up until now, EEPROM drivers were stored in drivers/misc, where they all had to
This patch adds bindings for simple eeprom framework which allows eeprom
consumers to talk to eeprom providers to get access to eeprom cell data.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
[Maxime Ripard: intial version of eeprom framework]
Signed-off-by: Srinivas Kandagatla
This patch adds just providers part of the framework just to enable easy
review.
Up until now, EEPROM drivers were stored in drivers/misc, where they all had to
duplicate pretty much the same code to register a sysfs file, allow in-kernel
users to access the content of the devices they were
On Thu, 2015-03-05 at 09:46 +, Srinivas Kandagatla wrote:
--- a/drivers/eeprom/Kconfig
+++ b/drivers/eeprom/Kconfig
@@ -17,4 +17,15 @@ config EEPROM_DEBUG
help
Say yes here to enable debugging support.
+config EEPROM_SUNXI_SID
+ depends on ARCH_SUNXI
+ tristate
On Wed, Mar 04, 2015 at 05:46:25PM -0800, Stephen Boyd wrote:
On 03/04/15 16:30, Mark Brown wrote:
On Wed, Mar 04, 2015 at 11:35:43AM -0800, Stephen Boyd wrote:
Dependency resolution isn't anything new, I'm not sure why you think
this is related to of_parse_cb()? Open coding does exactly
Signed-off-by: Charles Keepax ckee...@opensource.wolfsonmicro.com
---
Documentation/devicetree/bindings/sound/wm8804.txt |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/wm8804.txt
The exact steps provided for submitting binding patches can be read
as requiring the bindings to be sent only to the devicetree@vger.kernel.org
list. Since the DT maintainers would like to be Cced on any binding
submissions, make this requirement explicit in step 2.
Signed-off-by: Matt Porter
From: Corneliu Doban cdo...@broadcom.com
For CMD53 in block mode, the host does not need to stop the transfer,
as it stops when the block count (present in CMD53) is reached.
Signed-off-by: Corneliu Doban cdo...@broadcom.com
Signed-off-by: Scott Branden sbran...@broadcom.com
---
On Wed, Mar 4, 2015 at 10:44 AM, Peter Hurley pe...@hurleysoftware.com wrote:
stdout-path defines ':' as a path separator and commit 75c28c09af99a
(of: add optional options parameter to of_find_node_by_path()) added
the necessary support to parse paths terminated with ':' path separator.
* Dave Gerlach d-gerl...@ti.com [150304 20:14]:
Signed-off-by: Suman Anna s-a...@ti.com
Signed-off-by: Dave Gerlach d-gerl...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi
On 5 March 2015 at 16:59, Scott Branden sbran...@broadcom.com wrote:
This series of patchsets contains the IPROC SDHCI driver used
in a series of Broadcom SoCs
Quirks are also added to support this controller.
Corneliu Doban (1):
mmc: sdhci: do not set AUTO_CMD12 for multi-block CMD53
On Thu, 5 Mar 2015, Dave Gerlach wrote:
Introduce a dt property, ti,no-init, that prevents hwmod initialization.
Even if a dt node is marked as disabled, hwmod still at least enables
the hwmod and programs the sysconfig before attempting to idle it at
boot. If an IP has been disabled by the
Hi Wolfram,
On Wed, Mar 04, 2015 at 06:27:11PM +0100, Wolfram Sang wrote:
On Mon, Mar 02, 2015 at 04:24:43PM +0800, Chen-Yu Tsai wrote:
The RSB controller looks like an SMBus controller which only supports byte
and word data transfers. It can also do double-word data transfers, but the
I2C
Hi Paul,
On Thu, Mar 05, 2015 at 11:15:15AM +0100, Paul Bolle wrote:
endif
diff --git a/drivers/eeprom/Makefile b/drivers/eeprom/Makefile
index e130079..661422c 100644
--- a/drivers/eeprom/Makefile
+++ b/drivers/eeprom/Makefile
@@ -7,3 +7,4 @@ ccflags-$(CONFIG_EEPROM_DEBUG) +=
I don't have the bandwidth for a full review right now. However, I
already wanted to tell you guys that my gut feeling is that this
protocol is quite far away from I2C. P2WI was already at the edge.
Maybe there is a better place for such custom stuff? I dunno yet.
That's unfortunate,
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