Re: [PATCH v4 3/4] regulator: tps65086: Add regulator driver for the TPS65086 PMIC

On 11/23/2015 01:00 PM, Mark Brown wrote: On Mon, Nov 23, 2015 at 11:40:55AM -0600, Andrew F. Davis wrote: But which of_node? regulator_config->of_node regulator_config->dev->of_node The second is the only one I see getting used, the first is only used when drivers provide their own

Re: [PATCH] arm: dts: qcom: Add generic PMIC gpio/MPP compat strings

On Fri 20 Nov 17:49 PST 2015, Stephen Boyd wrote: > Add the generic compatible strings for the PMIC gpio and MPP > modules found on qcom based PMICs. > > Cc: > Cc: "Ivan T. Ivanov" > Cc: Bjorn Andersson > Cc: Rob

Re: [PATCH 2/2] ARM: dts: sun7i: Enable audio codec on BananaPi

On Mon, Nov 23, 2015 at 01:50:17PM -0500, Stefan Monnier wrote: > Enable the on-chip audio codec > > Signed-off-by: Stefan Monnier Applied both, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com

Re: [PATCH v3 3/6] DT: PCI: qcom: Document PCIe devicetree bindings

On Mon 23 Nov 01:29 PST 2015, Stanimir Varbanov wrote: > From: Stanimir Varbanov > > Document Qualcomm PCIe driver devicetree bindings. > > Signed-off-by: Stanimir Varbanov > Signed-off-by: Stanimir Varbanov > --- >

Re: [PATCH 0/3] LPC4337 CIAA-NXP DTS changes

Hi Ariel, On 23 November 2015 at 13:43, Ariel D'Alessandro wrote: > (+Cc Joachim) > > El 23/11/15 a las 09:37, Ariel D'Alessandro escribió: >> Hi, >> >> This patch set includes some DTS changes for LPC4337 CIAA-NXP board. >> It is based on tag next-20151120 of the

Re: [PATCH] ARM: dts: keystone: k2l: fix kernel crash when clk_ignore_unused is not in bootargs

On 11/23/2015 8:54 AM, Murali Karicheri wrote: Currently kernel crash randomly when K2L EVM is booted without clk_ignore_unused in the bootargs. This workaround is not needed on other K2 devices such as K2HK and K2E and with this fix, we can remove the workaround altogether. netcp driver on K2L

Re: [RFC/PATCH] pinctrl: qcom: Add generic ssbi and spmi GPIO/MPP bindings

On Tue 17 Nov 17:00 PST 2015, Stephen Boyd wrote: > The drivers don't really need to know which PMIC they're for, so > make a generic binding for them. This alleviates us from updating > the drivers every time a new PMIC comes out. It's still > recommended that we update the binding with new PMIC

Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

On 22/11/15 14:17, Simon Arlott wrote: > The BCM63268 has a NAND interrupt register with combined status and enable > registers. It also has a clock for the NAND controller that needs to be > enabled. > > Set up the device by enabling the clock, disabling and acking all > interrupts, then handle

Re: [PATCH v4 3/3] ARM: dts: BCM63xx: Add ARMPLL device tree nodes

On 29/10/15 18:23, Florian Fainelli wrote: > Add the ARM PLL controller which comes standard with the Cortex-A9 found > on the BCM63138 SoCs. This is the same controller as the one found in > the Broadcom iProc architecture, however, we have a separate compatible > string to indicate the

Re: [PATCH v4 3/3] usb: chipidea: register driver as a peripheral with the phy

On 11/23/2015 12:29 AM, Peter Chen wrote: > On Fri, Nov 20, 2015 at 03:47:20PM -0800, Tim Bird wrote: >> Register the chipidea driver with the phy, so that the phy >> driver can kick the gadget driver when it resumes from low power. >> The phy-msm-usb (Qualcomm) driver requires this in order to

Re: [PATCH 6/10] watchdog: bcm63xx_wdt: Obtain watchdog clock HZ from "periph" clk

On 23/11/15 07:02, Jonas Gorski wrote: > Hi, > > On Sun, Nov 22, 2015 at 3:07 PM, Simon Arlott wrote: >> Instead of using a fixed clock HZ in the driver, obtain it from the >> "periph" clk that the watchdog timer uses. >> >> Signed-off-by: Simon Arlott >>

Re: [PATCH v2 3/5] misc: eeprom_93xx46: Implement eeprom_93xx46 DT bindings.

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 11/21/2015 01:36 PM, Vladimir Zapolskiy wrote: > On 21.11.2015 06:40, Cory Tusar wrote: >> -BEGIN PGP SIGNED MESSAGE- >> Hash: SHA1 >> >> On 11/19/2015 12:50 AM, Vladimir Zapolskiy wrote: >>> Hi Cory, >>> >>> On 19.11.2015 05:29, Cory Tusar

Re: [PATCH] pinctrl: qcom: Add msm8996 pinctrl driver

On Tue 17 Nov 16:35 PST 2015, Stephen Boyd wrote: > From: Joonwoo Park > > Add initial pinctrl driver to support pin configuration with > pinctrl framework for msm8996. > > Cc: > Cc: Bjorn Andersson >

Re: [PATCH 2/2] pinctrl: qcom: spmi-mpp: Add pm8994 mpp support

On Tue 17 Nov 16:52 PST 2015, Stephen Boyd wrote: > Update the driver and binding for pm8994-mpp devices. > > Cc: > Cc: "Ivan T. Ivanov" > Cc: Bjorn Andersson > Signed-off-by: Stephen Boyd >

Re: [PATCH 1/2] pinctrl: qcom: spmi-gpio: Add pm8994 gpio support

On Tue 17 Nov 16:52 PST 2015, Stephen Boyd wrote: > Update the binding and driver for pm8994-gpio devices. > > Cc: > Cc: "Ivan T. Ivanov" > Cc: Bjorn Andersson > Signed-off-by: Stephen Boyd

Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

On 23/11/15 15:42, Jonas Gorski wrote: > On Sun, Nov 22, 2015 at 11:17 PM, Simon Arlott wrote: >> + priv->clk = of_clk_get(dev->of_node, 0); > > > Why not use a named clock here? That way you can make use of > devm_clk_get and don't need to care about putting it. Ok.

Re: [PATCH v5 1/4] firmware: introduce sysfs driver for QEMU's fw_cfg device

Hi Gabriel, [auto build test WARNING on v4.4-rc2] [also build test WARNING on next-20151123] [cannot apply to robh/for-next] url: https://github.com/0day-ci/linux/commits/Gabriel-L-Somlo/SysFS-driver-for-QEMU-fw_cfg-device/20151124-000402 config: arm-allyesconfig (attached as .config

Re: [PATCH v4 10/13] of: add vendor prefix for boe

On Fri, Nov 20, 2015 at 04:15:36PM +0800, Chris Zhong wrote: > Signed-off-by: Chris Zhong > Acked-by: Rob Herring > --- > > Changes in v4: None > Changes in v3: None > Changes in v2: None > > Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + >

[PATCH v2 1/5] ARM: dts: sun8i: Add SID node

Add a node describing the Security ID memory to the Allwinner H3 .dtsi file. Signed-off-by: Josef Gajdusek --- arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index

[PATCH v2 5/5] ARM: dts: sun8i: Add THS node to the H3 .dtsi

This patch adds nodes for the THS driver and the THS clock to the Allwinner H3 .dtsi file. Signed-off-by: Josef Gajdusek --- arch/arm/boot/dts/sun8i-h3.dtsi | 33 + 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi

[PATCH v2 0/5] sunxi: THS support

Hello everyone, this is v2 of my THS patchset Changelog: * Some stylistic changes * devm_reset_control_get_optional -> devm_reset_control_get * Added the clk-h3-ths clock driver - Note: A23/A33/A83T do not have a separate clock, H3 seems to be the first (and only?) SoC with it

[PATCH v2 2/5] clk: sunxi: Add driver for the H3 THS clock

This patch adds a driver for the THS clock which is present on the Allwinner H3. Signed-off-by: Josef Gajdusek --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/Makefile| 1 + drivers/clk/sunxi/clk-h3-ths.c

Re: [PATCH 2/2] arm64: dts: berlin4ct: enable all i2c nodes for the STB board

On 23.11.2015 03:49, Jisheng Zhang wrote: On Fri, 20 Nov 2015 22:19:32 +0100 Sebastian Hesselbarth wrote: On 20.11.2015 10:47, Jisheng Zhang wrote: Enable all i2c nodes for the Marvell berlin BG4CT STB board. Signed-off-by: Jisheng Zhang ---

Re: [PATCH v4 12/13] drm/panel: simple: Add boe,tv080wum-nl0 simple panel device tree binding

On Fri, Nov 20, 2015 at 04:15:38PM +0800, Chris Zhong wrote: > This binding specifies a set of common properties for display panels. It > can be used as a basis by bindings for specific panels. > Bindings for three specific panels are provided to show how the > simple panel binding can be used. >

[PATCH v2 3/5] thermal: Add a driver for the Allwinner THS sensor

This patch adds support for the Sunxi thermal sensor on the Allwinner H3. Should be easily extendable for the A33/A83T/... as they have similar but not completely identical sensors. Signed-off-by: Josef Gajdusek --- drivers/thermal/Kconfig | 7 + drivers/thermal/Makefile

[PATCH v2 4/5] dt-bindings: document sun8i_ths

This patch adds the binding documentation for the sun8i_ths driver Signed-off-by: Josef Gajdusek --- .../devicetree/bindings/thermal/sun8i-ths.txt | 31 ++ 1 file changed, 31 insertions(+) create mode 100644

Re: [PATCH v2 6/6] arm64: dts: berlin4ct: add pll and clock nodes

Dear all, On Mon, 23 Nov 2015 15:21:58 +0800 Jisheng Zhang wrote: > Dear Sebastian, > > On Fri, 20 Nov 2015 22:06:59 +0100 > Sebastian Hesselbarth wrote: > > > On 20.11.2015 09:42, Jisheng Zhang wrote: > > > Add syspll, mempll, cpupll, gateclk and berlin-clk nodes. > > > > > >

Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI

Hi, On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote: > >> + bus_gates: clk@01c20060 { > >> + #clock-cells = <1>; > >> + compatible = "allwinner,sun8i-h3-bus-gates-clk"; > >> + reg = <0x01c20060 0x14>; > >>

[PATCH v2 2/5] irqdomain: introduce irq_of_phandle_args_to_fwspec

From: Carlo Caione Export of_phandle_args_to_fwspec with a new compliant name. Signed-off-by: Carlo Caione --- include/linux/of_irq.h | 2 ++ kernel/irq/irqdomain.c | 5 +++-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git

[PATCH v2 3/5] pinctrl: meson: enable GPIO IRQs

From: Carlo Caione On Meson8 and Meson8b SoCs there are 8 independent filtered GPIO interrupt modules that can be programmed to use any of the GPIOs in the chip as an interrupt source. For each GPIO IRQ we have: GPIOs --> [mux]--> [polarity]--> [filter]--> [edge select]-->

Re: [PATCH v3 4/6] PCI: qcom: Add Qualcomm PCIe controller driver

Hi Stanimir, [auto build test ERROR on: v4.4-rc2] [also build test ERROR on: next-20151123] url: https://github.com/0day-ci/linux/commits/Stanimir-Varbanov/Qualcomm-PCIe-driver-and-designware-fixes/20151123-173312 config: i386-allmodconfig (attached as .config) reproduce: # save

Re: [PATCH RESEND 15/16] leds: add LM3633 driver

Hi Milo, On 11/23/2015 12:40 AM, Kim, Milo wrote: Hi Jacek, On 11/20/2015 6:22 PM, Jacek Anaszewski wrote: On 11/10/2015 08:38 AM, Kim, Milo wrote: [...] +cat /sys/class/leds//pattern_levels +low brightness: 0, high brightness: 255 + +What:

Re: [PATCH v3 2/6] PCI: designware: add memory barrier after enabling region

On Mon, Nov 23, 2015 at 11:28:59AM +0200, Stanimir Varbanov wrote: > Add 'write memory' barrier after enable region in PCIE_ATU_CR2 > register. The barrier is needed to ensure that the region enable > request has been reached it's destination at time when we > read/write to PCI configuration

Re: [PATCH 2/3] panel/panasonic-vvx10f034n00: Add DT bindings

On Fri, Oct 30, 2015 at 05:38:27PM -0700, bj...@kryo.se wrote: > From: Werner Johansson > > This patch adds bindings for the Panasonic VVX10F034N00 > WUXGA panel. > > Signed-off-by: Werner Johansson > Signed-off-by: Bjorn

Re: [linux-sunxi] Re: [PATCH v4 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI

HI, On 23-11-15 09:57, Maxime Ripard wrote: Hi, On Sun, Nov 01, 2015 at 02:33:23PM +0100, Jens Kuske wrote: + bus_gates: clk@01c20060 { + #clock-cells = <1>; + compatible = "allwinner,sun8i-h3-bus-gates-clk"; +

Re: [PATCH] drm/panel: simple: Add support for G121X1-L03

On Wed, Nov 18, 2015 at 03:57:47PM -0500, Akshay Bhat wrote: > Add support for Innolux CheMei 12" G121X1-L03 XGA LVDS display. > > Datasheet: http://www.azdisplays.com/PDF/G121X1-L03.pdf > Signed-off-by: Akshay Bhat > --- >

Re: [linux-sunxi] Re: [PATCH v4 4/6] reset: sunxi: Add Allwinner H3 bus resets

Hi, On Mon, Nov 23, 2015 at 03:41:52PM +0800, Chen-Yu Tsai wrote: > On Thu, Nov 5, 2015 at 2:47 PM, Jean-Francois Moine wrote: > > On Wed, 4 Nov 2015 08:30:14 -0800 > > Maxime Ripard wrote: > > > >> Hi Arnd, > >> > >> On Fri, Oct 30, 2015 at

Re: [PATCH v8 6/8] input: touchscreen: imx25 tcq driver

Hi Jonathan, On Saturday 21 November 2015 18:48:10 Jonathan Cameron wrote: > [...] > Another personal preference. I'd not bother wrapping these single line > calls up but rather just make them inline. They don't in of > themselves add much to my mind. Still this one is very much up to you > as

Re: [linux-sunxi] Re: [PATCH] ARM: dts: sun7i: Add dts file for the lamobo-r1 board

Hi, On 22-11-15 20:59, Maxime Ripard wrote: Hi, On Fri, Nov 20, 2015 at 08:11:53PM +0100, Hans de Goede wrote: From: Jelle de Jong The lamobo-r1 board, sometimes called the BPI-R1 but not labelled as such on the PCB, is meant as a A20 based router board. As such

[PATCH] ASoC: Atmel: ClassD: add GCK's parent clock in DT binding

Set GCK's parent as audio clock. Signed-off-by: Songjun Wu --- .../devicetree/bindings/sound/atmel-classd.txt |6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/atmel-classd.txt

[PATCH v3 0/6] Qualcomm PCIe driver and designware fixes

This patch set is continuation of previous v2 at [1]. This time I decided to drop the PHY driver needed by pcie driver for apq8084 and send it separately soon (when sort out the need of separate phy driver). First two patches in the set are fixes in pcie designware driver found during testing the

Re: [PATCH v2 1/2] drm/panel: Add Sharp LS043T1LE01 panel binding documentation

On Fri, Oct 30, 2015 at 03:34:29PM -0700, Bjorn Andersson wrote: > From: Werner Johansson > > Signed-off-by: Werner Johansson > Signed-off-by: Bjorn Andersson > --- > > Change since v1: > -

RE: [PATCH 1/4] pinctrl/lantiq: update devicetree bindings Documentation

On 11/20/2015 at 3:26 PM, Rob Herring wrote: > On Fri, Nov 20, 2015 at 05:52:28AM +0100, Martin Schiller wrote: > > This patch adds the new dedicated "lantiq,pinctrl-" compatible > strings > > to the devicetree bindings Documentation, where is one of > "ase", > > "danube", "xrx100", "xrx200" or

Re: [PATCH 0/3] LPC4337 CIAA-NXP DTS changes

(+Cc Joachim) El 23/11/15 a las 09:37, Ariel D'Alessandro escribió: > Hi, > > This patch set includes some DTS changes for LPC4337 CIAA-NXP board. > It is based on tag next-20151120 of the linux-next repository. It has > been successfully tested on a LPC4337 CIAA-NXP Board. > > Ariel

Re: [PATCH v2 1/5] ARM: dts: sun8i: Add SID node

Hi, On Mon, Nov 23, 2015 at 09:02:48AM +0100, Josef Gajdusek wrote: > Add a node describing the Security ID memory to the > Allwinner H3 .dtsi file. > > Signed-off-by: Josef Gajdusek > --- > arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++ > 1 file changed, 7 insertions(+) > > diff

Re: [PATCH v4 3/4] Crypto: rockchip/crypto - add crypto driver for rk3288

On Tue, Nov 17, 2015 at 12:00:46PM +0800, Zain Wang wrote: > > +static void rk_ablk_hw_init(struct rk_crypto_info *dev) > +{ > + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(dev->ablk_req); > + struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm); > + u32 conf_reg = 0; >

Re: [PATCH V3 net-next 4/5] net:hns: Add support of ethtool TSO set option for Hip06 in HNS

On 20/11/15 14:07, Sergei Shtylyov wrote: On 11/19/2015 11:58 PM, Salil Mehta wrote: From: Salil This patch adds the support of ethtool TSO option to V1 patch, meant to add support of Hip06 SoC to HNS Signed-off-by: Salil Mehta

[PATCH 2/3] ARM: dts: lpc4337-ciaa: enable SCT-PWM

Enable the PWM based on the State Configurable Timer (SCT) included in the LPC4337 SoC of the CIAA-NXP board. Signed-off-by: Ariel D'Alessandro --- arch/arm/boot/dts/lpc4337-ciaa.dts | 4 1 file changed, 4 insertions(+) diff --git

[PATCH 0/3] LPC4337 CIAA-NXP DTS changes

Hi, This patch set includes some DTS changes for LPC4337 CIAA-NXP board. It is based on tag next-20151120 of the linux-next repository. It has been successfully tested on a LPC4337 CIAA-NXP Board. Ariel D'Alessandro (3): ARM: dts: lpc4337-ciaa: enable EEPROM memory ARM: dts: lpc4337-ciaa:

[PATCH 1/3] ARM: dts: lpc4337-ciaa: enable EEPROM memory

The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB EEPROM memory. Signed-off-by: Ariel D'Alessandro --- arch/arm/boot/dts/lpc4337-ciaa.dts | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts

RE: [PATCH v3 1/2] ASoC: da7218: Add bindings documentation for DA7218 audio codec

On November 20, 2015 15:54, Rob Herring wrote: > > +- dlg,micbias1-lvl-millivolt : Voltage (mV) for Mic Bias 1 > > + [<1200>, <1600>, <1800>, <2000>, <2200>, <2400>, <2600>, <2800>, > <3000>] > > +- dlg,micbias2-lvl-millivolt : Voltage (mV) for Mic Bias 2 > > + [<1200>, <1600>, <1800>,

[PATCH 3/3] ARM: dts: lpc4337-ciaa: add i2c0 and devices

Add I2C0 and two I2C EEPROM devices on the CIAA-NXP board: * 24AA1025 EEPROM, 1Mbit: it is accessed as two 512Kbit EEPROMs. * 24AA025E48 EEPROM, 2kbit. Signed-off-by: Ariel D'Alessandro --- arch/arm/boot/dts/lpc4337-ciaa.dts | 30 ++ 1

Re: [PATCH v2 4/5] dt-bindings: document sun8i_ths

Hi, On Mon, Nov 23, 2015 at 09:02:51AM +0100, Josef Gajdusek wrote: > This patch adds the binding documentation for the sun8i_ths driver > > Signed-off-by: Josef Gajdusek > --- > .../devicetree/bindings/thermal/sun8i-ths.txt | 31 > ++ > 1 file changed,

Re: [PATCH v4 3/3] usb: chipidea: register driver as a peripheral with the phy

On Fri, Nov 20, 2015 at 03:47:20PM -0800, Tim Bird wrote: > Register the chipidea driver with the phy, so that the phy > driver can kick the gadget driver when it resumes from low power. > The phy-msm-usb (Qualcomm) driver requires this in order to > recover gadget operation after you disconnect

Re: [PATCH v2 6/6] arm64: dts: berlin4ct: add pll and clock nodes

On Mon, 23 Nov 2015 09:30:42 +0100 Sebastian Hesselbarth wrote: > On 23.11.2015 08:21, Jisheng Zhang wrote: > > On Fri, 20 Nov 2015 22:06:59 +0100 > > Sebastian Hesselbarth wrote: > >> On 20.11.2015 09:42, Jisheng Zhang wrote: > >>> Add syspll, mempll, cpupll, gateclk and berlin-clk nodes. >

Re: [PATCH v8 4/8] mfd: fsl imx25 Touchscreen ADC driver

On Saturday 21 November 2015 17:02:34 Jonathan Cameron wrote: > On 16/11/15 12:01, Markus Pargmann wrote: > > This is the core driver for imx25 touchscreen/adc driver. The module > > has one shared ADC and two different conversion queues which use the > > ADC. The two queues are identical. Both

Re: [PATCH v3 1/6] PCI: designware: remove wrong io_base assignment

On Monday 23 November 2015 11:28:58 Stanimir Varbanov wrote: > The io_base is used to keep the cpu physical address parsed > from ranges dt property. After issue pci_remap_iospace the > io_base has been assigned with io->start, which is not correct > cause io->start is a PCI bus address. > >

[PATCH v5 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

This patch adds drm_bridge driver for parade DSI to eDP bridge chip. Signed-off-by: Jitao Shi --- Change since v4 -fix build error, change Kconfig DRM_PARADE_PS8640 from bool to tristate --- drivers/gpu/drm/bridge/Kconfig | 10 + drivers/gpu/drm/bridge/Makefile

RE: [PATCH v3 1/6] PCI: designware: remove wrong io_base assignment

Hi Stanimir, Many Thanks for this fix > -Original Message- > From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel- > ow...@vger.kernel.org] On Behalf Of Arnd Bergmann > Sent: 23 November 2015 10:00 > To: Stanimir Varbanov > Cc: linux-arm-...@vger.kernel.org;

Re: [linux-sunxi] [PATCH v2 2/5] clk: sunxi: Add driver for the H3 THS clock

On Mon, 2015-11-23 at 09:02 +0100, Josef Gajdusek wrote: > This patch adds a driver for the THS clock which is present on the > Allwinner H3. > > Signed-off-by: Josef Gajdusek > --- >  Documentation/devicetree/bindings/clock/sunxi.txt |  1 + >  drivers/clk/sunxi/Makefile   

Re: [PATCH] Documentation: dt-bindings: Fix interrupt documentation file path

On Mon, 21 Sep 2015, Andrew F. Davis wrote: > Fix the incorrect interrupt documentation file path in binding docs. > > Signed-off-by: Andrew F. Davis > --- > Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt | 2 +- > Documentation/devicetree/bindings/mfd/arizona.txt

Re: [PATCH 2/2] arm64: dts: berlin4ct: enable all i2c nodes for the STB board

On Mon, 23 Nov 2015 09:12:18 +0100 Sebastian Hesselbarth wrote: > On 23.11.2015 03:49, Jisheng Zhang wrote: > > On Fri, 20 Nov 2015 22:19:32 +0100 > > Sebastian Hesselbarth wrote: > >> On 20.11.2015 10:47, Jisheng Zhang wrote: > >>> Enable all i2c nodes for

Re: [PATCH v2 6/6] arm64: dts: berlin4ct: add pll and clock nodes

On 23.11.2015 08:21, Jisheng Zhang wrote: On Fri, 20 Nov 2015 22:06:59 +0100 Sebastian Hesselbarth wrote: On 20.11.2015 09:42, Jisheng Zhang wrote: Add syspll, mempll, cpupll, gateclk and berlin-clk nodes. Signed-off-by: Jisheng Zhang --- [...] + syspll:

[PATCH v3 6/6] ARM: dts: ifc6410: enable pcie dt node for this board

Enable pcie dt node and fill pcie dt node with regulator, pinctrl and reset gpio, to use the pcie on the ifc6410 board. Signed-off-by: Stanimir Varbanov --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 26 ++ 1 file changed, 26

[PATCH v3 2/6] PCI: designware: add memory barrier after enabling region

Add 'write memory' barrier after enable region in PCIE_ATU_CR2 register. The barrier is needed to ensure that the region enable request has been reached it's destination at time when we read/write to PCI configuration space. Without this barrier PCI device enumeration during kernel boot is not

[PATCH v3 3/6] DT: PCI: qcom: Document PCIe devicetree bindings

From: Stanimir Varbanov Document Qualcomm PCIe driver devicetree bindings. Signed-off-by: Stanimir Varbanov Signed-off-by: Stanimir Varbanov --- .../devicetree/bindings/pci/qcom,pcie.txt | 231

[PATCH v3 5/6] ARM: dts: apq8064: add pcie devicetree node

Add the pcie dt node so that it can probe and used. Signed-off-by: Stanimir Varbanov --- arch/arm/boot/dts/qcom-apq8064.dtsi | 36 +++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi

Re: [PATCH v2 4/5] dt-bindings: document sun8i_ths

On Mon, Nov 23, 2015 at 4:02 PM, Josef Gajdusek wrote: > This patch adds the binding documentation for the sun8i_ths driver > > Signed-off-by: Josef Gajdusek > --- > .../devicetree/bindings/thermal/sun8i-ths.txt | 31 > ++ > 1 file

Re: [PATCH v2] watchdog: add Alphascale asm9260-wdt driver

Am 23.11.2015 um 08:26 schrieb Guenter Roeck: > On 11/22/2015 11:11 PM, Oleksij Rempel wrote: >> Hi, >> >> thank you for review! >> >> Am 05.11.2015 um 21:43 schrieb Rob Herring: >>> On Thu, Nov 05, 2015 at 10:06:56AM +0100, Oleksij Rempel wrote: Add WD support for Alphascale asm9260 SoC.

Re: [linux-sunxi] [PATCH] spi: dts: sun4i: Add support for inter-word wait cycles using the SPI Wait Clock Register

2015-11-22 20:45 GMT+01:00 Maxime Ripard : >> Julien, Rob: thanks for your comments! Ok, I will make the following changes: >> >> - remove "sun4i,spi-wdelay" from the sun4i binding and add the >> property to the spi-bus.txt binding instead >> - remove the comment

[PATCH v3 1/6] PCI: designware: remove wrong io_base assignment

The io_base is used to keep the cpu physical address parsed from ranges dt property. After issue pci_remap_iospace the io_base has been assigned with io->start, which is not correct cause io->start is a PCI bus address. Signed-off-by: Stanimir Varbanov ---

[PATCH v3 4/6] PCI: qcom: Add Qualcomm PCIe controller driver

From: Stanimir Varbanov The PCIe driver reuse the Designware common code for host and MSI initialization, and also program the Qualcomm application specific registers. Signed-off-by: Stanimir Varbanov Signed-off-by: Stanimir Varbanov

[PATCH v5 1/2] Documentation: bridge: Add documentation for ps8640 DT properties

Add documentation for DT properties supported by ps8640 DSI-eDP converter. Signed-off-by: Jitao Shi Acked-by: Rob Herring Reviewed-by: Philipp Zabel --- Changes since v4 -no change ---

[PATCH v2 5/5] ARM: meson: DTS: Enable GPIO IRQs

From: Carlo Caione Signed-off-by: Carlo Caione --- arch/arm/boot/dts/meson8b.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index ee352bf..3c0ae45 100644 ---

[PATCH v2 4/5] pinctrl: dt-binding: Extend meson documentation with GPIO IRQs support

From: Carlo Caione Extend the pinctrl binding documentation with the support for external GPIO interrupts. Signed-off-by: Carlo Caione Signed-off-by: Beniamino Galvani --- Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

[PATCH v2 0/5] pinctrl: meson: enable support for external GPIO interrupts

From: Carlo Caione In Meson SoCs we have 8 independent GPIO interrupts that can be programmed to use any of the GPIOs in the chip as interrupt source. These GPIOs are managed by GIC but they can be conditioned (and enabled) by some registers external to the GIC. GPIOs

[PATCH v2 1/5] of/irq: export of_irq_find_parent again

From: Carlo Caione of_irq_find_parent was made static since it had no users outside of of_irq.c. Export it again since we are going to use it again. Signed-off-by: Carlo Caione --- drivers/of/irq.c | 2 +- include/linux/of_irq.h | 6 ++ 2

Re: [PATCH RESEND 06/16] mfd: add TI LMU driver

On Mon, 02 Nov 2015, Milo Kim wrote: > TI LMU(Lighting Management Unit) driver supports lighting devices below. Really small nit, I'd prefer a ' ' between "LMU" and "(". > LM3532, LM3631, LM3632, LM3633, LM3695 and LM3697. > > LMU devices have common features. > - I2C interface for

[PATCH v5 4/4] ARM: shmobile: r8a7740: Remove mapping of L2 cache controller registers

Now all r8a7740-based platforms have been migrated to the generic l2c OF initialization, it's no longer needed to map the L2 cache controller registers from .map_io(). Signed-off-by: Geert Uytterhoeven --- v5: - No changes, v4: - No changes, v3: - No changes,

Re: [PATCH v8 6/8] input: touchscreen: imx25 tcq driver

On Saturday 21 November 2015 17:48:10 Jonathan Cameron wrote: > On 16/11/15 12:01, Markus Pargmann wrote: > > This is a driver for the imx25 ADC/TSC module. It controls the > > touchscreen conversion queue and creates a touchscreen input device. > > The driver currently only supports 4 wire

[PATCH v5 3/4] ARM: shmobile: r8a7740: Migrate to generic l2c OF initialization

Migrate the generic r8a7740 platform from calling l2x0_of_init() to the generic l2c OF initialization. Signed-off-by: Geert Uytterhoeven --- v5: - No changes, v4: - This depends on commit eeedcea69e927857 ("ARM: 8395/1: l2c: Add support for the

[PATCH v5 1/4] ARM: shmobile: r8a7740 dtsi: Add L2 cache-controller node

Add the missing L2 cache-controller node, and link the CPU node to it. This will allow migration to the generic l2c OF initialization. The L2 cache is an ARM L2C-310 (r3p1-150rel0), of size 256 KiB (32 KiB x 8 ways). Signed-off-by: Geert Uytterhoeven --- v5: - Drop

[PATCH v5 0/4] ARM: shmobile: r8a7740/sh73a0 DT Cache Handling

property for this. - Add L1 cache to DT. Dependencies: - This series applies to renesas-devel-20151123-v4.4-rc2, - Patch 3 depends on patch 1, - Patch 4 depends on patch 3. Given C code changesets depending on DT changesets in the same branch are frowned upon, you may want to postpone patc

[PATCH v5 2/4] ARM: shmobile: sh73a0 dtsi: Add L2 cache-controller node

Add the missing L2 cache-controller node, and link the CPU nodes to it. This will allow migration to the generic l2c OF initialization. The L2 cache is an ARM L2C-310 (r3p1), of size 512 KiB (64 KiB x 8 ways). Signed-off-by: Geert Uytterhoeven --- v5: - Drop optional

[RFC PATCH 6/8] arm64, dts: add Juno cpu capacity information

Add Juno cpu capacity bindings information. Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Catalin Marinas Cc:

[RFC PATCH 8/8] arm64: add sysfs cpu_capacity attribute

Add a sysfs cpu_capacity attribute with which it is possible to read and write (thus over-writing default values) CPUs capacity. This might be useful in situation where there is no way to get proper default values at boot time. The new attribute shows up as:

[RFC PATCH 7/8] arm: add sysfs cpu_capacity attribute

Add a sysfs cpu_capacity attribute with which it is possible to read and write (thus over-writing default values) CPUs capacity. This might be useful in situation where there is no way to get proper default values at boot time. The new attribute shows up as:

[RFC PATCH 5/8] arm64: parse cpu capacity from DT

With the introduction of cpu capacity bindings, CPU capacities can now be extracted from DT. Add parsing of such information at boot time. Also, store such information using per CPU variables, as we do for arm. Cc: Catalin Marinas Cc: Will Deacon

[RFC PATCH 4/8] arm, dts: add TC2 cpu capacity information

Add TC2 cpu capacity binding information. Cc: Liviu Dudau Cc: Sudeep Holla Cc: Lorenzo Pieralisi Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian

[RFC PATCH 3/8] arm: parse cpu capacity from DT

With the introduction of cpu capacity bindings, CPU capacities can now be extracted from DT. Add parsing of such information at boot time. We keep code that can produce same information, based on different DT properties and hard-coded values, as fall-back for backward compatibility. Cc: Russell

[RFC PATCH 0/8] CPUs capacity information for heterogeneous systems

Hi all, ARM systems may be configured to have CPUs with different power/performance characteristics within the same chip. In this case, additional information has to be made available to the kernel (the scheduler in particular) for it to be aware of such differences and take decisions

[RFC PATCH 2/8] Documentation: arm: define DT cpu capacity bindings

ARM systems may be configured to have cpus with different power/performance characteristics within the same chip. In this case, additional information has to be made available to the kernel (the scheduler in particular) for it to be aware of such differences and take decisions accordingly.

[RFC PATCH 1/8] ARM: initialize cpu_scale to its default

Instead of looping through all cpus calling set_capacity_scale, we can initialise cpu_scale per-cpu variables to SCHED_CAPACITY_SCALE with their definition. Cc: Russell King Signed-off-by: Juri Lelli --- arch/arm/kernel/topology.c | 4 +--- 1 file

[PATCH] ARM: dts: rockchip: Add IR receiver to Radxa Rock 2 Square

Add support for the IR receiver as present on the Radxa Rock 2 Square board. Signed-off-by: Sjoerd Simons --- arch/arm/boot/dts/rk3288-rock2-square.dts | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts

Re: [PATCH 5/5] arm: boot: store ATAGs structure into DT "/chosen/linux,atags" entry

On Sunday 22 November 2015 07:51:46 Pavel Machek wrote: > On Wed 2015-11-11 17:10:46, Frank Rowand wrote: > > Adding devicetree list. > > > > Thread starts at > > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/354459.html > > > > On 11/5/2015 8:17 AM, Tony Lindgren wrote: > > >

Re: [PATCH V3 5/5] ARM: dts: exynos4412: Rename OPP nodes as opp@

On Wednesday, November 11, 2015 08:10:58 AM Viresh Kumar wrote: > OPP bindings got updated to name OPP nodes this way, make changes > according to that. > > Reviewed-by: Krzysztof Kozlowski > Signed-off-by: Viresh Kumar > --- >

Re: [PATCH V3 5/5] ARM: dts: exynos4412: Rename OPP nodes as opp@

On Tuesday, November 24, 2015 12:04:00 AM Rafael J. Wysocki wrote: > On Wednesday, November 11, 2015 08:10:58 AM Viresh Kumar wrote: > > OPP bindings got updated to name OPP nodes this way, make changes > > according to that. > > > > Reviewed-by: Krzysztof Kozlowski > >

Re: [PATCH v7 28/50] powerpc/pci: Rename pcibios_{add,remove}_pci_devices()

On Wed, Nov 18, 2015 at 01:43:06PM +1100, Alexey Kardashevskiy wrote: >On 11/05/2015 12:12 AM, Gavin Shan wrote: >>This renames pcibios_{add,remove}_pci_devices() to avoid conflicts >>with names of the weak functions in PCI subsystem, which have the >>prefix "pcibios". No logical changes

Re: [PATCH V3 0/5] PM / OPP: opp-supported-hw and -name bindings

On Wednesday, November 11, 2015 08:10:53 AM Viresh Kumar wrote: > Hi Rafael, > > Rob only needs to Ack the modified 2/5 patch and then you can safely > apply this series. > > The first patch enables us to select only a subset of OPPs from the > bigger table, based on what version of the hardware

Re: [PATCH v7 12/50] powerpc/powernv: Track M64 segment consumption

On Thu, Nov 19, 2015 at 11:10:42AM +1100, Alexey Kardashevskiy wrote: >On 11/17/2015 12:04 PM, Gavin Shan wrote: >>On Mon, Nov 16, 2015 at 07:01:59PM +1100, Alexey Kardashevskiy wrote: >>>On 11/05/2015 12:12 AM, Gavin Shan wrote: As we track M32 segment consumption, this introduces an array to

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