On Sat, Nov 28, 2015 at 06:39:01PM +0800, Xinliang Liu wrote:
> Add vblank handle for ADE.
>
> Signed-off-by: Xinliang Liu
> Signed-off-by: Xinwei Kong
> Signed-off-by: Andy Green
> ---
> drivers/gpu/drm/hisilicon/hisi_drm_ade.c | 78
>
> drivers/gpu/drm/hisil
On Sat, Nov 28, 2015 at 03:25:35PM +, Emil Velikov wrote:
> Hi Xinliang,
>
> On 28 November 2015 at 10:38, Xinliang Liu wrote:
> > Add DRM master driver for hi6220 SoC which used in HiKey board.
> > Add dumb buffer feature.
> > Add prime dmabuf feature.
> >
> > Signed-off-by: Xinliang Liu
>
> Hi Rob,
>
> On Sat, Nov 28, 2015 at 5:30 AM, Rob Herring wrote:
> > On Thu, Nov 26, 2015 at 10:47:26PM +0900, Chanwoo Choi wrote:
> >> This patch adds the documentation for generic exynos bus frequency
> >> driver.
> >>
> >> Signed-off-by: Chanwoo Choi
> >> ---
> >> .../devicetree/bindings/de
Hello all,
Am 18.11.2015 um 09:24 schrieb Heiko Schocher:
Hello Dave,
Am 17.11.2015 um 22:29 schrieb Dave Gerlach:
Hi,
On 11/17/2015 02:24 AM, Heiko Schocher wrote:
add support for the am335x based shc board.
UART: 0-2 and 4
DRAM: 512 MiB
MMC: OMAP SD/MMC: 0 @ 26 MHz
OMAP SD/MMC: 1 @
Remove the "not" before "cannot".
I am fixing the comment block style while I am here.
Signed-off-by: Masahiro Yamada
---
drivers/of/address.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 5289c80..91a469d 100644
---
A trivial change suggested by checkpatch.pl.
Signed-off-by: Masahiro Yamada
---
drivers/of/address.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index cd53fe4..5289c80 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.
On 27.11.2015 15:42, Anand Moon wrote:
> hi Krzysztof,
>
> On 22 October 2015 at 18:34, Anand Moon wrote:
>> hi Krzysztof,
>>
>> On 22 October 2015 at 06:31, Krzysztof Kozlowski
>> wrote:
>>> On 20.10.2015 21:56, Anand Moon wrote:
Changes need for host controller to detect UHS-I highspeed c
On 27-11-15, 17:32, Dawei Chien wrote:
> MT8173 cpufreq driver use of_cpufreq_power_cooling_register registering
> cooling devices with dynamic power coefficient.
>
> Signed-off-by: Dawei Chien
> ---
> This patch is base on patchset:
> https://lkml.org/lkml/2015/11/17/251
> ---
> drivers/cpufreq
Add qspi memory mapped region entries for DRA7xx based SoCs. Also,
update the binding documents for the controller to document this change.
Acked-by: Rob Herring
Signed-off-by: Vignesh R
---
v4: No changes.
Documentation/devicetree/bindings/spi/ti_qspi.txt | 14 ++
arch/arm/boot/d
Add qspi memory mapped region entries for AM43xx based SoCs. Also,
update the binding documents for the controller to document this change.
Acked-by: Rob Herring
Signed-off-by: Vignesh R
---
v4: No changes.
Documentation/devicetree/bindings/spi/ti_qspi.txt | 5 +++--
arch/arm/boot/dts/am4372.
ti-qspi controller provides mmap port to read data from SPI flashes.
mmap port is enabled in QSPI_SPI_SWITCH_REG. ctrl module register may
also need to be accessed for some SoCs. The QSPI_SPI_SETUP_REGx needs to
be populated with flash specific information like read opcode, read
mode(quad, dual, no
In addition to providing direct access to SPI bus, some spi controller
hardwares (like ti-qspi) provide special port (like memory mapped port)
that are optimized to improve SPI flash read performance.
This means the controller can automatically send the SPI signals
required to read data from the SP
Certain spi controllers may provide accelerated interface to read from
m25p80 type flash devices. This interface provides better read
performance than regular SPI interface.
Call spi_flash_read(), if supported, to make use of such interface.
Signed-off-by: Vignesh R
---
v4:
* Use spi_flash_rea
Changes since v3:
Rework to introduce spi_flash_read_message struct.
Support different opcode/addr/data formats as per Brian's suggestion
here: https://lkml.org/lkml/2015/11/11/454
Changes since v2:
Remove mmap_lock_mutex.
Optimize enable/disable of mmap mode.
Changes since v1:
Introduce API in S
Signed-off-by: Zhangfei Gao
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 33 +++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 0f11e2a..abb2ea0 100644
--- a/arch/arm64/boot
From: Tang Yuantian
Added SATA node to LS1021A DTS to support SATA function.
Signed-off-by: Tang Yuantian
---
v2:
- put reg-names right after reg property
arch/arm/boot/dts/ls1021a.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/ar
Hi, Lee
Thanks to the review,
I'll carry your Ack when I reflect Jacek's comment.
On 2015년 11월 26일 18:11, Lee Jones wrote:
> On Wed, 25 Nov 2015, Ingi Kim wrote:
>
>> This patch adds device driver of Richtek RT5033 PMIC.
>> The RT5033 Flash LED Circuit is designed for one or two LEDs driving
>>
Hi Jacek,
On 2015년 11월 26일 18:43, Jacek Anaszewski wrote:
> Hi Ingi,
>
> On 11/26/2015 09:02 AM, Ingi Kim wrote:
> [...]
+torch_unlock:
+mutex_unlock(&led->lock);
+return ret;
+}
+
+static int rt5033_led_flash_brightness_set(struct led_classdev_flash
*f
This patchset attempts to new compatible for thermal founding
on RK3228/RK3399 SoCs.
Signed-off-by: Caesar Wang
Acked-by: Rob Herring
---
Changes in v2: None
Changes in v1:
- As Heiko comments, fix a copy incorrect name.
- Add a Acked from Rob.
Documentation/devicetree/bindings/thermal/rockc
This series pacthes to support the next soc for this thermal driver.
I don't add the dts thermal data since these SoCs have *_not_* land
in this mainline. I believe these SoCs dts will land in this mainline
lately,
then I will add the thermal data for Heiko.
This series patches can apply into Edua
This patch adds support for R-Car generation 3 USB2 PHY driver.
This SoC has 3 EHCI/OHCI channels, and the channel 0 is shared
with the HSUSB (USB2.0 peripheral) device. And each channel has
independent registers about the PHYs.
So, the purpose of this driver is:
1) initializes some registers of
To use the channel 0 of R-Car gen3 as periperal mode, This patch changes
the mode to OTG instead of HOST. Then, this driver needs to set some
registers to enable host mode and detects ID pin and VBUS pin at
phy_init() timing.
For now, the channel 0 can be used as host mode only.
Signed-off-by: Yo
This patch adds support for runtime ID/VBUS pin detection if
the channel 0 of R-Car gen3 is used. So, we are able to use
the channel as both host and peripheral.
Signed-off-by: Yoshihiro Shimoda
---
.../devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 +
drivers/phy/phy-rcar-gen3-usb2.c
Add Renesas usb2 phy driver to maintainer entry.
Signed-off-by: Yoshihiro Shimoda
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e9caa4b..ac1e301 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8928,6 +8928,12 @@ F: drivers/rpmsg/
This patch is based on the latest linux-phy / next branch.
(commit id = 8005c49d9aea74d382f474ce11afbbc7d7130bec)
Changes from v5:
- Minor modify the rcar_gen3_phy_usb2_probe() in patch 1.
- Rebase the latest linux-phy / next branch.
Changes from v4:
- Modify Kconfig to "depends on OF && AR
On Mon, Nov 30, 2015 at 12:14:21AM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 11/29/2015 10:26 PM, Geert Uytterhoeven wrote:
>
> >>Add support for yet another ARM member of the R-Car family, R-Car M2, also
>
> >R-Car M2-W?
>
>Right, forgot about the postfixes.
>
> >>known as R8A7791.
>
On Monday 30 November 2015 01:09:17 Nicolas Pitre wrote:
> On Sun, 29 Nov 2015, Russell King - ARM Linux wrote:
> > On Sat, Nov 28, 2015 at 12:34:23PM -0500, Nicolas Pitre wrote:
> > > Good. And Arnd likes the idea too. So we might be converging at
> > > last which is a good thing.
> >
> > I disag
On Sun, 29 Nov 2015, Russell King - ARM Linux wrote:
> On Sat, Nov 28, 2015 at 12:34:23PM -0500, Nicolas Pitre wrote:
> > Good. And Arnd likes the idea too. So we might be converging at last
> > which is a good thing.
>
> I disagree with the idea that there is convergence. There might be
> conv
On Sun, Nov 29, 2015 at 07:19:18PM +0100, Pali Rohár wrote:
> On Sunday 29 November 2015 19:09:39 Russell King - ARM Linux wrote:
> > On Sat, Nov 28, 2015 at 12:34:23PM -0500, Nicolas Pitre wrote:
> > > Good. And Arnd likes the idea too. So we might be converging at
> > > last which is a good thing
On Tue, Nov 17, 2015 at 11:21 AM, Markus Pargmann wrote:
>> +int gpiod_initialize(struct gpio_desc *desc, unsigned long lflags,
>> + enum gpiod_flags dflags)
>> +{
>> + int status;
>> +
>
> Sorry, this is missing a gpiod_parse_flags(). Will fix this and resend
> tomorrow.
I
Hello.
On 11/29/2015 10:26 PM, Geert Uytterhoeven wrote:
Add support for yet another ARM member of the R-Car family, R-Car M2, also
R-Car M2-W?
Right, forgot about the postfixes.
known as R8A7791.
There's also R-Car M2-N, aka R8A7793, but you probably know that ;-)
Will fix.
Hi Sergei,
On Fri, Nov 27, 2015 at 11:06 PM, Sergei Shtylyov
wrote:
> Add support for yet another ARM member of the R-Car family, R-Car M2, also
R-Car M2-W?
> known as R8A7791.
There's also R-Car M2-N, aka R8A7793, but you probably know that ;-)
Gr{oetje,eeting}s,
Ge
On Sunday 29 November 2015 19:09:39 Russell King - ARM Linux wrote:
> On Sat, Nov 28, 2015 at 12:34:23PM -0500, Nicolas Pitre wrote:
> > Good. And Arnd likes the idea too. So we might be converging at
> > last which is a good thing.
>
> I disagree with the idea that there is convergence. There mi
On Sat, Nov 28, 2015 at 12:34:23PM -0500, Nicolas Pitre wrote:
> Good. And Arnd likes the idea too. So we might be converging at last
> which is a good thing.
I disagree with the idea that there is convergence. There might be
convergence towards an idea, but... Here's a mail extract, from July
7
Hello Maxime,
Sorry for delayed response.
On Mon, Oct 26, 2015 at 4:20 AM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Oct 23, 2015 at 07:46:16AM +0800, Vishnu Patekar wrote:
>> + memory {
>> + reg = <0x4000 0x8000>;
>> + };
>> +
>> + timer {
>> + compatible
On 11/29/2015 06:10 AM, Dmitry Lifshitz wrote:
[...]
>>> +};
>>> +
>>> +leds {
>>> +compatible = "gpio-leds";
>>> +pinctrl-names = "default";
>>> +pinctrl-0 = <&leds_pins_default>;
>>> +
>>> +led@0 {
>>> +label = "cl-som-am57x:green";
>>> +
This patch adds support for RPi several Power Domains and enable support
to enable the USB Power Domain when it's not enabled before.
This patch based on Eric Anholt's patch to support Power Domains. He had
an issue about -EPROBE_DEFER inside the power domain subsystem, this
issue was solved by co
This patch adds devicetree tree bindings for the Raspberry Pi power
domain driver.
Signed-off-by: Alexander Aring
Acked-by: Rob Herring
---
.../bindings/arm/bcm/raspberrypi,bcm2835-power.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644
Documentation/devicet
This patch adds function pm_genpd_exit for undo a pm_genpd_init. This
is useful for multiple power domains while probing. If the probing fails
after one pm_genpd_init was called we need to undo all previous
registrations of generic pm domains inside the gpd_list list.
There is a check on IS_ERR_OR
This patch updates the Raspberry Pi devicetree bindings to support the
power domain driver and enable the USB power domain.
Signed-off-by: Alexander Aring
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 11 +++
arch/arm/boot/dts/bcm2835.dtsi | 2 +-
2 files changed, 12 insertions(+), 1 del
Hi,
this patch series contains at first a patch for the power domain subsystem
which offers to exit generic power domains when init was called before.
The RPi Power-Domains need to be enabled/disabled by interacting with the
RPi firmware which can fail. To cleanup the probing we need to undo the
The device table is required to load modules based on modaliases.
Signed-off-by: Enric Balletbo i Serra
---
Changes since last version:
- Use of_match_ptr (Lee Jones)
drivers/video/backlight/tps65217_bl.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/video/backlight/tps65
On 24/11/15 10:59, Adriana Reus wrote:
> Keep track of the als and px enabled/disabled status in
> order to enable them selectively.
>
> Signed-off-by: Adriana Reus
Couple more nitpicks, but again fixed up during apply.
> ---
> drivers/iio/light/us5182d.c | 64
>
On 25/11/15 03:52, Stefan Agner wrote:
> Hi Haibo,
>
> Some comments below:
>
> On 2015-11-20 07:48, Haibo Chen wrote:
>> Freescale i.MX7D soc contains a new ADC IP. This patch add this ADC
>> driver support, and the driver only support ADC software trigger.
>>
>> Signed-off-by: Haibo Chen
>> --
On 24/11/15 10:59, Adriana Reus wrote:
> Add interrupt support and events for proximity.
> Add two threshold events to signal rising and falling directions.
>
> Signed-off-by: Adriana Reus
A few bits and bobs inline...
> ---
> drivers/iio/light/us5182d.c | 272
>
On 24/11/15 10:59, Adriana Reus wrote:
> Add power management for sleep as well as runtime pm.
>
> Signed-off-by: Adriana Reus
Mostly fine, but a comment on a possible future tidy up inline.
Applied to the togreg branch of iio.git - initially pushed out as
testing for the autobuilders to play wi
Sebastian,
Adding Ezequiel Garcia in Cc.
On Sat, 28 Nov 2015 12:14:08 +0100, Sebastian Hesselbarth wrote:
> The NAND device found on Lenovo ix4-300d uses 4-bit BCH ECC protection.
> Add the corresponding properties to the NAND node.
If the ONFI information from the NAND flash say that it require
On 24/11/15 10:59, Adriana Reus wrote:
> This chip supports two power modes.
> 1. "one-shot" mode - the chip activates and executes one complete
> conversion loop and then shuts itself down. This is the default mode
> chosen for raw reads.
> 2. "continuous" mode - the chip takes continuous measurem
On 25/11/15 23:55, Rob Herring wrote:
> On Wed, Nov 25, 2015 at 11:50:30AM +0200, Adriana Reus wrote:
>>
>>
>> On 25.11.2015 02:01, Rob Herring wrote:
>>> On Tue, Nov 24, 2015 at 12:59:49PM +0200, Adriana Reus wrote:
Add a property to allow changing the default power-saving mode.
By defau
On 27/11/15 20:15, Rob Herring wrote:
> On Fri, Nov 27, 2015 at 02:52:52PM +0100, Sascha Hauer wrote:
>> The mcp3421 is the single channel variant of the mcp342x family and
>> can be supported by the mcp342x driver.
>>
>> Signed-off-by: Sascha Hauer
>> Cc: devicetree@vger.kernel.org
>
> Acked-by:
Hi Arnd,
On 20.11.2015 22:20, Arnd Bergmann wrote:
> On Friday 20 November 2015 20:07:46 Vladimir Zapolskiy wrote:
>> On 20.11.2015 16:04, Arnd Bergmann wrote:
>>> On Friday 20 November 2015 03:05:09 Vladimir Zapolskiy wrote:
+
+struct clk_proto_t {
+ const char *name;
+
Fix a few typos and reword the description of the
'#qca,ddr-wb-channel-cells' property.
Signed-off-by: Alban Bedel
CC: triv...@kernel.org
---
Changlog:
v2: * Fixed the truncated log message because of a
line starting with a #.
---
.../bindings/memory-controllers/ath79-ddr-controller.txt
Add a missing quote in the example
Signed-off-by: Alban Bedel
CC: triv...@kernel.org
---
.../devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-m
Hi Nishanth,
Thank you for the provided feedback.
On 11/25/2015 11:36 PM, Nishanth Menon wrote:
On 11/25/2015 12:39 AM, Dmitry Lifshitz wrote:
[...]
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
new file mode 100644
index 000..b11d7da
Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
Signed-off-by: Bharat Kumar Gogada
Signed-off-by: Ravi Kiran Gummaluri
Acked-by: Rob Herring
---
Changes for v11:
-> Changed data types of bridge, pcie controller and ecam base address
-> Added programming of E_BREG_BASE_HI, E_ECAM_BAS
Hello,
Sorry for delayed response.
On Fri, Oct 23, 2015 at 9:37 AM, Chen-Yu Tsai wrote:
> On Fri, Oct 23, 2015 at 7:46 AM, Vishnu Patekar
> wrote:
>> Allwinner A83T is octa-core cortex-a7 based SoC.
>> It's clock control unit and prcm, pinmux are different from previous sun8i
>> series.
>> Its p
Hi Mark,
On Fri, Nov 27, 2015 at 2:24 PM, Mark Brown wrote:
> On Fri, Nov 27, 2015 at 02:06:41PM +0100, Geert Uytterhoeven wrote:
>> (replaying to an old mail, as I'm seeing the exact same behavior with current
>> overlay code)
>
> I don't seem to have this mail... I'm not even sure that mailin
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