aces as well.
>
> Signed-off-by: Sricharan R
Looks good to me.
Reviewed-by: Andy Gross
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Definition: should specify base address and size of the WiFi related
> + registers of WCNSS
> +
> +- qcom,state:
> + Usage: required
> + Value type:
> + Definition: should specify the tx-enable and tx-ring-empty state
> + references
On Sun, Dec 27, 2015 at 05:15:45PM -0800, Bjorn Andersson wrote:
> The document defines the binding for a component that loads firmware for
> and boots the Qualcomm WCNSS core.
>
> Signed-off-by: Bjorn Andersson
> ---
Acked-by: Andy Gross
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On Tue, Dec 22, 2015 at 12:22:28PM +, Mark Brown wrote:
> On Tue, Dec 22, 2015 at 08:57:20AM +, Build bot for Mark Brown wrote:
>
> Today's linux-next fails to link an arm64 allmodconfig due to:
>
> > ERROR: "of_irq_count" [drivers/pinctrl/qcom/pinctrl-ssbi-mpp.ko] undefined!
> > ERROR: "
anges since v1
> - switch supply name to have dashes instead of underscores
> - remove superfluous DT explanations in the otg node description
Reviewed-by: Andy Gross
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> Changes since v3:
> - changed DT node name to otg-vbus
> - removed fixed-voltage setup from otg regulator rdesc
> Changes since v1:
> - changed name of supply to remove underscores
> ---
Reviewed-by: Andy Gross
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On Fri, Dec 11, 2015 at 06:29:58PM +, Srinivas Kandagatla wrote:
> From: "Ivan T. Ivanov"
>
> GSBI6 UART module is connected to BT chip, which uses
> hardware flow control lines. Enable them on SoC side.
>
> Signed-off-by: Ivan T. Ivanov
Looks fine to me. Thanks for the patch.
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On Fri, Dec 11, 2015 at 06:31:47PM +, Srinivas Kandagatla wrote:
> This patch adds the shared memory in the Device tree reserved memory
> list so that kernel would not map it as normal memory.
>
> Signed-off-by: Srinivas Kandagatla
Looks fine to me.
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On Fri, Dec 11, 2015 at 06:32:11PM +, Srinivas Kandagatla wrote:
> This patch adds support hwspinlock devicetree node.
>
> Signed-off-by: Srinivas Kandagatla
Looks fine to me. Thanks for the patch.
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On Fri, Dec 11, 2015 at 06:33:09PM +, Srinivas Kandagatla wrote:
> This patch adds support to qcom,smem device.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm/boot/dts/qcom-apq8064.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dt
/arm64/boot/dts/qcom/*
> F: drivers/soc/qcom/
> F: drivers/tty/serial/msm_serial.h
> F: drivers/tty/serial/msm_serial.c
for QCOM,
Acked-by: Andy Gross
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From: Andy Gross
This patch adds all the required nodes to support SMEM on APQ8084
Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 36
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/qcom
- Removed MSM8974 patches as there was already an outstanding patch
Andy Gross (2):
arm64: dts: qcom: Add MSM8916 SMEM nodes
arm: dts: Add APQ8084 SMEM nodes
arch/arm/boot/dts/qcom-apq8084.dtsi | 36 ++
arch/arm64/boot/dts/qcom/msm8916.dtsi | 41
From: Andy Gross
This patch adds the nodes necessary to support the SMEM driver on MSM8916
platforms.
Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch
f-by: Matthew McClintock
> Acked-by: Rob Herring
Looks good. Much better than before.
Reviewed-by: Andy Gross
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On Wed, Dec 02, 2015 at 06:44:11PM +0200, Stanimir Varbanov wrote:
> On 12/01/2015 07:23 PM, Andy Gross wrote:
> > On Tue, Dec 01, 2015 at 11:14:58AM +0200, Stanimir Varbanov wrote:
> >> The pipe fifo size register must instruct the bam hw
> >> how many hw descri
0,9 @@ static int bam_dma_probe(struct platform_device *pdev)
> return ret;
> }
>
> + bdev->controlled_remotely = of_property_read_bool(pdev->dev.of_node,
> + "qcom,controlled-remotely");
> +
> bd
RQ_CLR));
> + }
Looks good. We shouldn't be accessing this unless there is actually an irq
shown in the srcs.
Thanks for catching this.
Reviewed-by: Andy Gross
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On Tue, Dec 01, 2015 at 11:28:32AM +0100, Arnd Bergmann wrote:
> On Tuesday 01 December 2015 11:14:58 Stanimir Varbanov wrote:
> >
> > diff --git a/drivers/dma/qcom_bam_dma.c b/drivers/dma/qcom_bam_dma.c
> > index 0f06f3b7a72b..6d290de9ab2b 100644
> > --- a/drivers/dma/qcom_bam_dma.c
> > +++ b/dri
On Tue, Dec 01, 2015 at 11:14:58AM +0200, Stanimir Varbanov wrote:
> The pipe fifo size register must instruct the bam hw
> how many hw descriptors can be pushed to fifo. Currently
> we isntruct the hw with 32KBytes but wrap the tail in
> bam_start_dma in BAM_P_EVNT_REG on 4095 i.e. 32760. This
> l
On Mon, Nov 30, 2015 at 12:19:13PM -0800, Bjorn Andersson wrote:
> On Mon, Nov 30, 2015 at 11:23 AM, Kevin Hilman wrote:
> > On Tue, Oct 20, 2015 at 9:57 PM, Bjorn Andersson
> > wrote:
> >> Make sure the blsp1_uart2 pins are in the correct state for the uart.
> >>
> >> Signed-off-by: Bjorn Anders
On Fri, Nov 20, 2015 at 09:08:46AM -0600, Felipe Balbi wrote:
>
> Hi,
>
> Andy Gross writes:
> > This patch adds documentation for the optional syscon-tcsr property in the
> > Qualcomm DWC3 node. The syscon-tcsr specifies the register and bit used to
> > configure
On Fri, Nov 20, 2015 at 09:06:33AM -0600, Felipe Balbi wrote:
>
> Hi,
>
> Andy Gross writes:
> > This patch adds automatic configuration of the TCSR phy mux register based
> > on
> > the syscon-tcsr devicetree entry. This configuration is optional, as some
>
This patch adds a new driver for the Qualcomm USB 3.0 PHY that exists on some
Qualcomm platforms. This driver uses the generic PHY framework and will
interact with the DWC3 controller.
Signed-off-by: Andy Gross
---
drivers/phy/Kconfig | 11 +
drivers/phy/Makefile| 1
This patch adds Qualcomm DWC3 USB nodes to device tree to enable support for the
DWC3 controller found on IPQ8064/AP148 platforms.
Signed-off-by: Andy Gross
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 24 +
arch/arm/boot/dts/qcom-ipq8064.dtsi | 89
This patch adds automatic configuration of the TCSR phy mux register based on
the syscon-tcsr devicetree entry. This configuration is optional, as some
platforms may not require the mux selection.
Signed-off-by: Andy Gross
---
drivers/usb/dwc3/dwc3-qcom.c | 25 +
1 file
This patch adds documentation for the optional syscon-tcsr property in the
Qualcomm DWC3 node. The syscon-tcsr specifies the register and bit used to
configure the TCSR USB phy mux register.
Signed-off-by: Andy Gross
---
Documentation/devicetree/bindings/usb/qcom,dwc3.txt | 11 +++
1
selection required to get working ports.
Andy Gross (4):
phy: Add Qualcomm DWC3 HS/SS PHY driver
usb: dwc3: qcom: Configure TCSR phy mux register
ARM: dts: qcom: Add DWC3 USB support on IPQ8064
Documentation: usb: dwc3: qcom: Add TCSR mux usage
.../devicetree/bindings/usb/qcom,dwc3.txt
On Tue, Nov 17, 2015 at 05:12:25PM -0800, Stephen Boyd wrote:
> These patches add the initial dts files for the MSM8996 SoC and
> MTP evaluation board.
>
These all look fine.
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> Cc:
> Cc: "Ivan T. Ivanov"
> Cc: Bjorn Andersson
> Signed-off-by: Stephen Boyd
Reviewed-by: Andy Gross
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tloaders, a
> new dtbTool program will parse the compatible string and generate
> a QCDT image from it.
>
> Signed-off-by: Stephen Boyd
> ---
Looks workable.
Reviewed-by: Andy Gross
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This patch creates a platform driver for the SCM so that we can adequately
manage resources. This removes clients having to carry the necessary
clocks to use the SCM resources.
Signed-off-by: Andy Gross
---
.../devicetree/bindings/firmware/qcom,scm.txt | 25
drivers/firmware
On Wed, Sep 30, 2015 at 06:32:01PM +0100, Mark Rutland wrote:
> On Wed, Sep 30, 2015 at 02:51:26PM +0100, Ivan T. Ivanov wrote:
> >
> > On Wed, 2015-09-30 at 14:29 +0100, Mark Rutland wrote:
> > > On Wed, Sep 30, 2015 at 01:08:24PM +0100, Ivan T. Ivanov wrote:
> > > > Add transmit DMA support for
On Fri, Sep 18, 2015 at 04:18:52PM +0300, Ivan T. Ivanov wrote:
> Hi,
>
> This is second version of the changes previously posted [1].
> I have to rebase them on top of Andy's for-next[2] branch and rework them
> a little bit, because some of the definitions have been already merged.
>
> Regards,
On Fri, Sep 18, 2015 at 01:29:31PM +0100, Srinivas Kandagatla wrote:
> Hi Andy,
>
> Here are few cleanup and additions to the existing APQ8064 device tree.
>
> Some of the patches are to do with princtrl cleanup which was always not
> in the right place and some of the pinctrls were missing.
> O
On Thu, Aug 27, 2015 at 11:01:38AM +0530, Varadarajan Narayanan wrote:
> Add initial dts files and SoC support for IPQ4019
>
> Signed-off-by: Varadarajan Narayanan
> ---
Aside from the incorrect copyright date (which i will fix), this is fine.
I'll apply this.
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On Thu, Sep 03, 2015 at 02:33:22PM -0700, Stephen Boyd wrote:
> On 07/20, Andy Gross wrote:
> > This patch creates a platform driver for the SCM so that we can adequately
> > manage resources. This removes clients having to carry the necessary
> > clocks to use the SCM resou
On Tue, Aug 25, 2015 at 04:46:22PM -0500, Andy Gross wrote:
> On Tue, Aug 18, 2015 at 02:10:27PM +0100, Srinivas Kandagatla wrote:
> > This patch add alias node with serial0.
> >
> > Signed-off-by: Srinivas Kandagatla
> > ---
> > arch/arm/boot/dts/qcom-apq8064-
On Tue, Aug 18, 2015 at 02:10:27PM +0100, Srinivas Kandagatla wrote:
> This patch add alias node with serial0.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 4
> 1 file changed, 4 insertions(+)
Looks fine. Applied.
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On Tue, Aug 18, 2015 at 02:10:19PM +0100, Srinivas Kandagatla wrote:
> This patch removes unnecessary i2c pinctrl nodes in board file, these
> are already defined in the soc specific file qcom-apq8064.dtsi.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm/boot/dts/qcom-apq8064-cm-qs600.dt
On Tue, Aug 25, 2015 at 06:37:42PM +0300, Stanimir Varbanov wrote:
> Adds rng device tree node for msm8916 SoCs.
>
> Signed-off-by: Stanimir Varbanov
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi |7 +++
> 1 file changed, 7 insertions(+)
Looks good to me. Applied.
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On Wed, Aug 05, 2015 at 10:32:42AM -0600, Lina Iyer wrote:
> Enable PM_CPU_DOMAIN and its PM_GENERIC_DOMAINS dependenciesd to provide
> cpu domain support for QCOM SoCs.
Fix dependencies
>
> Signed-off-by: Lina Iyer
> ---
> drivers/soc/qcom/Kconfig | 4
> 1 file changed, 4 insertions(+)
On Mon, Aug 03, 2015 at 10:38:18AM +0530, Archit Taneja wrote:
> Enable the NAND controller node on the AP148 platform. Provide pinmux
> information.
>
> Cc: devicetree@vger.kernel.org
>
> Signed-off-by: Archit Taneja
> ---
> arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36
>
On Mon, Jul 27, 2015 at 08:20:31PM -0700, Bjorn Andersson wrote:
> Add binding documentation for the Qualcomm Resource Power Manager (RPM)
> using shared memory (Qualcomm SMD) as transport mechanism. This is found
> in 8974 and newer based devices.
>
> The binding currently describes the rpm itsel
On Mon, Jul 27, 2015 at 08:20:29PM -0700, Bjorn Andersson wrote:
> Add device tree binding documentation for the Qualcomm Shared Memory
> Device, used for communication between the various CPUs in the Qualcomm
> SoCs.
>
> Signed-off-by: Bjorn Andersson
> ---
Applied, thanks.
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On Tue, Jul 28, 2015 at 01:52:36PM +0100, Srinivas Kandagatla wrote:
> Hi Andy,
>
> As discussed here are some dt patches which depend on
> pmic header "dt-bindings/pinctrl/qcom,pmic-gpio.h" which is availble in
> linux-next.
Ok. I took all of these and put them on top of my 4.3 tags on the
qco
On Tue, Jul 28, 2015 at 09:12:58AM +0100, Srinivas Kandagatla wrote:
> This patch adds real regulators for all the three sdcc nodes.
>
> Signed-off-by: Srinivas Kandagatla
> ---
Applied. Thanks
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On Tue, Jul 28, 2015 at 09:13:05AM +0100, Srinivas Kandagatla wrote:
> This patch adds real regulators to sdcc nodes.
>
> Signed-off-by: Srinivas Kandagatla
> ---
Applied. Thanks
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a L
On Tue, Jul 28, 2015 at 09:12:51AM +0100, Srinivas Kandagatla wrote:
> This patch removes temporary fixed regluator use for mmc.
> Board files should use the regulators which are wiredup appropriately.
>
> Signed-off-by: Srinivas Kandagatla
> ---
Applied. Thanks!
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On Mon, Jul 27, 2015 at 02:52:10PM +0100, Srinivas Kandagatla wrote:
> From: Pramod Gurav
>
> This change adds DT support for GSBI6 and muxes the gpio pins
> as UART lines. Also defines a alias for serial port on these lines.
>
> Signed-off-by: Pramod Gurav
> [Srinivas Kandagatla]: fix pinctrl
On Mon, Jul 27, 2015 at 02:52:19PM +0100, Srinivas Kandagatla wrote:
> Without this i2c instance for missing cell-index nodes would fail, fix
> it by adding correct cell-index.
>
> Signed-off-by: Srinivas Kandagatla
> ---
Applied. Thanks.
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On Mon, Jul 27, 2015 at 02:52:02PM +0100, Srinivas Kandagatla wrote:
> This patch adds pmic pm8921 mpp gpio controller node.
>
> Signed-off-by: Srinivas Kandagatla
> ---
Applied. Thanks!
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On Mon, Jul 27, 2015 at 02:51:52PM +0100, Srinivas Kandagatla wrote:
> This patch adds pmic gpio node to the device tree, this node is
> necessary for devices like wlan to control reset gpio.
>
> Signed-off-by: Srinivas Kandagatla
> ---
Applied. thanks!
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On Mon, Jul 27, 2015 at 02:50:20PM +0100, Srinivas Kandagatla wrote:
> /* WLAN */
> sdcc4: sdcc@121c {
> status = "okay";
> + vmmc-supply = <&v3p3_fixed>;
> + vqm
On Mon, Jul 27, 2015 at 02:50:12PM +0100, Srinivas Kandagatla wrote:
> sdcc3: sdcc@1218 {
> status = "okay";
> + vmmc-supply = <&pm8921_l6>;
> pinctrl-names = "default";
>
On Mon, Jul 27, 2015 at 02:49:05PM +0100, Srinivas Kandagatla wrote:
> Hi Andy,
>
> Here are some DT patches which are fixes + pmic gpio/mpp nodes for APQ8064.
> I tested these patches on APQ8064 based IFC6410 board. These patches are
> on top of your qcom/dt branch.
>
> I got few more DT patches
On Thu, Jul 16, 2015 at 04:55:31PM -0700, Tim Bird wrote:
> This binding is used to configure the driver for the coincell charger
> found in Qualcomm PMICs.
>
> Signed-off-by: Tim Bird
> ---
Looks reasonable.
Reviewed-by: Andy Gross
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or capacitor) when charging.
>
> Signed-off-by: Tim Bird
> ---
Looks fine.
Reviewed-by: Andy Gross
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On Thu, Jul 16, 2015 at 04:55:33PM -0700, Tim Bird wrote:
> Add framework for the coincell charger DT block in pm8941 file, and
> actual values for honami battery in the honami dts file.
>
> Signed-off-by: Tim Bird
> ---
Reviewed-by: Andy Gross
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On Tue, Jul 21, 2015 at 04:04:45PM +0530, Archit Taneja wrote:
> The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
> compatible string.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja
> ---
Reviewed-by: Andy Gross
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Qua
On Tue, Jul 21, 2015 at 04:04:46PM +0530, Archit Taneja wrote:
> Enable the NAND controller node on the AP148 platform. Provide pinmux
> information.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja
> ---
Looks fine.
Reviewed-by: Andy Gross
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On Tue, Jul 21, 2015 at 04:04:46PM +0530, Archit Taneja wrote:
> Enable the NAND controller node on the AP148 platform. Provide pinmux
> information.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja
> ---
One nit though. The subject mispells Enable.
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On Tue, Jul 21, 2015 at 04:04:44PM +0530, Archit Taneja wrote:
> Add DT bindings document for the Qualcomm NAND controller driver.
>
> Cc: devicetree@vger.kernel.org
>
> Signed-off-by: Archit Taneja
> ---
Acked-by: Andy Gross
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On Fri, Jun 26, 2015 at 02:50:17PM -0700, bj...@kryo.se wrote:
> From: Bjorn Andersson
>
> Signed-off-by: Bjorn Andersson
> ---
Applied, thanks.
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On Fri, Jun 26, 2015 at 02:50:09PM -0700, bj...@kryo.se wrote:
> From: Bjorn Andersson
>
> Add device tree binding documentation for the Qualcom Shared Memory
> Manager.
>
> Signed-off-by: Bjorn Andersson
> + smem@fa0 {
> + compatible = "qcom,smem";
> +
> + me
On Fri, Jun 26, 2015 at 02:50:16PM -0700, bj...@kryo.se wrote:
> From: Bjorn Andersson
>
> Signed-off-by: Bjorn Andersson
> ---
> arch/arm/boot/dts/qcom-msm8974.dtsi | 12
> 1 file changed, 12 insertions(+)
>
Applied, thanks!
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This patch creates a platform driver for the SCM so that we can adequately
manage resources. This removes clients having to carry the necessary
clocks to use the SCM resources.
Signed-off-by: Andy Gross
---
.../devicetree/bindings/firmware/qcom,scm.txt | 25
drivers/firmware
On Wed, Jul 08, 2015 at 04:56:34PM -0700, Stephen Boyd wrote:
> On 06/26/2015 02:50 PM, bj...@kryo.se wrote:
> > += EXAMPLE
> > +The following example shows the SMEM setup for MSM8974, with a main SMEM
> > region
> > +at 0xfa0 and an auxiliary region at 0xfc428000:
> > +
> > + reserved-memor
On Thu, Apr 23, 2015 at 02:01:28PM -0600, Jeffrey Hugo wrote:
> On 4/11/2015 5:32 PM, Bjorn Andersson wrote:
> >Add device tree binding documentation for the Qualcom Shared Memory
> >manager.
> >
> >Signed-off-by: Bjorn Andersson
> >---
> >
> >Changes since v1:
> >- None
> >
> > .../devicetree/bi
On Tue, Apr 07, 2015 at 12:01:03AM +0530, Sricharan R wrote:
> +static u32 qup_i2c_send_data(struct qup_i2c_dev *qup, int tlen, u8 *tbuf,
> + int dlen, u8 *dbuf)
> +{
> + u32 val = 0, idx = 0, pos = 0, i = 0, t;
> + int len = tlen + dlen;
> + u8 *buf = tbuf;
On Fri, Mar 20, 2015 at 01:49:12PM -0700, Bjorn Andersson wrote:
> On Fri 20 Mar 13:29 PDT 2015, Andy Gross wrote:
>
> > On Thu, Mar 19, 2015 at 06:48:10PM -0700, Bjorn Andersson wrote:
> >
> >
> >
> > > +Example:
> > > +
> > > + tc
On Thu, Mar 19, 2015 at 06:48:10PM -0700, Bjorn Andersson wrote:
> +Example:
> +
> + tcsr: syscon@1a40 {
typo here, syscon@fd484000. And this syscon is specifically for the tcsr mutex
reg area.
> + compatible = "qcom,tcsr-msm8974", "syscon";
> + reg = <0xfd4840
On Tue, Mar 17, 2015 at 04:33:40PM -0600, Lina Iyer wrote:
>
> Tested on: 8074, 8084.
>
These worked fine for me on IPQ8064 (ap148), however I did have to add my own DT
entries for the idle states and saw changes.
Also tested on APQ8064 (ifc6410).
Tested-by: Andy Gross
--
This patch adds support for the ADM DMA on the MSM8960 SOC
Signed-off-by: Andy Gross
---
arch/arm/boot/dts/qcom-msm8960.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi
b/arch/arm/boot/dts/qcom-msm8960.dtsi
index e1b0d5c
This patch adds support for the ADM DMA on the APQ8064 SOC.
Signed-off-by: Andy Gross
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b3154c0
This patch adds support for the ADM DMA on the MSM8660 SOC
Signed-off-by: Andy Gross
---
arch/arm/boot/dts/qcom-msm8660.dtsi | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi
b/arch/arm/boot/dts/qcom-msm8660.dtsi
This patch adds support for the ADM DMA on the IPQ8064 SOC
Signed-off-by: Andy Gross
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts |4
arch/arm/boot/dts/qcom-ipq8064.dtsi | 23 +++
2 files changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq8064
This patch set adds support for the Qualcomm ADM DMA controller that is present
in the APQ8064, IPQ8064, MSM8660, and MSM8960.
Andy Gross (4):
ARM: DT: ipq8064: Add ADM device node
ARM: DT: apq8064: Add ADM device node
ARM: DT: msm8660: Add ADM device nodes
ARM: DT: msm8960: Add ADM
via other means.
Signed-off-by: Andy Gross
---
Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt
b/Documentation/devicetree/bindings/dma/qcom_adm.txt
index
transactions to/from peripheral devices.
The initial release of this driver supports slave transfers to/from peripherals
and also incorporates CRCI (client rate control interface) flow control.
Signed-off-by: Andy Gross
---
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile |1 +
drivers
transactions.
Selection of single or box descriptors depends on the sg length and burst
size.
- Removed use of crci in the dmas property. CRCI is now designated via the
slave_config structure and will be stored in slave_id.
Andy Gross (2):
dt/bindings: qcom_adm: Fix channel specifiers
On Mon, Mar 16, 2015 at 08:15:26AM -, sricha...@codeaurora.org wrote:
> Hi,
>
>
> >
> >>
> >> > +static int adm_get_blksize(unsigned int burst)
> >> > +{
> >> > +int ret;
> >> > +
> >> > +switch (burst) {
> >> > +case 16:
> >> > +ret = 0;
> >> > +
via other means.
Signed-off-by: Andy Gross
---
Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt
b/Documentation/devicetree/bindings/dma/qcom_adm.txt
index
and burst
size.
- Removed use of crci in the dmas property. CRCI is now designated via the
slave_config structure and will be stored in slave_id.
Andy Gross (2):
dt/bindings: qcom_adm: Fix channel specifiers
dmaengine: Add ADM driver
Documentation/devicetree/bindings/dma
transactions to/from peripheral devices.
The initial release of this driver supports slave transfers to/from peripherals
and also incorporates CRCI (client rate control interface) flow control.
Signed-off-by: Andy Gross
---
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile |1 +
drivers
On Fri, Mar 13, 2015 at 02:27:45PM +0530, Vinod Koul wrote:
> On Wed, Feb 11, 2015 at 11:46:05PM -0600, Andy Gross wrote:
> > +++ b/drivers/dma/qcom_adm.c
> > @@ -0,0 +1,901 @@
> > +/*
> > + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
> shoul
On Fri, Mar 13, 2015 at 11:19:52PM +0530, Sricharan R wrote:
> Signed-off-by: Sricharan R
> ---
Reviewed-by: Andy Gross
> arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
> b/arch/arm/
On Mon, Mar 09, 2015 at 03:40:06PM -0600, Lina Iyer wrote:
> >>for_each_possible_cpu(cpu) {
> >>+
> >>ret = arm_cpuidle_init(cpu);
> >>+ /*
> >>+* This cpu does not support any idle states
> >>+*/
> >>+ if (ret == -ENOSYS)
> >>+
On Mon, Mar 09, 2015 at 09:16:36AM -0600, Lina Iyer wrote:
> From: Daniel Lezcano
>
> Some architectures have some cpus which does not support idle states.
>
> Let the underlying low level code to return -ENOSYS when it is not
> possible to set an idle state.
>
> Signed-off-by: Daniel Lezcano
On Fri, Feb 27, 2015 at 02:30:16PM -0800, Bjorn Andersson wrote:
> Add binding documentation for the Qualcomm Hardware Mutex.
>
> Signed-off-by: Bjorn Andersson
> ---
Looks fine.
Reviewed-by: Andy Gross
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is
On Tue, Feb 24, 2015 at 06:08:54PM +0200, Stanimir Varbanov wrote:
>
> yes, there is a potential race between atomic_inc and dma callback. I
> reordered these calls to save few checks, and now it returns to me.
>
> I imagine few options here:
>
> - reorder the dmaengine calls and atomic oper
here is that most (all but one) of the other mfd regulator
devices use regulators {}. Still wonder if that's what we should do.
Otherwise,
Reviewed-by: Andy Gross
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundatio
via other means.
Signed-off-by: Andy Gross
---
Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt
b/Documentation/devicetree/bindings/dma/qcom_adm.txt
index
slave_config structure and will be stored in slave_id.
Andy Gross (2):
dt/bindings: qcom_adm: Fix channel specifiers
dmaengine: Add ADM driver
Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 +-
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile
transactions to/from peripheral devices.
The initial release of this driver supports slave transfers to/from peripherals
and also incorporates CRCI (client rate control interface) flow control.
Signed-off-by: Andy Gross
---
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile |1 +
drivers
On Wed, Feb 11, 2015 at 05:28:14PM -0800, Stephen Boyd wrote:
> On 02/11, Andy Gross wrote:
> > +static struct platform_driver adm_dma_driver = {
> > + .probe = adm_dma_probe,
> > + .remove = adm_dma_remove,
> > + .driver = {
> > + .name = "a
via other means.
Signed-off-by: Andy Gross
---
Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt
b/Documentation/devicetree/bindings/dma/qcom_adm.txt
index
transactions to/from peripheral devices.
The initial release of this driver supports slave transfers to/from peripherals
and also incorporates CRCI (client rate control interface) flow control.
Signed-off-by: Andy Gross
---
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile |1 +
drivers
stored in slave_id.
Andy Gross (2):
dt/bindings: qcom_adm: Fix channel specifiers
dmaengine: Add ADM driver
Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 +-
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile |1
On Tue, Feb 03, 2015 at 02:17:57PM +0200, Ivan T. Ivanov wrote:
> Following set of patches add initial DT support for PMIC devices
> found on recent Quqalcomm chipsets. Details for SPMI bus and PMIC arbiter
> could be found here [1].
>
Looks fine.
Reviewed-by: Andy Gross
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