Re: [PATCH 2/2] irqchip: add TS-4800 interrupt controller

On Fri, 18 Dec 2015 14:39:19 -0500 Damien Riegel wrote: > This commit adds support for the TS-4800 interrupt controller. This > controller is instantiated in a companion FPGA, and multiplex interrupts > for other FPGA IPs. > > As this component is external to

Re: [PATCH] ARM64: ZynqMP: DT: Fix GIC's 'reg' property

On 16/12/15 09:01, Sören Brinkmann wrote: > On Tue, 2015-12-15 at 04:01PM +0100, Michal Simek wrote: >> Hi, >> >> On 15.12.2015 10:14, Sören Brinkmann wrote: >>> On Mon, 2015-12-14 at 05:01PM +, Marc Zyngier wrote: >>>> Mark, >>>> >>

Re: [PATCH v2 2/4] arm64: dts: Foundation model: increase GICC region to allow EOImode=1

ra <andre.przyw...@arm.com> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info

Re: [PATCH] ARM64: ZynqMP: DT: Fix GIC's 'reg' property

Mark, On 14/12/15 16:46, Mark Rutland wrote: > On Mon, Dec 14, 2015 at 08:31:40AM -0800, Soren Brinkmann wrote: >> Signed-off-by: Soren Brinkmann >> --- >> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >>

Re: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 10/12/15 20:18, Bjorn Helgaas wrote: > [+cc Marc for irq_dispose_mapping() question] + } + } while (status); + + return retval; + for (i = 0; i < 4; i++) { + irq = irq_find_mapping(pcie->legacy_irq_domain, i + 1); + if (irq

Re: [PATCH 3/4] arm64: dts: split Foundation model dts to put the GIC separately

that include statement and the GIC node in > the current foundation-v8.dts. > > Signed-off-by: Andre Przywara <andre.przyw...@arm.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send

Re: [PATCH 4/4] arm64: dts: add .dts for GICv3 Foundation model

On 13/10/15 10:37, Andre Przywara wrote: > The ARMv8 Foundation model sports a command line parameter to use > a GICv3 emulation instead of the default GICv2 interrupt controller. > Add a new .dts file which reuses most of the definitions of the > existing model while just adding the required

Re: [PATCH 1/4] arm64: dts: prepare foundation-v8.dts to cope with GICv3

..@arm.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1

Hey Andre, On 13/10/15 10:37, Andre Przywara wrote: > Recent commits made the GIC driver use EOImode=1 for all GICs > that advertise the proper GICC region size. > To let the model benefit from the blessings of that mode, increase > the GICC region to its actual size of 8K. > > Signed-off-by:

Re: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

org> I don't have much to add to this, so FWIW: Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.o

Re: [PATCH 02/11] MIPS: bmips: Add bcm6345-l2-timer interrupt controller

e | 1 + > drivers/irqchip/irq-bcm6345-l2-timer.c | 386 > + > 3 files changed, 392 insertions(+) > create mode 100644 drivers/irqchip/irq-bcm6345-l2-timer.c I'm not sure how useful it is to have a bunch of timers that are just turned

Re: [PATCH v3 4/6] pinctrl: meson: Enable GPIO IRQs

On 01/12/15 19:41, Carlo Caione wrote: > On Tue, Dec 1, 2015 at 8:16 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: >> On 01/12/15 16:24, Carlo Caione wrote: >>> From: Carlo Caione <ca...@endlessm.com> > >>> +static int meson_irq_domain_alloc(struct

Re: [PATCH v3 4/6] pinctrl: meson: Enable GPIO IRQs

On 01/12/15 16:24, Carlo Caione wrote: > From: Carlo Caione > > On Meson8 and Meson8b SoCs there are 8 independent filtered GPIO > interrupt modules that can be programmed to use any of the GPIOs in the > chip as an interrupt source. > > For each GPIO IRQ we have: > > GPIOs

Re: [PATCH v10] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 27/11/15 15:02, Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > Acked-by: Rob Herring > --- > Changes for v10: >

Re: [linux-meson] Re: [PATCH v2 3/5] pinctrl: meson: enable GPIO IRQs

On Tue, 24 Nov 2015 10:04:50 +0100 Carlo Caione <ca...@caione.org> wrote: > On Tue, Nov 24, 2015 at 9:28 AM, Marc Zyngier <marc.zyng...@arm.com> wrote: > > On Mon, 23 Nov 2015 11:16:54 +0100 > > Carlo Caione <ca...@caione.org> wrote: > > >

Re: [PATCH v2 2/5] irqdomain: introduce irq_of_phandle_args_to_fwspec

On Mon, 23 Nov 2015 11:16:53 +0100 Carlo Caione wrote: > From: Carlo Caione > > Export of_phandle_args_to_fwspec with a new compliant name. > > Signed-off-by: Carlo Caione > --- > include/linux/of_irq.h | 2 ++ >

Re: [PATCH v9] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On Wed, 25 Nov 2015 14:23:29 +0530 Amit Tomer wrote: > Sorry to intervene but just trying to learn from your comments. > > > You have plenty, and that's the whole of your device space. *All of it*. So > > just take the base address of your PCIe controller, and be done

Re: [PATCH v9] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On Wed, 25 Nov 2015 05:40:49 + Bharat Kumar Gogada wrote: > > On Thu, 19 Nov 2015 11:05:23 +0530 > > Bharat Kumar Gogada wrote: > > > > > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > > > > > Signed-off-by:

Re: [PATCH v9] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On Thu, 19 Nov 2015 11:05:23 +0530 Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > Acked-by: Rob

Re: [PATCH v2 3/5] pinctrl: meson: enable GPIO IRQs

On Mon, 23 Nov 2015 11:16:54 +0100 Carlo Caione wrote: > From: Carlo Caione > > On Meson8 and Meson8b SoCs there are 8 independent filtered GPIO > interrupt modules that can be programmed to use any of the GPIOs in the > chip as an interrupt source. > >

Re: [PATCH 08/10] irqchip: add LPC32xx interrupt controller driver

On 20/11/15 01:28, Vladimir Zapolskiy wrote: > The change adds improved support of NXP LPC32xx MIC, SIC1 and SIC2 > interrupt controllers. > > This is a list of new features in comparison to the legacy driver: > * irq types are taken from device tree settings, no more need to > hardcode them, >

Re: [PATCH 2/2] irqchip: add support for Sigma Designs SMP86xx interrupt controller

On 19/11/15 18:33, Mans Rullgard wrote: > This adds support for the secondary interrupt controller used in Sigma > Designs SMP86xx and SMP87xx chips. > > Signed-off-by: Mans Rullgard > --- > drivers/irqchip/Kconfig | 5 + > drivers/irqchip/Makefile | 1 + >

Re: [PATCH 03/10] dt-bindings: interrupt-controllers: add description of SIC1 and SIC2

On 20/11/15 17:52, Vladimir Zapolskiy wrote: > Hi Rob, > > On 20.11.2015 18:58, Rob Herring wrote: >> On Fri, Nov 20, 2015 at 03:28:38AM +0200, Vladimir Zapolskiy wrote: >>> NXP LPC32xx has three interrupt controllers, namely root Main >>> Interrupt Controller (MIC) and two supplementary Sub

Re: [PATCH v8] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 17/11/15 13:27, Bharat Kumar Gogada wrote: >> >> On Tue, 17 Nov 2015 04:59:39 + >> Bharat Kumar Gogada <bharat.kumar.gog...@xilinx.com> wrote: >> >>>> On 11/16/2015 7:14 AM, Marc Zyngier wrote: >>>>> On 11/11/15 06:33, Bhara

Re: [PATCH v8] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On Tue, 17 Nov 2015 04:59:39 + Bharat Kumar Gogada <bharat.kumar.gog...@xilinx.com> wrote: > > On 11/16/2015 7:14 AM, Marc Zyngier wrote: > > > On 11/11/15 06:33, Bharat Kumar Gogada wrote: > > >> Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. &g

Re: [PATCH v8] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 11/11/15 06:33, Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > --- > Added logic to allocate contiguous hwirq in

Re: [PATCH v8] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On Wed, 11 Nov 2015 12:03:39 +0530 Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > --- > Added logic

Re: [PATCH v7] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 04/11/15 12:30, Bharat Kumar Gogada wrote: >> Also, you still lack support for MSI-X (which would come for free...). >>> >>> We don't support MSI-X in root port mode. >> >> I don't believe you. If you support single MSI, you support MSI-X (because >> that's mostly a property of the

Re: [PATCH v7] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 04/11/15 06:38, Bharat Kumar Gogada wrote: >>> +static struct msi_domain_info nwl_msi_domain_info = { >>> + .flags = (MSI_FLAG_USE_DEF_DOM_OPS | >> MSI_FLAG_USE_DEF_CHIP_OPS | >>> + MSI_FLAG_MULTI_PCI_MSI), >> >> If you're supporting multi-MSI, how do you ensure that all hwirqs

Re: [PATCH v7] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 04/11/15 07:54, Bharat Kumar Gogada wrote: >>> Without #ifdefs if we compile driver for legacy, MSI structures will not be >> available and we get compile time error. >> >> Sorry for nitpicking but at least can we use elegant version of #ifdefs >> .i.e. #if >> IS_ENABLED() here ? >> > Since

Re: [PATCH v7] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 03/11/15 15:23, Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > --- > Removed msi_controller and added irq_domian for MSI domain

Re: [PATCH v2 1/3] gpio: xgene: add support to configure GPIO line as input, output or external IRQ pin

On Fri, 30 Oct 2015 12:41:03 +0700 Quan Nguyen wrote: > Forgive me for not turn on plain text mode my last email. > > Hi Linus, > > My name is Quan Nguyen, I'm working with Y Vo on this patch. > > Allow me to explain as below: > > In current implementation, gic irq resources

Re: [PATCH v6] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On Fri, 30 Oct 2015 17:47:08 +0530 Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > --- > Changes for

Re: [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1

Hi Andre, s/increate/increase size of/ in the subject line On 13/10/15 10:37, Andre Przywara wrote: > Recent commits made the GIC driver use EOImode=1 for all GICs > that advertise the proper GICC region size. Well, it is not so much that the kernel uses EOImode=1, but the fact that the model

Re: [PATCH 4/4] arm64: dts: add .dts for GICv3 Foundation model

On 13/10/15 10:37, Andre Przywara wrote: > The ARMv8 Foundation model sports a command line parameter to use > a GICv3 emulation instead of the default GICv2 interrupt controller. > Add a new .dts file which reuses most of the definitions of the > existing model while just adding the required

Re: [PATCH v3] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 09/10/15 09:51, Bharat Kumar Gogada wrote: >> On 09/10/15 06:11, Bharat Kumar Gogada wrote: >> +struct nwl_msi { /* struct nwl_msi - MSI information */ >> + struct msi_controller chip; /* chip: MSI controller */ > >> We're moving away from

Re: [PATCH v3] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 09/10/15 06:11, Bharat Kumar Gogada wrote: +struct nwl_msi { /* struct nwl_msi - MSI information >> */ + struct msi_controller chip; /* chip: MSI controller */ >>> We're moving away from msi_controller altogether, as the kernel now has all the necessary

Re: [PATCH v3] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 09/10/15 14:47, Bharat Kumar Gogada wrote: >> Hi Bharat, Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. >>> >>> +/* SSPL ERROR */ +#define SLVERR 0x02 >>> +#define DECERR >>> 0x03 + +struct nwl_msi {/* struct nwl_msi -

Re: [PATCH v3] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

Hi Bharat, On 06/10/15 16:44, Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > --- > Added interrupt-map, interrupt-map-mask

Re: [PATCH v3] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

On 06/10/15 17:27, Bharat Kumar Gogada wrote: > Subject: Re: [PATCH v3] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL > PCIe Host Controller [...] Please use an email client that does proper quoting - I cannot see what you are replying to. Or at least annotate your answers so that I can

Re: [PATCH v7 5/6] Documentation: dt-bindings: pci: altera pcie device tree binding

On Fri, 2 Oct 2015 23:56:37 +0200 Arnd Bergmann wrote: > On Friday 02 October 2015 15:53:44 Ley Foon Tan wrote: > > > Strictly speaking, if you have undocumented bindings downstream that > > > is your problem and we don't have to accept them as-is upstream. I'm > > > not going to

Re: [PATCH v4 4/4] irqchip/gic-v3-its: Add handling of PCI requester id.

ce *dev, > pci_for_each_dma_alias(pdev, its_get_pci_alias, _alias); > > /* ITS specific DeviceID, as the core ITS ignores dev. */ > - info->scratchpad[0].ul = dev_alias.dev_id; > + info->scratchpad[0].ul = pci_msi_domain_get_msi_rid(domain, pdev); > >

Re: [PATCH v4 3/4] PCI/MSI: Add helper function pci_msi_domain_get_msi_rid().

-msi.c > > Initially supports mapping the RID via OF device tree. In the future, > this could be extended to use ACPI _IORT tables as well. > > Signed-off-by: David Daney <david.da...@cavium.com> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com>

Re: [PATCH v3 3/4] PCI/MSI: Add helper function pci_msi_domain_get_msi_rid().

On 01/10/15 17:13, David Daney wrote: > On 10/01/2015 02:24 AM, Marc Zyngier wrote: >> Hi David, >> >> On 30/09/15 23:47, David Daney wrote: >>> From: David Daney <david.da...@cavium.com> >>> >>> Add pci_msi_domain_get_msi_rid() to return the

Re: [PATCH v3 3/4] PCI/MSI: Add helper function pci_msi_domain_get_msi_rid().

Hi David, On 30/09/15 23:47, David Daney wrote: > From: David Daney > > Add pci_msi_domain_get_msi_rid() to return the MSI requester id (RID). > Initially needed by gic-v3 based systems. It will be used by follow on > patch to drivers/irqchip/irq-gic-v3-its-pci-msi.c >

Re: [PATCH v4 1/9] drivers/of: Introduce of_node_alloc

On Mon, 28 Sep 2015 15:50:38 -0700 Frank Rowand <frowand.l...@gmail.com> wrote: > On 9/28/2015 9:42 AM, Marc Zyngier wrote: > > We want to be able to generate "fake" device nodes that can be > > used as an identifier for irq domains. For that, we reuse th

Re: [PATCH v4 0/9] Making the generic ACPI GSI layer irqdomain aware

On 29/09/15 18:11, Rob Herring wrote: > On Mon, Sep 28, 2015 at 11:42 AM, Marc Zyngier <marc.zyng...@arm.com> wrote: >> The irqdomain code is not entierely ACPI friendly, as it has some >> built-in knowledge of the device-tree. Nothing too harmful, but enough >> to sca

[PATCH v4 4/9] acpi/gsi: Always perform an irq domain lookup

behaviour. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/acpi/gsi.c | 23 ++- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/acpi/gsi.c b/drivers/acpi/gsi.c index 38208f2..6232d55 100644 --- a/drivers/acpi/gsi.c +++ b/drivers/acpi

[PATCH v4 6/9] acpi/gsi: Select OF_DYNAMIC when ACPI_GENERIC_GSI is selected

As we're now dynamically creating device nodes to identify irqdomains, it is necessary to enable CONFIG_OF_DYNAMIC, enabling the use of of_node_alloc(). Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/acpi/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/driver

[PATCH v4 8/9] irqchip/GIC: Switch ACPI support to stacked domains

Now that the basic ACPI GSI code is irq domain aware, make sure that the ACPI support in the GIC doesn't pointlessly deviate from the DT path. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/irqchip/irq-gic.c | 58 --- 1 file chang

[PATCH v4 2/9] genirq/irqdomain: Add irq_create_acpi_mapping

the acpi_gsi_descriptor is populated matches that of of_phandle_args, as the latter is still the building block for interrupt descriptor in the whole kernel. Eventually, these two representations should be merged in a single structure, but that's probably for another day. Signed-off-by: Marc

[PATCH v4 3/9] genirq/irqdomain: Add a fwnode_handle allocator

) further migration of irqdomain from device_node to fwnode_handle. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- include/linux/irqdomain.h | 2 ++ kernel/irq/irqdomain.c| 30 ++ 2 files changed, 32 insertions(+) diff --git a/include/linux/irqdoma

[PATCH v4 1/9] drivers/of: Introduce of_node_alloc

We want to be able to generate "fake" device nodes that can be used as an identifier for irq domains. For that, we reuse the dynamic DT layer in order to generate DT nodes in a detached state (so that it doesn't interfere with the rest of the tree). Signed-off-by: Marc Zyngier

[PATCH v4 7/9] irqchip/GIC: Get rid of gic_init_bases()

Since nobody is using gic_init_bases anymore outside of the GIC driver itself, let's do a bit of housekeeping and remove the now useless entry point. Only gic_init() is now exposed to the rest of the kernel for the benefit of non DT/ACPI system. Signed-off-by: Marc Zyngier <marc.zyng...@arm.

[PATCH v4 9/9] acpi/gsi: Cleanup acpi_register_gsi

to cleanup acpi_register_gsi. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/acpi/gsi.c | 24 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/acpi/gsi.c b/drivers/acpi/gsi.c index 7905840..29e994d 100644 --- a/drivers/acpi

[PATCH v4 5/9] acpi/gsi: Add acpi_set_irq_model to initialize the GSI layer

trigger information As nobody calls this code yet, the current code is left in place. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/acpi/gsi.c | 32 include/linux/acpi.h | 5 + 2 files changed, 37 insertions(+) diff --git a/drivers/acpi/g

[PATCH v4 0/9] Making the generic ACPI GSI layer irqdomain aware

keeps the knowledge of the mapping with of_phandle_args in a single location - Generic accessor to set acpi_irq_model, domain_token and the populate function all in one go from the interrupt controller - General cleanup Marc Zyngier (9): drivers/of: Introduce of_node_alloc g

Re: [PATCH v7 3/6] pci:host: Add Altera PCIe host controller driver

On Wed, 23 Sep 2015 17:33:09 +0800 Ley Foon Tan <lf...@altera.com> wrote: > On Wed, Sep 23, 2015 at 2:33 AM, Marc Zyngier <marc.zyng...@arm.com> wrote: > > On Mon, 21 Sep 2015 10:13:04 +0800 > > Ley Foon Tan <lf...@altera.com> wrote: > > > >> This p

Re: [PATCH v2 1/3] Docs: dt: Add PCI MSI map bindings

ed by their > Requester ID) to sideband data for each MSI controller that they may > target. > > Signed-off-by: Mark Rutland <mark.rutl...@arm.com> > Signed-off-by: David Daney <david.da...@cavium.com> I thought I had done it already, but nevertheless: Acked-by: Marc Z

Re: [PATCH v2 2/3] of/irq: Add new function of_msi_map_rid()

n void of_msi_configure(struct device *dev, struct device_node *np); > +u32 of_msi_map_rid(struct device *dev, struct device_node *msi_np, u32 > rid_in); > > #else /* !CONFIG_OF */ > static inline unsigned int irq_of_parse_and_map(struct device_node *dev, > @@ -87,6 +88,12 @@

Re: [PATCH v2 3/3] irqchip/gicv3-its: Handle OF device tree "msi-map" properties.

On Tue, 22 Sep 2015 17:00:06 -0700 David Daney wrote: > From: David Daney > > Call of_msi_map_rid() to handle mapping of the requester id. > > Signed-off-by: David Daney > --- > drivers/irqchip/irq-gic-v3-its-pci-msi.c |

Re: [PATCH v2 3/3] irqchip/gicv3-its: Handle OF device tree "msi-map" properties.

On Wed, 23 Sep 2015 18:52:59 +0100 Will Deacon <will.dea...@arm.com> wrote: > On Wed, Sep 23, 2015 at 06:08:39PM +0100, David Daney wrote: > > On 09/23/2015 10:01 AM, Marc Zyngier wrote: > > > On Tue, 22 Sep 2015 17:00:06 -0700 > > > David Daney <ddaney.c...

Re: [PATCH v7 1/6] arm: add msi.h to Kbuild

t; Signed-off-by: Ley Foon Tan <lf...@altera.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> M. -- Jazz is not dead. It just smells funny. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.k

Re: [PATCH v7 3/6] pci:host: Add Altera PCIe host controller driver

On Mon, 21 Sep 2015 10:13:04 +0800 Ley Foon Tan wrote: > This patch adds the Altera PCIe host controller driver. > > Signed-off-by: Ley Foon Tan > --- > drivers/pci/host/Kconfig | 8 + > drivers/pci/host/Makefile | 1 + >

Re: [PATCH 2/2] irqchip/gicv3-its: Handle OF device tree "msi-map" properties.

On Fri, 18 Sep 2015 10:54:02 -0700 David Daney <dda...@caviumnetworks.com> wrote: > On 09/18/2015 01:51 AM, Marc Zyngier wrote: > > On Thu, 17 Sep 2015 11:00:59 -0700 > > David Daney <ddaney.c...@gmail.com> wrote: > > > > Hi David, > > &

Re: [PATCH 2/2] irqchip/gicv3-its: Handle OF device tree "msi-map" properties.

On Mon, 21 Sep 2015 09:35:51 -0700 David Daney <dda...@caviumnetworks.com> wrote: > On 09/21/2015 08:58 AM, Marc Zyngier wrote: > > On Fri, 18 Sep 2015 10:54:02 -0700 > > David Daney <dda...@caviumnetworks.com> wrote: > > > >> On 09/18/2015 01:51 AM, Mar

Re: [PATCH 2/2] irqchip/gicv3-its: Handle OF device tree "msi-map" properties.

On Thu, 17 Sep 2015 11:00:59 -0700 David Daney wrote: Hi David, > From: David Daney > > Search up the device hierarchy to find devices with a "msi-map" > property, if found apply the mapping to the GIC device id. > > Signed-off-by: David Daney

Re: [PATCH v4 0/4] PCI: arm64/powerpc: Fix parsing of linux,pci-probe-only

On 17/09/15 16:30, Bjorn Helgaas wrote: > On Fri, Sep 04, 2015 at 05:50:07PM +0100, Marc Zyngier wrote: >> The pci-host-generic driver parses the linux,pci-probe-only property, >> and assumes that it will have a boolean parameter. >> >> Turns out that the Seattle DTS

Re: [PATCH 2/2] Documentation: gpio: Update description for X-Gene standby GPIO controller DTS binding

On 14/09/15 16:06, Y Vo wrote: > On Mon, Sep 14, 2015 at 9:47 PM, Arnd Bergmann wrote: >> On Monday 14 September 2015 16:39:43 Y Vo wrote: >>> On Mon, Sep 14, 2015 at 4:11 PM, Arnd Bergmann wrote: On Saturday 12 September 2015 12:55:55 Y Vo wrote: > On Fri,

Re: [PATCH v7 8/8] clocksource: simplify ACPI code in arm_arch_timer.c

On 27/08/15 14:51, Fu Wei wrote: > Hi Thomas, Hanjun > > On 27 August 2015 at 21:40, Thomas Gleixner wrote: >> On Thu, 27 Aug 2015, Hanjun Guo wrote: [1]: https://lkml.org/lkml/2015/7/29/236 If that is ok with you, we will introduce similar DECLARE_ thing

Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board

On Sat, 5 Sep 2015 10:58:59 +0800 Ding Tianhong wrote: > Add initial dtsi file to support Hisilicon Hip05-D02 Board with > support of CPUs in four clusters and each cluster has quard Cortex-A57. > > Also add dts file to support Hip05-D02 development board. > >

Re: [PATCH 0/2] arm64: Support Hisilicon Hip05-D02 board

On Sat, 5 Sep 2015 10:58:57 +0800 Ding Tianhong wrote: > Hip05-D02 Development Board is based on Cortex-A57, this patchset > contains initial support for Hip05-D02 Soc and Board. Initial support > is minimal and includes just the arch configuration, device tree >

[PATCH v4 0/4] PCI: arm64/powerpc: Fix parsing of linux,pci-probe-only

afely read the property (Rob) - Add a log message to indicate when we enable probe-only (probably quite useful for debugging) * From v1: - Consolidate the parsing in of_pci.c (Bjorn) Marc Zyngier (4): of/pci: Add of_pci_check_probe_only to parse "linux,pci-probe-only" PCI: p

[PATCH v4 1/4] of/pci: Add of_pci_check_probe_only to parse "linux,pci-probe-only"

Both pci-host-generic and Pseries parse the "linux,pci-probe-only" property to engage the PCI_PROBE_ONLY mode, and both have a subtle bug that can be triggered if the property has no parameter. Provide a generic, safe implementation that can be used by both. Signed-off-by: Ma

[PATCH v4 3/4] powerpc: PCI: Fix lookup of linux,pci-probe-only property

if the firmware couldn't make up its mind. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- arch/powerpc/platforms/pseries/setup.c | 14 ++ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c

[PATCH v4 2/4] PCI: pci-host-generic: Fix lookup of linux,pci-probe-only property

on whatever the property pointer points to, which is likely to be junk. Switch to the common of_pci.c implementation that doesn't suffer from this problem. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/pci/host/pci-host-generic.c | 9 + 1 file changed, 1 insertion

[PATCH v4 4/4] arm64: dts: Drop linux,pci-probe-only from the Seattle DTS

er. Acked-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- arch/arm64/boot/dts/amd/amd-overdrive.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/amd/amd-overdrive.dts b/arch/arm64/boot/dts/amd/a

Re: [PATCH v2 1/4] of/pci: Add of_pci_check_probe_only to parse "linux,pci-probe-only"

On 02/09/15 23:23, Bjorn Helgaas wrote: > On Fri, Aug 14, 2015 at 04:08:10PM -0500, Rob Herring wrote: >> On Fri, Aug 14, 2015 at 11:19 AM, Marc Zyngier <marc.zyng...@arm.com> wrote: >>> Both pci-host-generic and Pseries parse the "linux,pci-probe-only" >

[PATCH v3 2/4] PCI: pci-host-generic: Fix lookup of linux,pci-probe-only property

on whatever the property pointer points to, which is likely to be junk. Switch to the common of_pci.c implementation that doesn't suffer from this problem. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/pci/host/pci-host-generic.c | 9 + 1 file changed, 1 insertion

[PATCH v3 3/4] powerpc: PCI: Fix lookup of linux,pci-probe-only property

if the firmware couldn't make up its mind. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- arch/powerpc/platforms/pseries/setup.c | 14 ++ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c

[PATCH v3 4/4] arm64: dts: Drop linux,pci-probe-only from the Seattle DTS

r. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- arch/arm64/boot/dts/amd/amd-overdrive.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/amd/amd-overdrive.dts b/arch/arm64/boot/dts/amd/amd-overdrive.dts index 564a3f7..128fa94 100644 --- a/arch/arm64/

[PATCH v3 0/4] PCI: arm64/powerpc: Fix parsing of linux,pci-probe-only

he parsing in of_pci.c (Bjorn) Marc Zyngier (4): of/pci: Add of_pci_check_probe_only to parse "linux,pci-probe-only" PCI: pci-host-generic: Fix lookup of linux,pci-probe-only property powerpc: PCI: Fix lookup of linux,pci-probe-only property arm64: dts: Drop linux,pci-probe-only

[PATCH v3 1/4] of/pci: Add of_pci_check_probe_only to parse "linux,pci-probe-only"

Both pci-host-generic and Pseries parse the "linux,pci-probe-only" property to engage the PCI_PROBE_ONLY mode, and both have a subtle bug that can be triggered if the property has no parameter. Provide a generic, safe implementation that can be used by both. Signed-off-by: Ma

Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board

[Don't top-post, this is very annoying] On 02/09/15 05:28, Ding Tianhong wrote: > Hi，Marc： > > Can you check this, I am not sure whether the GIC_CPU_MASK_SIMPLE(xx) > is used for gic-v3, maybe we should remove it, thanks. The binding documentation

Re: [PATCH v6 0/6] Altera PCIe host controller driver with MSI support

On 01/09/15 11:30, Ley Foon Tan wrote: > This is the 6th version of patch set to add support for Altera PCIe host > controller with MSI feature on Altera FPGA device families. This patchset > mainly resolve comments from Marc Zyngier in v5 and minor fixes. The merge window has jus

Re: [PATCH v5 3/5] pci: altera: Add Altera PCIe MSI driver

(Ley Foon Tan lf...@altera.com); +MODULE_DESCRIPTION(Altera PCIe MSI support); +MODULE_LICENSE(GPL v2); Once you've fixed the above issues, you can add my: Reviewed-by: Marc Zyngier marc.zyng...@arm.com M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list

Re: [PATCH v5 2/5] pci:host: Add Altera PCIe host controller driver

On 25/08/15 10:35, Ley Foon Tan wrote: This patch adds the Altera PCIe host controller driver. Signed-off-by: Ley Foon Tan lf...@altera.com --- drivers/pci/host/Kconfig | 7 + drivers/pci/host/Makefile | 1 + drivers/pci/host/pcie-altera.c | 588

[PATCH v2 2/4] PCI: pci-host-generic: Fix lookup of linux,pci-probe-only property

on whatever the property pointer points to, which is likely to be junk. Switch to the common of_pci.c implementation that doesn't suffer from this problem. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- drivers/pci/host/pci-host-generic.c | 9 + 1 file changed, 1 insertion(+), 8

[PATCH v2 3/4] powerpc: PCI: Fix lookup of linux,pci-probe-only property

if the firmware couldn't make up its mind. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/powerpc/platforms/pseries/setup.c | 14 ++ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index

[PATCH v2 0/4] PCI: arm64/powerpc: Fix parsing of linux,pci-probe-only

the probe-only thing). This has been tested on the offending Seattle board. * From v1: - Consolidate the parsing in of_pci.c (Bjorn) Marc Zyngier (4): of/pci: Add of_pci_check_probe_only to parse linux,pci-probe-only PCI: pci-host-generic: Fix lookup of linux,pci-probe-only property

[PATCH v2 4/4] arm64: dts: Drop linux,pci-probe-only from the Seattle DTS

-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm64/boot/dts/amd/amd-overdrive.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/amd/amd-overdrive.dts b/arch/arm64/boot/dts/amd/amd-overdrive.dts index 564a3f7..128fa94 100644 --- a/arch/arm64/boot/dts/amd/amd

[PATCH v2 1/4] of/pci: Add of_pci_check_probe_only to parse linux,pci-probe-only

Both pci-host-generic and Pseries parse the linux,pci-probe-only to engage the PCI_PROBE_ONLY mode, and both have a subtle bug that can be triggered if the property has no parameter. Provide a generic implementation that can be used by both. Signed-off-by: Marc Zyngier marc.zyng...@arm.com

Re: [PATCH v3 3/5] pci: altera: Add Altera PCIe MSI driver

On 07/08/15 08:43, Ley Foon Tan wrote: This patch adds Altera PCIe MSI driver. This soft IP supports configurable number of vectors, which is a dts parameter. Signed-off-by: Ley Foon Tan lf...@altera.com --- drivers/pci/host/Kconfig | 8 + drivers/pci/host/Makefile |

Re: [PATCH v3 2/5] pci:host: Add Altera PCIe host controller driver

On 07/08/15 08:42, Ley Foon Tan wrote: This patch adds the Altera PCIe host controller driver. Signed-off-by: Ley Foon Tan lf...@altera.com --- drivers/pci/host/Kconfig | 7 + drivers/pci/host/Makefile | 1 + drivers/pci/host/pcie-altera.c | 532

Re: [PATCH 1/3] Docs: dt: add generic MSI bindings

v4.3. Marc, can I take it from your use of the binding that you are happy to provide your ack? Definitely. Acked-by: Marc Zyngier marc.zyng...@arm.com M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line unsubscribe devicetree in the body

Re: [PATCH v2 3/5] pci: altera: Add Altera PCIe MSI driver

On 03/08/15 11:37, Ley Foon Tan wrote: On Fri, Jul 31, 2015 at 8:12 PM, Marc Zyngier marc.zyng...@arm.com wrote: On 31/07/15 11:15, Ley Foon Tan wrote: This patch adds Altera PCIe MSI driver. This soft IP supports configurable number of vectors, which is a dts parameter. I've reviewed

Re: [PATCH 1/3] Docs: dt: add generic MSI bindings

On 27/07/15 10:46, Mark Rutland wrote: On Mon, Jul 27, 2015 at 09:02:46AM +0100, Marc Zyngier wrote: Hi Mark, Hi, On 23/07/15 17:52, Mark Rutland wrote: Currently msi-parent is used in a couple of drivers despite being fairly underspecified. This patch adds a generic binding for MSIs

Re: [PATCH v2 2/5] pci:host: Add Altera PCIe host controller driver

On 31/07/15 11:15, Ley Foon Tan wrote: This patch adds the Altera PCIe host controller driver. Signed-off-by: Ley Foon Tan lf...@altera.com --- drivers/pci/host/Kconfig | 8 + drivers/pci/host/Makefile | 1 + drivers/pci/host/pcie-altera.c | 526

Re: [PATCH v2 3/5] pci: altera: Add Altera PCIe MSI driver

On 31/07/15 11:15, Ley Foon Tan wrote: This patch adds Altera PCIe MSI driver. This soft IP supports configurable number of vectors, which is a dts parameter. I've reviewed the initial drop of this code; basic courtesy would be to keep me CCed on the follow-up series. Signed-off-by: Ley

Re: [PATCH 4/6] pci: altera: Add Altera PCIe MSI driver

On 29/07/15 09:52, Ley Foon Tan wrote: On Wed, Jul 29, 2015 at 1:58 AM, Marc Zyngier marc.zyng...@arm.com wrote: Hi Ley, On 28/07/15 11:45, Ley Foon Tan wrote: This patch adds Altera PCIe MSI driver. This soft IP supports configurable number of vectors, which is a dts parameter. Can't you

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