On Thu, 10 Dec 2015 11:04:03 -0800
John Stultz wrote:
> On Thu, Dec 10, 2015 at 1:20 AM, Tomas Winkler wrote:
> > Intel uses EFI variables for that on some AOS platforms. There is a
> > need for persistent storage abstraction and generalize the reboot
not true, with a proprietary bios it's a clear pay this much money and don't
worry about it while with GPL there's a nagging fear that someone you never
heard of may sue you a decade from now claiming you need to give them the
source
to your OS.
Not really no - the number of companies
facts in a dts file. The GPL’d files aren’t stopping anybody from creating
proprietary software. People that really care will rewrite the files
from scratch anyway. People that don’t care.. well, one need look
no further than the difficulty of getting source code to different SoC
support
So that GPL header at begining of each file becomes one line... and so
that if it is BSD/GPL dual licensed is plain to see, and I don't have
to read the notices saying oh this is gpl.. but if you want to,
delete gpl above and use license below.
That won't happen though. You'd require every
We really need one tag per file. Of course the resulting license for the
Linux kernel is clear. But there are many things to take into account
You don't even need that. Generate a set of hashes and paths of the kernel
files, put the hashes and the paths and your tags into a database, enjoy.
On Thu, 15 Jan 2015 22:54:46 +0200
Pantelis Antoniou pantelis.anton...@konsulko.com wrote:
Hi Alan,
On Jan 15, 2015, at 22:45 , One Thousand Gnomes
gno...@lxorguk.ukuu.org.uk wrote:
On Thu, 15 Jan 2015 11:47:26 -0700
Jason Gunthorpe jguntho...@obsidianresearch.com wrote
On Thu, 15 Jan 2015 11:47:26 -0700
Jason Gunthorpe jguntho...@obsidianresearch.com wrote:
It is a novel idea, my concern would be that embedding the FPGA in the
DT makes it permanent unswappable kernel memory.
Not having the kernel hold the FPGA is best for many uses.
If you have a filesysytem
On Wed, 14 Jan 2015 11:12:58 -0700
Jason Gunthorpe jguntho...@obsidianresearch.com wrote:
On Wed, Jan 14, 2015 at 04:06:17PM +, One Thousand Gnomes wrote:
and I think you effectively have the user usage covered here for such
things. It much like GPIO pins - we can describe them but we
Those people have failed to show up and provide input and/or code.
That doesn't excuse failing to design the code properly.
It is one thing to context switch a maths algorithm that is built to
be stateless, it is quite another to context switch between, say an
ethernet core with an
The request_firmware interface should be for the DT overlay path, and
other schemes shouldn't use it. The name should come from the DT and
no place else.
For the static bindings agreed (or ACPI but that's a detail) or other
dynamic discovery post boot.
2) The bootloader starts the kernel
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
What if you've not been given a resource ?
Otherwise looks fine to me
--
To unsubscribe from this list: send the line unsubscribe devicetree in
the body of a message to majord...@vger.kernel.org
More majordomo info at
Then configure udev to load right firmware for you, or ln -s
image-i-want-now socfpga-fpga-image to select the one to read...?
Your conceptual model is wrong. FPGA firmware is dynamic. There are
already people who lazy reload FPGA firmware on taskswitches. This
proposed fpga manager is broken
On Wed, 7 Jan 2015 14:20:14 -0300
Ezequiel Garcia ezequiel.gar...@imgtec.com wrote:
From: Naidu Tellapati naidu.tellap...@imgtec.com
The Pistachio SOC from Imagination Technologies includes a Pulse Density
Modulation DAC which produces a form of analogue output according to the
relative
It would be really nice if the uart would register the line disciple as a
child device, then the line discipline would register whatever it wants.
For almost every case this doesn't work. You need a tty interface as well
because thats how you manage it.
But that isn't how it works. The line
On Sat, 20 Dec 2014 11:09:21 +1100
NeilBrown ne...@suse.de wrote:
If a platform has a particular device permanently attached to a UART,
there may be out-of-band signaling necessary to power the device
on and off.
This drive controls that signalling for a number of different devices.
It can
On Wed, 17 Dec 2014 11:34:46 +0100
Gabriel FERNANDEZ gabriel.fernan...@st.com wrote:
sti SoCs PCIe IPs are built around DesignWare IP Core.
But in these SoCs, PCIe IP doesn't support IO.
By default, when no IO space is provided, a default one is assigned.
Add an empty IO resource to the
Am I missing some w2sg004 specific bits here ?
There is particular behaviour that the device is both turned on and turned
off by toggling a GPIO, and the only way to detect which state it is in is
to watch the RX uart line (by reconfiguring it as a GPIO).
Ok so it is somewhat different to
2) why is this tied to the tty core and not the serial core
if this is only for UART?
I'm a bit baffled why you would try and tie it to serial core given that
serial core only covers a random subset of the uart drivers we have. If
we have a USB connected device with USB gpio lines doing
On Fri, 12 Dec 2014 08:02:48 -0500
Which brings up another point: why not do this in the runtime power
management;
ie, turn on the slave device when the master device is turned on? Sebastian
recently made the 8250 driver power-managed per access, which would enable
significant power savings
+w2sg0004 UART-attached GPS receiver
+
I'm wondering why it's tied to the w2sg0004
+struct w2sg_data {
+ int gpio;
+ int irq;/* irq line from RX pin when pinctrl
+ * set to 'idle' */
+ struct regulator *reg;
+
+
On Tue, 9 Dec 2014 14:14:48 -0600
+Contact: Alan Tull at...@opensource.altera.com
+Description: Read state of fpga framework state machine as a string.
+ Valid states may vary by manufacturer; superset is:
+ * unknown = can't determine state
+
I agree with the view that a FPGA is something that can get reprogrammed a
lot.
That's a flexibility we want to use. I don't see a problem with using
firmware
to do the programming as long as we have a lightweight interface where we can
load an image, use it, then later reset the FGPA and
On Sat, 6 Dec 2014 13:00:17 +
Grant Likely grant.lik...@linaro.org wrote:
On Fri, Oct 24, 2014 at 11:52 AM, Pavel Machek pa...@denx.de wrote:
Hi!
* /sys/class/fpga_manager/fpga/firmware
Name of FPGA image file to load using firmware class.
$ echo image.rbf
Yes, I saw this way in other serial drivers.
But, if then, there are two questions for me:
1. Why did some serial drivers need an UN_SHARED irq?
2. How can we choose a right way?
If your hardware can support sharing an IRQ then shared is the right way
- along with the test Arnd suggested.
+ 213 = /dev/ttySPX0 SPRD serial port 0
+ ...
+ 216 = /dev/ttySPX3 SPRD serial port 3
Please use dynamic allocation or give a very very good reason why you
can't
+config SERIAL_SPRD_NR
+int Maximum number of sprd
+int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size_t count)
+{
+ int ret;
+
+ if (test_and_set_bit_lock(FPGA_MGR_BUSY, mgr-flags))
+ return -EBUSY;
+
+ dev_info(mgr-dev, writing buffer to %s\n, mgr-name);
+
+ ret = __fpga_mgr_write(mgr, buf,
On Mon, 20 Oct 2014 18:23:38 +0800
Orson Zhai orsonz...@gmail.com wrote:
On Sun, Oct 19, 2014 at 5:06 AM, One Thousand Gnomes
gno...@lxorguk.ukuu.org.uk wrote:
On Fri, 17 Oct 2014 17:54:25 +0800
Chunyan Zhang chunyan.zh...@spreadtrum.com wrote:
Add serial driver for spreadtrum sharkl
On Fri, 17 Oct 2014 17:54:25 +0800
Chunyan Zhang chunyan.zh...@spreadtrum.com wrote:
Add serial driver for spreadtrum sharkl platform with earlycon
support at first.
+#define UART_TXD 0x
+#define UART_RXD 0x0004
+#define UART_STS00x0008
+#define UART_STS10x000C
On Thu, 7 Aug 2014 16:07:41 +0200
Matthias Brugger matthias@gmail.com wrote:
2014-08-07 15:21 GMT+02:00 Alan Cox a...@linux.intel.com:
+ * Some baudrates are not supported by the chip, so we use the next
+ * lower rate supported and update termios c_flag.
I don't see the
I like the sound of going to the standard ttyS notation and only
providing ports for ones that exist, but is this userspace-visible
ttyS is 8250 compatible UARTS.
If the Samsung is not an 8250 compatible UART then it doesn't belong as
ttyS from the kernel perspective.
How your udev handles it
As soon as this patch
(http://www.spinics.net/lists/arm-kernel/msg325197.html) will be
applied, we don't really need this DTR GPIO any more.
For the omap specific case, not for the general case of sorting out power
hierarchies.
Alan
--
To unsubscribe from this list: send the line unsubscribe
But I don't have discrete hardware. I have a bunch of stuff soldered onto a
board with ad-hoc connections chosen to make the life of the hardware
builder
easy rather than chosen to make the life of the software developer easy
(which I think is the correct choice).
So I need to
-if (up-capabilities UART_CAP_AFE port-fifosize = 32) {
+if ((up-capabilities UART_CAP_AFE (port-fifosize = 32)) ||
+port-flags UPF_HARD_FLOW) {
[Alan] Surely you want brackets on the port-flags UPF_HARD_FLOW ??
The C precedence table shows following order:=
- ||
+ baud = uart_get_baud_rate(port, termios, old,
+ port-uartclk / 16 / 0x,
+ port-uartclk / 16);
+ switch (baud) {
+ case 2400:
+ len |= 1;
+ break;
+ case 4800:
+ len |= 2;
On Wed, 16 Apr 2014 21:17:18 +0400
Sergei Ianovich ynv...@gmail.com wrote:
This patch implements probing for the bus and reporting the number
of available expansion slots.
This appears to be a bus not a misc device. I don't think it belongs in
misc. As you've got devices on this bus (or nailed
On Wed, 16 Apr 2014 23:01:47 +0400
Sergei Ianovich ynv...@gmail.com wrote:
One Thousand Gnomes gno...@lxorguk.ukuu.org.uk wrote:
+ baud = uart_get_baud_rate(port, termios, old,
+port-uartclk / 16 / 0x,
+port-uartclk / 16
On Wed, 16 Apr 2014 20:42:39 +0200
Arnd Bergmann a...@arndb.de wrote:
On Wednesday 16 April 2014 19:41:09 One Thousand Gnomes wrote:
On Wed, 16 Apr 2014 21:17:18 +0400
Sergei Ianovich ynv...@gmail.com wrote:
This patch implements probing for the bus and reporting the number
For our use case here, which is a bluetooth chip connected on the UART,
there is no in kernel representation or driver to tie them to. Same goes
for UART based GPS chips. They just so happen to require toggling a GPIO,
and maybe enabling a specific clock, to get it running. Afterwards,
This adds support for GPIO controlled reset pins on peripheral ICs to the
reset
controller framework. Currently there is no support for specifying a delay
between assertion and de-assertion of the reset signal, so this has to be
handled by the drivers.
Lots of GPIO controllers are doing
not needed if hw has flow control capabilities. This patch adds a
DT attribute for enabling hw flow control for a uart port. Also skip
stop and start if this flag is present in flag field of the port
structure.
That seems a sensible thing to add.
- if (up-capabilities UART_CAP_AFE
If we *do* export it, I'd like it to have a more conventional name, e.g.,
something starting with pci_.
Understood. pci_find_host_bridge() ?
pci_get_host_bridge() and take a reference IMHO ? If your primary bus is
not PCI then your PCI host bridge could be hot swappable so the API at
least
+ wdt-cdns_wdt_notifier.notifier_call = cdns_wdt_notify_sys;
+ /* Register the reboot notifier */
+ ret = register_reboot_notifier(wdt-cdns_wdt_notifier);
+ if (ret != 0) {
+ dev_err(pdev-dev, cannot register reboot notifier err=%d)\n,
+ ret);
On Fri, 21 Mar 2014 10:26:09 +0200
Heikki Krogerus heikki.kroge...@linux.intel.com wrote:
Hi,
On Thu, Mar 20, 2014 at 10:05:33AM -0400, j...@ringle.org wrote:
From: Jon Ringle jrin...@gridpoint.com
The SC16IS7xx is a slave I2C-bus/SPI interface to a single-channel
high performance
On Fri, 28 Feb 2014 18:18:38 -0500
Santosh Shilimkar santosh.shilim...@ti.com wrote:
Based on earlier thread https://lkml.org/lkml/2013/10/7/662; and
further discussion at Kernel Summit'2013, it was agreed to create
'driver/soc' for drivers which are quite SOC specific.
Lets take the
On Mon, 24 Feb 2014 06:26:52 -0800
Greg Kroah-Hartman gre...@linuxfoundation.org wrote:
On Mon, Feb 24, 2014 at 03:03:25PM +0100, Michal Simek wrote:
BTW: Isn't this a good topic for kernel-summit? :-)
No, lawyers don't go to the summit, developers do.
More of a topic for the LF.
45 matches
Mail list logo