Re: [PATCH v4] extcon: Palmas Extcon Driver

On 05/07/2013 03:25 PM, Kishon Vijay Abraham I wrote: > Hi, > > On Tuesday 07 May 2013 11:40 AM, Chanwoo Choi wrote: >> Hi Kishon, >> >> I add some opinion about this patch. >> >> On 05/06/2013 10:17 PM, Kishon Vijay Abraham I wrote: >>> From: Graeme Gregory >>> >>> This is the driver for the USB

[PATCH V2 3/3] ARM: dts: add clock provider information for i2s controllers in Exynos5250

Add clock lookup information for i2s controllers on exynos5250 SoC. Signed-off-by: Padmavathi Venna --- arch/arm/boot/dts/exynos5250.dtsi | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi inde

[PATCH V2 2/3] ARM: dts: add Exynos audio subsystem clock controller node

Audio subsystem introduced in s5pv210 and exynos platforms which has a internal clock controller. This patch adds a node for the same on exynos5250. Signed-off-by: Padmavathi Venna --- arch/arm/boot/dts/exynos5250.dtsi |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a

[PATCH V2 1/3] clk: samsung: register audio subsystem clocks using common clock framework

Audio subsystem is introduced in s5pv210 and exynos platforms. This has seperate clock controller which can control i2s0 and pcm0 clocks. This patch registers the audio subsystem clocks with the common clock framework. Signed-off-by: Padmavathi Venna --- .../bindings/clock/clk-samsung-audss.txt

[PATCH V2 0/3] clk: Samsung: audss: Register audio subsytem clocks using common clk framework

Samsung S5PV210 and Exynos SoC has a separate subsystem for audio. This subsystem has a internal clock controller which controls i2s0 and pcm0 clocks. This patch series adds the Samsung audio subsytem clock to the common clock framework and provides the I2S controllers clock information in the dts

Re: [PATCH v4] extcon: Palmas Extcon Driver

Hi, On Tuesday 07 May 2013 11:40 AM, Chanwoo Choi wrote: Hi Kishon, I add some opinion about this patch. On 05/06/2013 10:17 PM, Kishon Vijay Abraham I wrote: From: Graeme Gregory This is the driver for the USB comparator built into the palmas chip. It handles the various USB OTG events tha

[PATCH] ARM: samsung: use #include for all device trees

Replace /include/ (dtc) with #include (C pre-processor) for all Samsung DT files Signed-off-by: Padmavathi Venna --- This patch is dependent on below patches by Stephen Warren http://www.spinics.net/lists/linux-kbuild/msg07616.html arch/arm/boot/dts/exynos4.dtsi|2 +- arch/arm/

Re: [PATCH v4] extcon: Palmas Extcon Driver

Hi Kishon, I add some opinion about this patch. On 05/06/2013 10:17 PM, Kishon Vijay Abraham I wrote: > From: Graeme Gregory > > This is the driver for the USB comparator built into the palmas chip. It > handles the various USB OTG events that can be generated by cable > insertion/removal. > > S

[PATCH] of/base: fix typos

From: Lad, Prabhakar the function of_property_read_u8/16/32_array() has a parameter out_values, but the description mentioned it as out_value. This patch fixes this typo. Signed-off-by: Lad, Prabhakar --- drivers/of/base.c | 12 ++-- 1 files changed, 6 insertions(+), 6 deletions(-)

Re: [PATCH V2 1/2] tps6507x-ts: Add DT support

Hi Manish, Thanks for the patch, below are few nits. On Sat, May 4, 2013 at 4:42 PM, Vishwanathrao Badarkhe, Manish wrote: > Add device tree based support for TI's tps6507x touchscreen. [Snip] > +- tsc: This node specifies touch screen data. > + ti,poll_period : Time at which touch input

Re: [PATCH] ARM: dts: Correct the base address of pinctrl_3

Hi, On Tue, May 7, 2013 at 10:28 AM, Sascha Hauer wrote: > Hi, > > On Tue, May 07, 2013 at 09:07:33AM +0530, Padmavathi Venna wrote: >> This patch corrects the base address of pinctrl_3 on Exynos5250 >> platform. > > Exynos5250 should be part of the subject so that other people can know > whether

Re: [PATCH v4] extcon: Palmas Extcon Driver

Hi, On Tuesday 07 May 2013 06:13 AM, myungjoo.ham wrote: From: Graeme Gregory This is the driver for the USB comparator built into the palmas chip. It handles the various USB OTG events that can be generated by cable insertion/removal. Signed-off-by: Graeme Gregory Signed-off-by: Moiz Sonasa

Re: [PATCH] ARM: dts: Correct the base address of pinctrl_3

Hi, On Tue, May 07, 2013 at 09:07:33AM +0530, Padmavathi Venna wrote: > This patch corrects the base address of pinctrl_3 on Exynos5250 > platform. Exynos5250 should be part of the subject so that other people can know whether this patch is interesting for them or not. Sascha -- Pengutronix e.

Re: [PATCH v4] extcon: Palmas Extcon Driver

Hi, On Monday 06 May 2013 08:10 PM, Mark Brown wrote: On Mon, May 06, 2013 at 06:47:04PM +0530, Kishon Vijay Abraham I wrote: + if (palmas_usb->linkstat != PALMAS_USB_STATE_VBUS) { + if (palmas_usb->vbus_reg) { + ret = regulator

Re: [PATCH v4] extcon: Palmas Extcon Driver

Hi, On Monday 06 May 2013 07:56 PM, Laxman Dewangan wrote: On Monday 06 May 2013 06:47 PM, Kishon Vijay Abraham I wrote: + +static irqreturn_t palmas_vbus_wakeup_irq(int irq, void *_palmas_usb) Can we name the function to palams_vbus_irq_handler() for better understanding? Reserve the wakeup

[PATCH] ARM: dts: Correct the base address of pinctrl_3

This patch corrects the base address of pinctrl_3 on Exynos5250 platform. Signed-off-by: Padmavathi Venna --- This patch is dependent on below patch posted by Thomas Abraham. https://patchwork.kernel.org/patch/2225151/ arch/arm/boot/dts/exynos5250-pinctrl.dtsi |2 +- arch/arm/boot/dts/exyn

[PATCH v8] i2c: exynos5: add High Speed I2C controller driver

From: Naveen Krishna Chatradhi Adds support for High Speed I2C driver found in Exynos5 and later SoCs from Samsung. Driver only supports Device Tree method. Changes since v1: 1. Added FIFO functionality 2. Added High speed mode functionality 3. Remove SMBUS_QUICK 4. Remove the debugfs functiona

RE: [PATCH v4] extcon: Palmas Extcon Driver

> From: Graeme Gregory > > This is the driver for the USB comparator built into the palmas chip. It > handles the various USB OTG events that can be generated by cable > insertion/removal. > > Signed-off-by: Graeme Gregory > Signed-off-by: Moiz Sonasath > Signed-off-by: Ruchika Kharwar > Sign

[PATCH] pinctrl: dove: add PMU functions to pinctrl

Dove power management unit can mux some special functions to mpp0-15. This patch adds support to set/get the current PMU function mapped to the corresponding mpp pins. The device tree documentation is also updated accordingly. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Rob Her

Re: [PATCH 0/7] mv643xx_eth: device tree bindings

On 05/06/13 18:07, Jason Cooper wrote: Sebastian, Thanks for picking this up! A few comments about merging strategy: On Mon, May 06, 2013 at 05:33:33PM +0200, Sebastian Hesselbarth wrote: This patch set picks up work by Florian Fainelli bringing full DT support to mv643xx_eth and Marvell SoCs

Re: [PATCH 0/7] mv643xx_eth: device tree bindings

Sebastian, Thanks for picking this up! A few comments about merging strategy: On Mon, May 06, 2013 at 05:33:33PM +0200, Sebastian Hesselbarth wrote: > This patch set picks up work by Florian Fainelli bringing full DT > support to mv643xx_eth and Marvell SoCs using it. > > The current patch set

Re: [PATCH v3 5/7] ARM: kirkwood: remove legacy mv643xx_eth board setup

Dear Sebastian Hesselbarth, On Mon, 6 May 2013 17:33:38 +0200, Sebastian Hesselbarth wrote: > With DT support for mv643xx_eth we do not need legacy platform_data > based setup for DT enabled boards. This patch removes eth setup > for all kirkwood DT board files. > > arch/arm/mach-kirkwood/boar

Re: [PATCH 0/7] mv643xx_eth: device tree bindings

Two things: 1) None of your postings make the mailing lists because your CC: line is too large, and we block large ones because those are %99 of SPAM. It really isn't reasonable to CC: so many people, and I do understand that you're just sifting email addresses from MAINTAINERS or whate

[PATCH v3 7/7] ARM: kirkwood: remove legacy clk alias for mv643xx_eth

With all boards converted to DT enabled mv643xx_eth we can now remove the clock alias for gbe clocks. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Lennert Buytenhek Cc: David Miller Cc: Florian Fainelli Cc: Arnaud Patard Cc: Russell King Cc

[PATCH v3 6/7] ARM: kirkwood: add gigabit ethernet and mvmdio device tree nodes

This patch adds mv643xx_eth and mvmdio device tree nodes for DT enabled Kirkwood boards. Phy nodes are also added with reg property set on a per-board basis. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Lennert Buytenhek Cc: David Miller Cc: F

[PATCH v3 5/7] ARM: kirkwood: remove legacy mv643xx_eth board setup

With DT support for mv643xx_eth we do not need legacy platform_data based setup for DT enabled boards. This patch removes eth setup for all kirkwood DT board files. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Lennert Buytenhek Cc: David Miller

[PATCH v3 4/7] ARM: dove: add gigabit ethernet and mvmdio device tree nodes

This patch adds mv643xx_eth and mvmdio device tree nodes for DT enabled Dove boards. As there is only one ethernet controller on Dove, a default phy node is also added with a note to overwrite its reg property on a per-board basis. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Ro

[PATCH v3 3/7] ARM: dove: remove legacy mv643xx_eth setup

With DT support for mv643xx_eth we do not need legacy platform_data based setup for DT enabled boards. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Lennert Buytenhek Cc: David Miller Cc: Florian Fainelli Cc: Arnaud Patard Cc: Russell King C

[PATCH v3 2/7] net: mv643xx_eth: update Device Tree bindings documentation

From: Florian Fainelli This patch updates the Device Tree bindings documentation for the Marvell MV643xx ethernet controller node and makes the "local-mac-address" and "phy" properties optional instead of required. The absence of a "phy" node is legal and describes a MAC to switch configuration,

[PATCH v3 1/7] net: mv643xx_eth: add Device Tree bindings

From: Florian Fainelli This patch adds Device Tree bindings following the already defined bindings at Documentation/devicetree/bindings/marvell.txt. The binding documentation is also enhanced with new optionnal properties required for supporting certain devices (RX/TX queue and SRAM). Since we no

[PATCH 0/7] mv643xx_eth: device tree bindings

This patch set picks up work by Florian Fainelli bringing full DT support to mv643xx_eth and Marvell SoCs using it. The current patch set drops Florian's device tree conversions for Kirkwood, Dove, and Orion5x in favour of split patches for board files and board descriptor files. Device tree conv

Re: [patch 8/8] irqchip: sun4i: Convert to generic irq chip

On 05/06/2013 09:30 AM, Thomas Gleixner wrote: > Proof of concept patch to demonstrate the new irqdomain support for > the generic irq chip. Untested !! > > Signed-off-by: Thomas Gleixner > Cc: Maxime Ripard > --- > drivers/irqchip/irq-sun4i.c | 100 > -

Re: [RFC PATCH v2] drivers: bus: add ARM CCI support

Review comments below. On Wed, 1 May 2013, Lorenzo Pieralisi wrote: > index 000..fb9e8e0 > --- /dev/null > +++ b/drivers/bus/arm-cci.c > @@ -0,0 +1,372 @@ > +/* > + * CCI cache coherent interconnect driver > + * > + * Copyright (C) 2013 ARM Ltd. > + * Author: Lorenzo Pieralisi > + * > + * Th

Re: [PATCH RFC v3] media: i2c: mt9p031: add OF support

Hi Arnd, On Fri, May 3, 2013 at 8:04 PM, Arnd Bergmann wrote: > On Friday 03 May 2013, Prabhakar Lad wrote: >> [snip] >> +} > > Ok, good. > >> @@ -955,7 +998,17 @@ static int mt9p031_probe(struct i2c_client *client, >> mt9p031->pdata = pdata; >> mt9p031->output_control = MT9P031_O

Re: [PATCH v4] extcon: Palmas Extcon Driver

On Monday 06 May 2013 06:47 PM, Kishon Vijay Abraham I wrote: + +static irqreturn_t palmas_vbus_wakeup_irq(int irq, void *_palmas_usb) Can we name the function to palams_vbus_irq_handler() for better understanding? Reserve the wakeup word for the suspend-wakeups. + + +static irqreturn_t pa

[patch 8/8] irqchip: sun4i: Convert to generic irq chip

Proof of concept patch to demonstrate the new irqdomain support for the generic irq chip. Untested !! Signed-off-by: Thomas Gleixner Cc: Maxime Ripard --- drivers/irqchip/irq-sun4i.c | 100 1 file changed, 29 insertions(+), 71 deletions(-) Index: l

[patch 7/8] genirq: generic chip: Add linear irq domain support

Provide infrastructure for irq chip implementations which work on linear irq domains. - Interface to allocate multiple generic chips which are associated to the irq domain. - Interface to get the generic chip pointer for a particular hardware interrupt in the domain. - irq domain mapping fun

[patch 5/8] genirq: Add a mask calculation function

Some chips have weird bit mask access patterns instead of the linear you expect. Allow them to calculate the cached mask themself. Signed-off-by: Thomas Gleixner --- include/linux/irq.h |3 +++ kernel/irq/generic-chip.c |8 ++-- 2 files changed, 9 insertions(+), 2 deletions(-)

[patch 4/8] genirq: generic chip: Cache per irq bit mask

Cache the per irq bit mask instead of recalculating it over and over. Signed-off-by: Thomas Gleixner --- include/linux/irq.h |4 kernel/irq/generic-chip.c | 23 ++- 2 files changed, 18 insertions(+), 9 deletions(-) Index: linux-2.6/include/linux/irq.h ==

[patch 6/8] genirq: Split out code in generic chip

Preparatory patch for linear interrupt domains. Signed-off-by: Thomas Gleixner --- kernel/irq/generic-chip.c | 50 +++--- 1 file changed, 34 insertions(+), 16 deletions(-) Index: linux-2.6/kernel/irq/generic-chip.c ==

[patch 3/8] genirq: generic chip: Handle separate mask registers

From: Gerlando Falauto There are cases where all irq_chip_type instances have separate mask registers, making a shared mask register cache unsuitable for the purpose. Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per chip mask pointer to the per chip private mask cache inste

[patch 0/8] genirq: Support for irq domains in generic irq chip - V2

Changes vs. V1: - Fixed the generic chip pointer thinko (Sebastian Hesselbarth) - Proper support for mask cache - Read mask hardware only for the first map of an generic chip instance - sun4i prefix irq functions proper Thanks, tglx __

[patch 2/8] genirq: generic chip: Add support for per chip type mask cache

From: Gerlando Falauto Today the same interrupt mask cache (stored within struct irq_chip_generic) is shared between all the irq_chip_type instances. As there are instances where each irq_chip_type uses a distinct mask register (as it is the case for Orion SoCs), sharing a single mask cache may b

[patch 1/8] genirq: generic chip: Remove the local cur_regs() function

From: Gerlando Falauto Since we already have an irq_data_get_chip_type() function which returns a pointer to irq_chip_type, use that instead of cur_regs(). Signed-off-by: Gerlando Falauto Cc: Lennert Buytenhek Cc: Simon Guinot Cc: Joey Oravec Cc: Ben Dooks Cc: Nicolas Pitre Cc: Jason Coope

Re: [RFC patch 7/8] fixup 2/2: genirq: generic chip: Add linear irq domain support

On Mon, 6 May 2013, Sebastian Hesselbarth wrote: > mask_cache pointer also needs to be initialized for domain generic > chips. It's not only the mask cache pointer. We also need to initialize the mask cache itself. I solved it by spitting out that code from irq_setup_generic_chip(). Thanks,

Re: [RFC patch 7/8] fixup 1/2: genirq: generic chip: Add linear irq domain support

On Mon, 6 May 2013, Sebastian Hesselbarth wrote: > irq_domain_chip_generic is allocating and indexing irq_chip_generic > itself. However, the size of irq_chip_generic varies with number of > irq_chip_types. This fixup moves irq_chip_generic helt by > irq_domain_chip_generic to array of ptr and fix

[PATCH v4] extcon: Palmas Extcon Driver

From: Graeme Gregory This is the driver for the USB comparator built into the palmas chip. It handles the various USB OTG events that can be generated by cable insertion/removal. Signed-off-by: Graeme Gregory Signed-off-by: Moiz Sonasath Signed-off-by: Ruchika Kharwar Signed-off-by: Kishon Vi

[RFC patch 7/8] fixup 1/2: genirq: generic chip: Add linear irq domain support

irq_domain_chip_generic is allocating and indexing irq_chip_generic itself. However, the size of irq_chip_generic varies with number of irq_chip_types. This fixup moves irq_chip_generic helt by irq_domain_chip_generic to array of ptr and fixes the pointer arith used by irq_alloc_domain_generic_chip

[RFC patch 7/8] fixup 2/2: genirq: generic chip: Add linear irq domain support

mask_cache pointer also needs to be initialized for domain generic chips. Signed-off-by: Sebastian Hesselbarth --- Cc: Thomas Gleixner Cc: Russell King - ARM Linux Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Arnd Bergmann Cc: Jason Cooper Cc: Andrew Lunn Cc: Jason Gunthorpe Cc:

Re: [RFC patch 0/8] genirq: Support for irq domains in generic irq chip

Hello, On Fri, May 03, 2013 at 09:50:43PM -, Thomas Gleixner wrote: > The ongoing device tree support for ARM is creating new irq chip > drivers in drivers/irqchip/ in a frenzy. Quite some of them are > ripping out the generic irq chip implementation from arch/arm/* and > just creating the sam