From: Wei Yongjun
Fix to return a negative error code in the init error handling
case instead of 0, as done elsewhere in this function.
Signed-off-by: Wei Yongjun
---
drivers/mmc/host/omap_hsmmc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/omap_hsmmc
* Gupta, Pekon [130502 02:49]:
> From: "Philip, Avinash"
>
> Add GPMC data node to AM33XX device tree file.
>
> Signed-off-by: Philip Avinash
> Acked-by: Peter Korsgaard
> Signed-off-by: Pekon Gupta
Thanks adding into omap-for-v3.10/dt-fixes.
Tony
> ---
> Changes in v2:
> - Change
* Jon Hunter [130430 06:59]:
> The following changes since commit aecb65a34a780cd07fbaa652cc5d640f13f3ed5f:
>
> Merge branch 'omap-gpmc-for-v3.10-take2' of
> git://github.com/jonhunter/linux into omap-for-v3.10/gpmc (2013-04-04
> 11:22:33 -0700)
>
> are available in the git repository at:
>
* Sekhar Nori [130429 22:11]:
>
> On 4/29/2013 1:25 PM, Gupta, Pekon wrote:
> > From: avinash philip
> >
> > NAND flash connected in am335x-evm on GPMC controller. This patch adds
> > device tree node in am3355-evm with GPMC contoller timing for NAND flash
> > interface, NAND partition table, E
* Dan Murphy [130418 11:35]:
> On 04/18/2013 04:30 AM, Vincent Stehlé wrote:
> >On 04/17/2013 10:16 PM, Dan Murphy wrote:
> >>The GPIO for LED D1 on the omap4-panda a1-a3 rev and the omap4-panda-es
> >>are different.
> >(..)
> >>diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi
> >>b/arch/ar
* Nishanth Menon [130426 10:44]:
> Hi,
> It seems that I have not been paying close attention to
> actual voltage value seen on scope to map it back to verify the validity
> of the voltage value. Even though I did verify[1] that voltage did scale to
> values in DT entries, the values in the case o
On Wed, Apr 17, 2013 at 6:32 PM, Javier Martinez Canillas
wrote:
> The IGEPv2 board has an SMSC LAN9221i ethernet chip connected to
> the OMAP3 processor though the General-Purpose Memory Controller.
>
> This patch adds a device node for the ethernet chip as a GPMC child
> and all its dependencies
On 05/07/2013 09:36:38 PM, Stephen Warren wrote:
On 05/07/2013 03:33 PM, Andrew Morton wrote:
...
Subject: drivers/video: implement a simple framebuffer driver
A simple frame-buffer describes a raw memory region that may be
rendered
to, with the assumption that the display hardware has alre
From: Wei Yongjun
Date: Tue, 7 May 2013 20:16:00 +0800
> From: Wei Yongjun
>
> Fix to return a negative error code from the error handling
> case instead of 0, as done elsewhere in this function.
>
> Signed-off-by: Wei Yongjun
Applied.
___
devicetr
From: Sebastian Hesselbarth
Date: Tue, 7 May 2013 11:49:31 +0200
> of_mdiobus_register creates a phy_device even if get_phy_device failed
> to create it previously. This causes indefinite polling on non-existent
> PHYs. This fix makes of_mdio_register rely on get_phy_device to
> properly create
On 05/08/2013 10:41 AM, Christian Ruppert wrote:
...
> What do you think about the following modification to the pinctrl/GPIO
> frameworks instead (not yet a formal patch, more a request for comment
> to illustrate what I mean. If you agree, I will clean it up and submit a
> proper patch after disc
On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>
> On 08/05/13 15:39, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>> +
> >> >
> >> > Please remove all forward declarations, by reordering the functions in
> >> > the way they are called.
> >> >
> > and drop the dummy functions
>
> We can not
On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> the pinctrl driver calls syconf_claim(np, "st,alt-control) to get a
> field and then do a read/write on the field.
>
> Just in pinctrl driver we use around 50-100 sysconf registers scatters
> across different groups.
>
> Without these new API
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> > From: Srinivas Kandagatla
> >
> > This patch introduces syscon_claim, syscon_read, syscon_write,
> > syscon_release APIs to help drivers to use syscon registers in much more
> > flexible way.
> >
> > With this patch, a driver can claim f
On Tue, May 7, 2013 at 7:36 PM, Stephen Warren wrote:
> On 05/07/2013 03:33 PM, Andrew Morton wrote:
>>
>> We don't seem to have a well-defined path to travel here, and I don't
>> get the feeling that anyone has signed up to walk it?
>>
>> So I'm inclined to merge Stephen's patch as-is into 3.10.
On Wednesday 08 May 2013, Nicolas Pitre wrote:
> I tried to fix this up over 10 years ago. RMK tried as well. This
> failed because X86 people insisted on always having COM1 as /dev/ttyS0,
> COM3 as /dev/ttyS2 and so on, even when some of them weren't present.
>
> A common and dynamic namespace
On 08/05/13 15:39, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> +
>> >
>> > Please remove all forward declarations, by reordering the functions in
>> > the way they are called.
>> >
> and drop the dummy functions
We can not remove the dummy functions, as the serial-core does not check
it before us
Thankyou for the comments.
On 08/05/13 15:34, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>> +*st-asc(Serial Port)
>> +
>> +Required properties:
>> +- compatible : Should be "st,asc".
> Are there any hardware revision numbers for the asc
Thankyou for the comments.
On 08/05/13 16:01, Mark Brown wrote:
> On Wed, May 08, 2013 at 04:50:22PM +0200, Arnd Bergmann wrote:
>
>>> In many cases a single syconf register contains bits related to multiple
>>> devices, and therefore it need to be shared across multiple drivers at
>>> bit level. T
Thankyou for your comments.
On 08/05/13 15:50, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> This patch introduces syscon_claim, syscon_read, syscon_write,
>> syscon_release APIs to help drivers to use syscon registers in much more
>
On 08/05/13 17:20, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> diff --git a/arch/arm/mach-stih41x/board-dt.c
>> b/arch/arm/mach-stih41x/board-dt.c
>> index 8005f71..1f23aca 100644
>> --- a/arch/arm/mach-stih41x/board-dt.c
>> +++ b/arch/arm/mach-stih41x/board-dt.c
Thankyou for the comments.
On 08/05/13 17:18, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> The STiH415 is the next generation of HD, AVC set-top box processors for
>> satellite, cable, terrestrial and IP-STB markets. It is an ARM Co
On May 9, 2013, at 12:31 AM, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Greg KH wrote:
>>> just mention there is not hardware reason to not use the generic ttySx
>>> in place of ttyAS as we have only one IP that handle serial on this
>>> family of SoC
>>>
>>> personally I'll switch to tty
On Wed, 8 May 2013, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Greg KH wrote:
> > > just mention there is not hardware reason to not use the generic ttySx
> > > in place of ttyAS as we have only one IP that handle serial on this
> > > family of SoC
> > >
> > > personally I'll switch to ttyS
On May 9, 2013, at 12:27 AM, Srinivas KANDAGATLA
wrote:
> Thankyou for the comments.
> On 08/05/13 16:06, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 15:11 Wed 08 May , Srinivas KANDAGATLA wrote:
>>> From: Srinivas Kandagatla
>>>
>>> This patch add pinctrl support to ST SoCs.
>>>
>>> A
On 18:18 Wed 08 May , Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> > From: Srinivas Kandagatla
> >
> > The STiH415 is the next generation of HD, AVC set-top box processors for
> > satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
> > 1.0
On Wed, May 08, 2013 at 06:31:48PM +0200, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Greg KH wrote:
> > > just mention there is not hardware reason to not use the generic ttySx
> > > in place of ttyAS as we have only one IP that handle serial on this
> > > family of SoC
> > >
> > > personall
Thankyou for the comments.
On 08/05/13 16:06, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:11 Wed 08 May , Srinivas KANDAGATLA wrote:
>> From: Srinivas Kandagatla
>>
>> This patch add pinctrl support to ST SoCs.
>>
>> About hardware:
>> ST Set-Top-Box parts have two blocks called PIO and PI
On Wednesday 08 May 2013, Greg KH wrote:
> > just mention there is not hardware reason to not use the generic ttySx
> > in place of ttyAS as we have only one IP that handle serial on this
> > family of SoC
> >
> > personally I'll switch to ttySx
>
> Great, then you can use the same major/minor ra
On 18:20 Wed 08 May , Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> > diff --git a/arch/arm/mach-stih41x/board-dt.c
> > b/arch/arm/mach-stih41x/board-dt.c
> > index 8005f71..1f23aca 100644
> > --- a/arch/arm/mach-stih41x/board-dt.c
> > +++ b/arch/arm/mach-stih41
On Wednesday 08 May 2013, Stuart MENEFY wrote:
> Fortunately the earliest version of these SoCs uses r2p2, so we avoided that
> particular issue. But as the code doesn't attempt to work around these
> problems a check on the version number might be a good idea to prevent other
> people accidentally
On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> diff --git a/arch/arm/mach-stih41x/board-dt.c
> b/arch/arm/mach-stih41x/board-dt.c
> index 8005f71..1f23aca 100644
> --- a/arch/arm/mach-stih41x/board-dt.c
> +++ b/arch/arm/mach-stih41x/board-dt.c
> @@ -63,6 +63,8 @@ void __init stih41x_dt_ini
On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> From: Srinivas Kandagatla
>
> The STiH415 is the next generation of HD, AVC set-top box processors for
> satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
> 1.0 GHz, dual-core CPU.
>
> Signed-off-by: Srinivas Kandagatl
On Thu, May 09, 2013 at 12:03:05AM +0800, Jean-Christophe PLAGNIOL-VILLARD
wrote:
>
> On May 8, 2013, at 11:53 PM, Greg KH wrote:
>
> > On Wed, May 08, 2013 at 05:40:57PM +0200, Jean-Christophe PLAGNIOL-VILLARD
> > wrote:
> >> On 08:34 Wed 08 May , Greg KH wrote:
> >>> On Wed, May 08, 2013
On May 8, 2013, at 11:53 PM, Greg KH wrote:
> On Wed, May 08, 2013 at 05:40:57PM +0200, Jean-Christophe PLAGNIOL-VILLARD
> wrote:
>> On 08:34 Wed 08 May , Greg KH wrote:
>>> On Wed, May 08, 2013 at 04:34:43PM +0200, Arnd Bergmann wrote:
> +#define ASC_MAJOR204
> +#de
On Wed, May 08, 2013 at 05:40:57PM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 08:34 Wed 08 May , Greg KH wrote:
> > On Wed, May 08, 2013 at 04:34:43PM +0200, Arnd Bergmann wrote:
> > > > +#define ASC_MAJOR 204
> > > > +#define ASC_MINOR_START40
> > >
> >
On 08:34 Wed 08 May , Greg KH wrote:
> On Wed, May 08, 2013 at 04:34:43PM +0200, Arnd Bergmann wrote:
> > > +#define ASC_MAJOR204
> > > +#define ASC_MINOR_START 40
> >
> > I don't know what the current policy is on allocating major/minor numbers,
> > but I'm sure you c
On Wed, May 08, 2013 at 04:34:43PM +0200, Arnd Bergmann wrote:
> > +#define ASC_MAJOR 204
> > +#define ASC_MINOR_START40
>
> I don't know what the current policy is on allocating major/minor numbers,
> but I'm sure you cannot just reuse one that is already used.
I agree, why
On 15:11 Wed 08 May , Srinivas KANDAGATLA wrote:
> From: Srinivas Kandagatla
>
> This patch add pinctrl support to ST SoCs.
>
> About hardware:
> ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
> pin configurations.
>
> Each multi-function pin is controlled, driven
On 05/08/2013 04:59 AM, Matthijs Kooijman wrote:
> In commit b40b25ff (kbuild: always run gcc -E on *.dts, remove cmd_dtc_cpp),
> dts building was changed to always use the C preprocessor. This meant
> that the .dts file passed to dtc is not the original, but the
> preprocessed one.
>
> When compi
On Wed, May 08, 2013 at 04:38:22PM +0200, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> > From: Stuart Menefy
> >
> > This is a simple driver for the global timer module found in the Cortex
> > A9-MP cores from revision r1p0 onwards. This should be able to perform
On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> From: Srinivas Kandagatla
>
> This patch introduces syscon_claim, syscon_read, syscon_write,
> syscon_release APIs to help drivers to use syscon registers in much more
> flexible way.
>
> With this patch, a driver can claim few/all bits in t
On Wed, May 08, 2013 at 03:38:22PM +0100, Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> > From: Stuart Menefy
> >
> > This is a simple driver for the global timer module found in the Cortex
> > A9-MP cores from revision r1p0 onwards. This should be able to perform
On 16:34 Wed 08 May , Arnd Bergmann wrote:
> On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> > From: Srinivas Kandagatla
>
> > +*st-asc(Serial Port)
> > +
> > +Required properties:
> > +- compatible : Should be "st,asc".
>
> Are there any hardware revision numbers for the asc? If ther
From: Srinivas Kandagatla
This patch introduces syscon_claim, syscon_read, syscon_write,
syscon_release APIs to help drivers to use syscon registers in much more
flexible way.
With this patch, a driver can claim few/all bits in the syscon registers
and do read/write and then release them when it
On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> From: Stuart Menefy
>
> This is a simple driver for the global timer module found in the Cortex
> A9-MP cores from revision r1p0 onwards. This should be able to perform
> the functions of the system timer and the local timer in an SMP system.
On Wednesday 08 May 2013, Srinivas KANDAGATLA wrote:
> From: Srinivas Kandagatla
> +*st-asc(Serial Port)
> +
> +Required properties:
> +- compatible : Should be "st,asc".
Are there any hardware revision numbers for the asc? If there are potentially
incompatible or backwards-compatible variants,
On 05/08/2013 09:11 AM, Srinivas KANDAGATLA wrote:
> From: Stuart Menefy
>
> This is a simple driver for the global timer module found in the Cortex
> A9-MP cores from revision r1p0 onwards. This should be able to perform
> the functions of the system timer and the local timer in an SMP system.
>
From: Srinivas Kandagatla
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x
UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with
standard set-top box IPs.
This patch adds initial support to B2020 with STiH415/416 with SBC_UART1
as console and a heard beat LED.
Sig
From: Srinivas Kandagatla
This patch add pinctrl support to ST SoCs.
About hardware:
ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
pin configurations.
Each multi-function pin is controlled, driven and routed through the PIO
multiplexing block. Each pin supports GPIO f
From: Srinivas Kandagatla
B2000 board is reference board for STIH415/416 SOCs, it has
2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM.
This patch add initial support to b2000 with STiH415/416 with UART2 as
console and a heard beat LED.
Signed-off-by: Srinivas Kandagatla
CC: Ste
From: Srinivas Kandagatla
The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Srinivas Kandagatla
CC: Stephen Gallimore
CC: Stuart Menefy
---
Documentation/arm/STiH41x/stih416-overview.txt | 12 +
arch/arm/boot/dts/stih41
From: Srinivas Kandagatla
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP is common
across all the ST parts for settop box platforms.
ASC is embedded in ST COMMS IP block. It supports Rx & Tx functionality.
It support a
From: Stuart Menefy
This is a simple driver for the global timer module found in the Cortex
A9-MP cores from revision r1p0 onwards. This should be able to perform
the functions of the system timer and the local timer in an SMP system.
The global timer has the following features:
The global t
From: Srinivas Kandagatla
This patch-set adds basic support for STMicroelectronics STiH41x SOCs
which includes STiH415 and STiH416 with B2000 and B2020 board support.
STiH415 and STiH416 are dual-core ARM Cortex-A9 CPU, designed for use in
Set-top-boxes.
The SOC support is divided into two part
On Wed, May 08, 2013 at 09:21:40AM +0200, Sebastian Hesselbarth wrote:
> On 05/08/2013 09:04 AM, Valentin Longchamp wrote:
> >On 05/07/2013 06:36 PM, Sebastian Hesselbarth wrote:
> >>I just checked my mails from late 2012 and there Valentin and I agreed,
> >>that not the missing bits in clock gatin
Hi Laurent,
On Wed, May 8, 2013 at 4:07 PM, Laurent Pinchart
wrote:
> Hi Prabhakar,
>
> On Wednesday 08 May 2013 10:19:57 Prabhakar Lad wrote:
>> On Wed, May 8, 2013 at 7:32 AM, Laurent Pinchart wrote:
>> > On Tuesday 07 May 2013 15:10:36 Prabhakar Lad wrote:
>> >> On Mon, May 6, 2013 at 8:29 PM,
Hi Prabhakar,
On Wednesday 08 May 2013 10:19:57 Prabhakar Lad wrote:
> On Wed, May 8, 2013 at 7:32 AM, Laurent Pinchart wrote:
> > On Tuesday 07 May 2013 15:10:36 Prabhakar Lad wrote:
> >> On Mon, May 6, 2013 at 8:29 PM, Prabhakar Lad wrote:
> >> > On Fri, May 3, 2013 at 8:04 PM, Arnd Bergmann wr
On 05/08/2013 09:04 AM, Valentin Longchamp wrote:
On 05/07/2013 06:36 PM, Sebastian Hesselbarth wrote:
I just checked my mails from late 2012 and there Valentin and I agreed,
that not the missing bits in clock gating control registers was the root
cause of km_kirkwood to hang. It was rather the
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