On Jul 5, 2013, at 1:27 AM,
wrote:
> From: Hongbo Zhang
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
> the device tree nodes for them.
>
> Signed-off-by: Hongbo Zhang
> ---
> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 90 +++
On Jul 5, 2013, at 1:27 AM,
wrote:
> From: Hongbo Zhang
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
> the device tree nodes for them.
>
> Signed-off-by: Hongbo Zhang
> ---
> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 90 +++
On May 30, 2013, at 2:21 PM, Mike Turquette wrote:
> Quoting Mike Turquette (2013-05-30 11:57:32)
>> Quoting yuantian.t...@freescale.com (2013-05-22 01:22:19)
>>> From: Tang Yuantian
>>>
>>> The compatible string of clock is changed from *-2 to *-2.0
>>> on chassis 2. So updated it accordingly.
On Jan 23, 2013, at 1:21 AM, Vakul Garg wrote:
> This new property defines the era of the particular SEC version.
> The compatible property in device tree "crypto" node has been updated
> not to contain SEC era numbers.
>
> Signed-off-by: Vakul Garg
> ---
> Changelog:
> 1. Marked fsl,sec-
On Dec 3, 2012, at 7:36 AM, Wei Yongjun wrote:
> From: Wei Yongjun
>
> Use for_each_compatible_node() macro instead of open coding it.
>
> Signed-off-by: Wei Yongjun
> ---
> arch/powerpc/platforms/85xx/mpc85xx_mds.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
applied to next
-
On Dec 7, 2012, at 2:57 AM, Vakul Garg wrote:
> This reverts commit a2c0911c09190125f52c9941b9d187f601c2f7be.
>
> Signed-off-by: Vakul Garg
> ---
> Instead of adding SEC era information in crypto node's compatible, a new
> property 'fsl,sec-era' is being introduced into crypto node.
>
> .../de
On Nov 19, 2012, at 10:31 PM, Tushar Behera wrote:
> The third argument for of_get_property() is a pointer, hence pass
> NULL instead of 0.
>
> Signed-off-by: Tushar Behera
> ---
> arch/powerpc/platforms/85xx/p1022_ds.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
applied to ne
On Sep 20, 2012, at 5:10 PM, Benjamin Herrenschmidt wrote:
> Hi folks !
>
> The reserve map is, imho, my biggest mistake when coming up with the FDT
> format.
>
> The main problem is that it doesn't survive the transition via a real
> Open Firmware interface. There is no practical way to indica
On Mar 21, 2012, at 11:54 PM, Prabhakar Kushwaha wrote:
> BSC9131RDB is a Freescale reference design board for BSC9131 SoC.The BSC9131
> is integrated SoC that targets Femto base station market. It combines Power
> Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F
> bas
On May 24, 2012, at 4:08 AM,
wrote:
> From: Tang Yuantian
>
> The p1024rdb has the similar feature as the p1020rdb. Therefore, p1024rdb use
> the same platform file as the p1/p2 rdb board.
> Overview of P2020RDB platform
> - DDR3 1G
> - NOR flash 16M
> - 3 Ethernet interfac
On May 24, 2012, at 4:08 AM,
wrote:
> From: Tang Yuantian
>
> Signed-off-by: Jin Qing
> Signed-off-by: Li Yang
> Signed-off-by: Tang Yuantian
> ---
> arch/powerpc/boot/dts/p1024rdb.dtsi| 228
> arch/powerpc/boot/dts/p1024rdb_32b.dts | 87
On Apr 1, 2012, at 1:56 AM, Jia Hongtao wrote:
> If PCI is primary bus we should set isa_io/mem_base when parsing PCI bridge
> resources from device tree. The previous way to check the primary bus based
> on a hard-coded address named primary_phb_addr. Now we add a property named
> "fsl,has-isa"
On Mar 19, 2012, at 8:02 PM, Poonam Aggrwal wrote:
> This TDM controller is available in various Freescale SOCs like MPC8315,
> P1020,
> P1022, P1010.
>
> Signed-off-by: Sandeep Singh
> Signed-off-by: Poonam Aggrwal
> ---
> Changes in v2:
> - Incorporated Scott's Review comments
> Docum
On Mar 21, 2012, at 12:29 PM, Kushwaha Prabhakar-B32579 wrote:
>>
>>
>> [snip]
>>
>
> ??
> Not getting you..
Just meant, I was removing parts of the patch in the email to reduce things.
>
>>> diff --git a/arch/powerpc/platforms/85xx/bsc913x_rdb.c
>>> b/arch/powerpc/platforms/85xx/bsc913x_r
On Mar 17, 2012, at 3:39 AM, Prabhakar Kushwaha wrote:
> BSC9131RDB is a Freescale reference design board for BSC9131 SoC.The BSC9131
> is
> integrated SoC that targets Femto base station market. It combines Power
> Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F
> b
Guys,
Are you aware of any reason that we can't call of_platform_bus_probe() or
multiple times. Timur's run into an issue in which all devices don't get
registered properly if we call of_platform_bus_probe() times with different
of_device_id struct's.
- k
_
>
>
> diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi
> b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
> new file mode 100644
> index 000..d274c014
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
> @@ -0,0 +1,179 @@
> +/*
> + * BSC9131 RDB Device Tree Source stub (no addresses or t
On Jan 17, 2012, at 11:40 PM, Ramneek Mehresh wrote:
> Add usb controller version info for the following:
> MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,
> P3041, P3060, P5020
>
> Signed-off-by: Ramneek Mehresh
> ---
> Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/p
On Jan 17, 2012, at 11:50 PM, Ramneek Mehresh wrote:
> Enable USB2 controller node for P1020RDB. USB2 controller is used only
> when board boots from SPI or SD as it is muxed with eLBC
>
> Signed-off-by: Ramneek Mehresh
> ---
> Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powe
On Jan 18, 2012, at 12:48 AM, Ramneek Mehresh wrote:
> Add usb2 controller node for P1020RDB, P2020RDB, P2020DS, P1021MDS
>
> Signed-off-by: Ramneek Mehresh
> ---
> Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> (branch next)
>
> arch/powerpc/boot/dts/p1020rdb.dts
On Jan 12, 2012, at 3:55 AM, Julia Lawall wrote:
> From: Julia Lawall
>
> Add missing iounmap in error handling code, in a case where the function
> already preforms iounmap on some other execution path.
>
> A simplified version of the semantic match that finds this problem is as
> follows: (h
We have some scenarios in which we might have 2 different drivers (one in
kernel or one user space as an example) and wanted to see how we'd convey in
the device tree which driver should "claim" the specific device instance.
>From glancing at the OF specs it seems we could utilize the precedence
On Dec 22, 2011, at 10:25 AM, Kyle Moffett wrote:
> The MPIC code checks for a "big-endian" property and sets the flag
> MPIC_BIG_ENDIAN if one is present. Unfortunately, the PowerQUICC-III
> compatible device-tree does not specify it, so all of the board ports
> need to manually set that flag w
On Dec 8, 2011, at 10:58 AM, Cousson, Benoit wrote:
> On 12/8/2011 5:07 PM, Kumar Gala wrote:
>> Seen a lot of ARM& TI OMAP discussions on this list. I was
>> wondering if the DSPs on any devices that have ARM + DSP are
>> represented in the device trees yet.
>
Seen a lot of ARM & TI OMAP discussions on this list. I was wondering if the
DSPs on any devices that have ARM + DSP are represented in the device trees yet.
If so can someone point me at an example.
thanks
- k
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On Oct 25, 2011, at 6:36 PM, David Gibson wrote:
> On Tue, Oct 25, 2011 at 08:41:55AM -0500, Kumar Gala wrote:
>>
>> On Oct 25, 2011, at 7:18 AM, Yoder Stuart-B08248 wrote:
>>
>>>
>>>
>>>> -Original Message-
>>>>
alf Of
>> David Gibson
>> Sent: Monday, October 24, 2011 6:15 PM
>> To: Kumar Gala
>> Cc: devicetree-discuss
>> Subject: Re: dec behavior question
>>
>> On Mon, Oct 24, 2011 at 09:01:49AM -0500, Kumar Gala wrote:
>>> If I have something li
On Oct 24, 2011, at 6:15 PM, David Gibson wrote:
> On Mon, Oct 24, 2011 at 09:01:49AM -0500, Kumar Gala wrote:
>> If I have something like:
>>
>> ---
>> spi.dtsi:
>>
>> &spi0 {
>>#address-cells = <1
If I have something like:
---
spi.dtsi:
&spi0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc8536-espi";
reg = <0x7000 0x1000>;
interrupts = <59 0x2 0 0>;
};
---
foo.d
On Oct 20, 2011, at 4:05 PM, Timur Tabi wrote:
> Kumar Gala wrote:
>>>> How about we put all serial devices into one pq3-duart.dtsi file, and
>>>> let the parent dtsi file reference just the ones that it needs?
>> there isn't an option to do that w/dt
On Oct 20, 2011, at 11:28 AM, Tabi Timur-B04825 wrote:
> On Thu, Oct 20, 2011 at 2:24 AM, Kumar Gala wrote:
>>
>> arch/powerpc/boot/dts/p1020soc.dtsi | 262
>> +++
>
> All of the other dtsi files are of the format "___si
On Oct 20, 2011, at 11:42 AM, Tabi Timur-B04825 wrote:
> Ok, your other patch makes more sense now.
>
> On Thu, Oct 20, 2011 at 2:24 AM, Kumar Gala wrote:
>
>> +++ b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
>> @@ -0,0 +1,8 @@
>> +&se
Create a P1020 SoC dts stub that can be included by a board that
utilizes the P1020 SoC. The board can amend any board specific
configuration or paramaters (like locaation of CCSRBAR, PCIe
controllers, I2C components, ethernet PHY information, etc.)
Signed-off-by: Kumar Gala
---
arch/powerpc
Introduce some common components that we can utilize to build up the
various PQ3/85xx device trees.
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi| 32 +++
arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi |8 ++
arch/powerpc/boot/dts/fsl
On Sep 29, 2011, at 7:32 PM, Grant Likely wrote:
> On Thu, Sep 29, 2011 at 04:31:12PM -0400, David Miller wrote:
>> From: David Daney
>> Date: Tue, 27 Sep 2011 16:26:52 -0700
>>
>>> v2: Update bindings to use "reg" and "mdio-parent-bus" insutead of
>>>"cell-index" and "parent-bus"
>>
>> Gr
On Sep 15, 2011, at 1:04 PM, Timur Tabi wrote:
> Standarize and document the FPGA nodes used on Freescale QorIQ reference
> boards. There are different kinds of FPGAs used on the boards, but
> only two are currently standard: "pixis", "ngpixis", and "qixis". Although
> there are minor differenc
On Sep 15, 2011, at 12:51 PM, Timur Tabi wrote:
> Gala Kumar-B11780 wrote:
>> I pulling the p3060qds bit out so drop that change from next patch.
>>
>
> Ok, I'm thinking it should look like this:
>
> compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis";
Right, I pulled those bits out of y
On Sep 14, 2011, at 4:42 PM, Timur Tabi wrote:
> Standarize and document the FPGA nodes used on Freescale QorIQ reference
> boards. There are different kinds of FPGAs used on the boards, but
> only two are currently standard: "pixis" and "qixis". Although there are
> minor differences among the
On Sep 13, 2011, at 6:23 PM, David Daney wrote:
> On 09/13/2011 04:07 PM, Kumar Gala wrote:
>>
>>> diff --git a/Documentation/devicetree/bindings/net/mdio-mux.txt
>>> b/Documentation/devicetree/bindings/net/mdio-mux.txt
>>> new file mode 100644
>>
> diff --git a/Documentation/devicetree/bindings/net/mdio-mux.txt
> b/Documentation/devicetree/bindings/net/mdio-mux.txt
> new file mode 100644
> index 000..a908312
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/mdio-mux.txt
> @@ -0,0 +1,132 @@
> +Common MDIO bus multiplexer/sw
Do we have a utility that can diff two device trees. What I'm looking for is
something that has some context awareness. It can deal with (p)handle values
being different, properties in a node in different order, etc.
thanks
- k
___
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From: Stephen George
Adding new device tree binding file for the DCSR node. Modifying device
tree dtsi files to add DCSR node for P2041, P3041, P3060, P4080, & P5020.
Signed-off-by: Stephen George
Signed-off-by: Kumar Gala
---
v2:
* include dscr.txt binding spec
* moved around dcsr node
From: Stephen George
Adding new device tree binding file for the DCSR node. Modifying device
tree dtsi files to add DCSR node for P2041, P3041, P3060, P4080, & P5020.
Signed-off-by: Stephen George
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/p2041rdb.dts |4 ++
arch/powerpc/
On Aug 30, 2011, at 10:01 PM, Tabi Timur-B04825 wrote:
> Kumar Gala wrote:
>>
>> On Aug 30, 2011, at 9:51 PM, Tabi Timur-B04825 wrote:
>>
>>> Kumar Gala wrote:
>>>> Do we really want the generic "fsl,fpga-cpld"& "fsl,fpga-p
On Aug 30, 2011, at 9:51 PM, Tabi Timur-B04825 wrote:
> Kumar Gala wrote:
>> Do we really want the generic "fsl,fpga-cpld"& "fsl,fpga-pixis"? This
>> seems to vague.
>
> Yes, the PIXIS is generally register compatible across all boards. There
On Aug 29, 2011, at 2:09 PM, Timur Tabi wrote:
> Standarize and document the FPGA nodes used on Freescale QorIQ reference
> boards. There are three kinds of FPGAs used on the boards: pixis, qixis, and
> cpld. Although their are minor differences among the boards that have one
> kind of FPGA, mo
platform/mach code for the clock frequency associated
>> with the flexcan device.
>
> nitpicking follows inline:
>
>> Signed-off-by: Robin Holt
>> To: Kumar Gala
>> To: Wolfgang Grandegger ,
>> To: Marc Kleine-Budde ,
>> To: U Bhaskar-B22300
>>
On Aug 9, 2011, at 3:59 PM, Robin Holt wrote:
> I guess my poor wording may have gotten me in trouble. I am getting
> ready to repost this patch, but I want to ensure I am getting it as
> right as possible.
>
> I think I should reword the commit message to indicate we are removing
> the Documen
On Aug 4, 2011, at 5:36 AM, David Brown wrote:
> Add uncached mappings from devicetree nodes similar to regular io
> mappings.
>
> SPARC is coherent, so there this call is the same as regular of_iomap.
>
> Cc: David Miller
> Signed-off-by: David Brown
> ---
> v2 - Add implementation for SPARC
On Jun 23, 2011, at 2:24 AM, Aggrwal Poonam-B10812 wrote:
>
>
>> -Original Message-
>> From: linuxppc-dev-bounces+poonam.aggrwal=freescale@lists.ozlabs.org
>> [mailto:linuxppc-dev-
>> bounces+poonam.aggrwal=freescale@lists.ozlabs.org] On B
Grant
Any reason you haven't put in aliases into the .dtsi as well?
- k
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On Jun 7, 2011, at 9:49 PM, Prabhakar Kushwaha wrote:
> ten-bit interface (TBI) module is part of SoC not board.
>
> Move tbi entries from board related dts files to Si dts.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
> Based upon http://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.gi
On May 31, 2011, at 8:17 AM, Dmitry Eremin-Solenikov wrote:
> Hello,
>
> Long time ago (around July of 2010), I've reported a problem of binding
> pci error reporting driver to the hardware (See
> http://thread.gmane.org/gmane.linux.kernel.edac/181). Grant Likely has
> come with a patch to creat
On May 19, 2011, at 1:38 AM, Dipen Dudhat wrote:
> Signed-off-by: Dipen Dudhat
> Acked-By: Scott Wood
> ---
> Based upon
> git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git (branch
> -> master)
> .../devicetree/bindings/powerpc/fsl/ifc.txt| 76
On Apr 7, 2011, at 4:10 AM, Prabhakar Kushwaha wrote:
> Creates P1020si.dtsi, containing information for the P1020 SoC. Modifies dts
> files for P1020 based systems to use dtsi file
>
> Signed-off-by: Prabhakar Kushwaha
> Acked-by: Kumar Gala
> ---
> Based upon
> git:
On Apr 28, 2011, at 2:00 AM, Prabhakar Kushwaha wrote:
> Create the dts files for each core and splits the devices between the two
> cores
> for P1020RDB.
>
> Core0 has core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, eth1, eth2,
> sdhc, crypto, global-util, message, pci0, pci1, msi.
>
On Apr 19, 2011, at 11:12 PM, Prabhakar Kushwaha wrote:
> PCIe device in legacy mode can trigger interrupts using the wires #INTA, #INTB
> ,#INTC and #INTD. PCI devices are obligated to use #INTx for interrupts under
> legacy mode. Each PCI slot or device is typically wired to different inputs
On Apr 8, 2011, at 7:27 AM, Prabhakar Kushwaha wrote:
> Creates P2020si.dtsi, containing information for P2020 SoC. Modifies dts files
> for P2020 based systems to use dtsi file.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
> Based upon
> git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/l
On Apr 19, 2011, at 8:58 AM, Bhaskar Upadhaya wrote:
> From: Bhaskar Upadhaya
>
> Signed-off-by: Bhaskar Upadhaya
> Acked-By: Scott Wood
> ---
> Based upon
> git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git (branch
> -> master)
>
> .../devicetree/bindings/net/can/fsl-fl
On Mar 24, 2011, at 4:43 PM, Scott Wood wrote:
> Add support for MPIC timers as requestable interrupt sources.
>
> Based on http://patchwork.ozlabs.org/patch/20941/ by Dave Liu.
>
> Signed-off-by: Dave Liu
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/include/asm/mpic.h |3 +-
> arch/po
On Mar 24, 2011, at 4:43 PM, Scott Wood wrote:
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/include/asm/mpic.h |2 ++
> arch/powerpc/sysdev/mpic.c | 37 -
> 2 files changed, 38 insertions(+), 1 deletions(-)
applied to next
- k
__
On Mar 24, 2011, at 4:43 PM, Scott Wood wrote:
> There is no hardware interrupt 0xf7. But now we can express the timer
> interrupt using 4-cell interrupts. This requires converting all of the
> other interrupt specifiers in the tree as well.
>
> Also add the second timer group, and fix the reg
On Mar 24, 2011, at 4:43 PM, Scott Wood wrote:
> Update the existing example in the general mpic binding to have a
> separate TCRx region. Currently the example doesn't describe TCRx at
> all. The one upstream device tree with an mpic timer node (p1022ds)
> uses one large reg region to describe
[Adding proper lists on CC]
- k
On Mar 30, 2011, at 3:07 AM, Kumar Gala wrote:
> Grant,
>
> We have a few helper functions like:
>
> drivers/of/base.c:EXPORT_SYMBOL(of_device_is_compatible);
> drivers/of/base.c:EXPORT_SYMBOL(of_find_compatible_node);
>
> That we
Grant,
We have a few helper functions like:
drivers/of/base.c:EXPORT_SYMBOL(of_device_is_compatible);
drivers/of/base.c:EXPORT_SYMBOL(of_find_compatible_node);
That we use in places like arch/powerpc/platform/85xx/mpc85xx_ds.c:
for_each_node_by_type(np, "pci") {
if (of_d
On Oct 17, 2010, at 9:51 AM, Vasiliy Kulikov wrote:
> sram_params.sram_size and sram_params.sram_offset were unsigned.
> If get_cache_sram_size() or get_cache_sram_offset() returns error code
> then it is not seen to the caller. Made sram_size and sram_offset signed.
>
> Signed-off-by: Vasiliy
On Jan 17, 2011, at 2:25 PM, Scott Wood wrote:
> Now handles multiple ranges, doesn't make assumptions about interrupt
> specifier format, and doesn't claim interrupts that don't correspond to an
> available range.
>
> Also has some better error checking.
>
> The device tree binding is updated
On Jan 19, 2011, at 4:30 PM, Stuart yoder wrote:
> From: Stuart Yoder
>
> define the binding for compatible = "fsl,mpic", including
> the definition of 4-cell interrupt specifiers. The
> 3rd and 4th cells are needed to define additional
> types of interrupt source outside the "normal"
> extern
On Aug 31, 2010, at 10:48 AM, Julia Lawall wrote:
> Add a call to of_node_put in the error handling code following a call to
> of_find_compatible_node or of_find_node_by_type.
>
> This patch also substantially reorganizes the error handling code in the
> function, to that it is possible first to
On Feb 2, 2011, at 7:51 PM, Meador Inge wrote:
> This patch set provides a binding for Open PIC and implements support for
> a new property, specified by that binding, called 'no-reset'. With 'no-reset'
> in place the 'protected-sources' property is no longer needed and was removed.
>
> Signed-
On Nov 17, 2010, at 1:15 PM, Stephen Neuendorffer wrote:
> Currently, fdt blobs are handled solely at boot time. However,
> it may be useful to parse blobs into device trees after boot time. For
> instance, a PCIe device may have an FPGA which includes a device
> tree. This set of patche
On Aug 29, 2010, at 4:52 AM, Julia Lawall wrote:
> Add a call to of_node_put in the error handling code following a call to
> of_find_compatible_node.
>
> The semantic match that finds this problem is as follows:
> (http://coccinelle.lip6.fr/)
>
> //
> @r exists@
> local idexpression x;
> expr
On Aug 29, 2010, at 2:47 PM, Julia Lawall wrote:
> The function of_iomap returns the result of calling ioremap, so iounmap
> should be called on the result in the error handling code, as done in the
> normal exit of the function.
>
> The sematic match that finds this problem is as follows:
> (ht
On Aug 17, 2010, at 4:03 PM, Scott Wood wrote:
> On Tue, 17 Aug 2010 15:55:04 -0500
> Kumar Gala wrote:
>
>> As I said to Stuart. On the Freescale SOCs we have different device
>> blocks w/varying dma address capabilities. Some are limited to 32-bits
>> some ar
On Aug 16, 2010, at 3:17 PM, Mitch Bradley wrote:
> Kumar Gala wrote:
>> Do we or should we have a standard property to convey that address width a
>> device is capable of?
>>
>
> What is the context? When Open Firmware was first developed, the only bus
>
On Aug 17, 2010, at 3:50 PM, Yoder Stuart-B08248 wrote:
>
>
>> -Original Message-----
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Monday, August 16, 2010 11:02 AM
>> To: devicetree-discuss
>> Cc: Yoder Stuart-B08248
>> Subje
Do we or should we have a standard property to convey that address width a
device is capable of?
- k
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On May 3, 2010, at 1:26 AM, Richard Cochran wrote:
> On Sat, May 01, 2010 at 11:36:12AM -0500, Kumar Gala wrote:
>> Is there a binding document that describes this node you are adding?
>
> No, but I will add one to Documentation/powerpc/dts-bindings.
Please do so we can rev
On Apr 29, 2010, at 4:20 AM, Richard Cochran wrote:
> The eTSEC includes a PTP clock with quite a few features. This patch adds
> support for the basic clock adjustment functions.
>
> Signed-off-by: Richard Cochran
> ---
> arch/powerpc/boot/dts/mpc8313erdb.dts | 14 ++
> arch/powerpc/boot/dts/
On Feb 26, 2010, at 5:07 PM, John Linn wrote:
> Hi all,
>
> We are in the process of putting PCI/PCIe into the microblaze
> architecture.
>
> In order to not duplicate/fork the PCI code in Powerpc, we're proposing
> to move the PCI code from arch/powerpc into drivers/of such that it
> would b
On Nov 17, 2009, at 9:42 AM, Dmitry Eremin-Solenikov wrote:
> Signed-off-by: Dmitry Eremin-Solenikov
> ---
> arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c | 11 +--
> 1 files changed, 5 insertions(+), 6 deletions(-)
Minding reviewing for me.
- k
>
> diff --git a/arch/powerpc/platfo
On Aug 12, 2009, at 6:19 AM, Josh Boyer wrote:
On Wed, Aug 12, 2009 at 05:57:05PM +1000, Benjamin Herrenschmidt
wrote:
Hi folks !
(Russell, let us know if you want to dropped from the CC list, but I
felt you may have some useful input to provide here).
So I think it would be valuable to pro
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