Re: [RESEND PATCH v7 00/22] MBus DT binding: The return of PCIe

. It looks like there are none with PCIe support. So only Kirkwood is broken. There are some Dove and Orion5x with PCIe support, but none of them are using the new PCIe driver yet. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development

Re: [PATCH 00/10] Orion Watchdog fixes

. But Ezequiel will confirm all that, we had a discussion together about this yesterday, so I guess what I said should be the plan, but it's better if Ezequiel confirms, obviously :) Thanks! Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting

Re: [PATCH 2/5] iio: at91: Use different prescal, startup mask in MR for different IP

and during the reviews, but the maintainer wasn't listening to our comments... Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH 2/5] iio: at91: Use different prescal, startup mask in MR for different IP

Dear Jonathan Cameron, On Tue, 16 Jul 2013 20:03:38 +0100, Jonathan Cameron wrote: On 07/16/2013 12:30 PM, Thomas Petazzoni wrote: I've asked exactly this question last week at Linaro Connect during the ARM SoC consolidation panel/discussion, where Grant Likely, Arnd Bergmann, Olof

[RFC PATCH 0/3] Add DT support for fixed PHYs

are welcome. Thanks! Thomas [1] http://www.spinics.net/lists/netdev/msg242766.html http://www.spinics.net/lists/netdev/msg243192.html Thomas Petazzoni (3): of: provide a binding for the 'fixed-link' property net: phy: call mdiobus_scan() after adding a fixed PHY net: mvneta: add support for fixed

[RFC PATCH 1/3] of: provide a binding for the 'fixed-link' property

indicated that this fixed-link property is indeed the way to go. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- .../devicetree/bindings/net/fixed-link.txt | 26 drivers/of/of_mdio.c | 36 +++--- include

[RFC PATCH 2/3] net: phy: call mdiobus_scan() after adding a fixed PHY

-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- drivers/net/phy/fixed.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c index ba55adf..bd1e67a 100644 --- a/drivers/net/phy/fixed.c +++ b/drivers/net/phy/fixed.c @@ -195,6 +195,8 @@ int

[RFC PATCH 3/3] net: mvneta: add support for fixed links

Following the introduction of of_phy_register_fixed_link(), this patch introduces fixed link support in the mvneta driver, for Marvell Armada 370/XP SOCs. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- .../bindings/net/marvell-armada-370-neta.txt | 24

Re: Fixed PHY Device Tree usage?

and gianfar Ethernet drivers. Do * not call this function from new drivers. Also, it would probably be good to have a few more helpers to make parsing the phy and fixed-link property easier for network drivers. Thanks for your feedback, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers

Re: Fixed PHY Device Tree usage?

= ...; ... phy = phy1; }; }; How will the fixed PHY driver know that it should instantiate phy@0 and phy@1 as PHY devices? Thanks, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting

Re: Fixed PHY Device Tree usage?

themselves. My question is really the one described above. Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list

Re: Fixed PHY Device Tree usage?

; ... }; ethernet@1 { phy = phy1; ... }; }; or do you have in mind another representation? Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting

Re: Fixed PHY Device Tree usage?

will have property 'foo' is not sufficient. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list

Re: [PATCH V3 2/3] clocksource: mmp: support CLOCKSOURCE OF DECLARE

++- 3 files changed, 5 insertions(+), 18 deletions(-) Maybe it would be good to take this opportunity to move arch/arm/mach-mmp/time.c into drivers/clocksource/. Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training

Re: [PATCH v6 00/21] MBus DT binding: PCIe strikes back

interfaces. *) The target and attribute values for MEM and I/O windows, that are per-PCIe interface. As long as we can get those two informations from the DT, I believe we're open to all your suggestions on how to encode them. Thanks! Thomas -- Thomas Petazzoni, Free Electrons Kernel

Re: [PATCH v6 00/21] MBus DT binding: PCIe strikes back

). Arnd, Jason, if you could confirm that you both agree with this DT binding soon, Ezequiel and I would quickly adapt the code accordingly, and hopefully converge towards a final patch set. Thanks! Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux

Re: [PATCH V10 0/4] PCIe support for Samsung Exynos5440 SoC

that Arnd/Olof can make sure the ordering is correct with regard to the of/pci changes and the mvebu/pci driver. I'll let you discuss that with Jason Cooper. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training

Re: [PATCH V6 3/3] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC

Dear Jingoo Han, On Thu, 20 Jun 2013 16:12:24 +0900, Jingoo Han wrote: - pinctrl { + pin_ctrl: pinctrl { compatible = samsung,exynos5440-pinctrl; I know I'm nitpicking, but isn't this change completely unrelated to PCIe support? Thomas -- Thomas Petazzoni, Free

Re: [PATCH V6 3/3] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC

as it is more a fix than really the introduction of the PCIe controller node, as the patch title suggests. This would also for example allow this fix to be merged right now (for 3.11), regardless of what happens for the rest of your PCIe patches. Best regards, Thomas -- Thomas Petazzoni, Free

Re: [PATCH v3 03/12] bus: mvebu-mbus: Add static window allocation to the DT binding

then dynamically assigns sub-ranges for each PCIe device into those two global ranges. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH v3 11/12] ARM: mvebu: Relocate Armada 370 PCIe device tree nodes

up to re-explain this to you over-and-over again. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss

Re: [PATCH v3 11/12] ARM: mvebu: Relocate Armada 370 PCIe device tree nodes

for PCIe devices will not work? Where did I suggest static windows for PCIe devices? Where does your new proposal buys us anything useful compared to the existing PCIe DT binding that has been discussed at length with you? Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time

Re: [PATCH v3 4/6] ARM: kirkwood: move device tree nodes to DT irqchip and clocksource

to BRIDGE_CAUSE and RSTOUTn_MASK. Ideas? Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list devicetree

Re: [PATCH 01/14] bus: mvebu-mbus: Use pr_fmt

...@free-electrons.com Acked-by: Thomas Petazzoni thomas.petazz...@free-electrons.com I believe this one could be applied regardless of what happens to the rest of the patch series. Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting

Re: [PATCH 12/14] ARM: mvebu: Remove device tree unused properties on A370

Dear Ezequiel Garcia, On Fri, 7 Jun 2013 13:47:49 -0300, Ezequiel Garcia wrote: These properties are not needed so it's safe to remove them. Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com Acked-by: Thomas Petazzoni thomas.petazz...@free-electrons.com I believe this one

Re: [Arm-netbook] getting allwinner SoC support upstream (was Re: Uploading linux (3.9.4-1))

, completely Device Tree based. So isn't this entire discussion completely moot? The mainline support for sunxi has already started since 6 months or so, and has been Device Tree based from day one. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded

Re: getting allwinner SoC support upstream (was Re: Uploading linux (3.9.4-1))

SoCs), it's at drivers/pinctrl/pinctrl-sunxi.c, and it's DT-based and allows to describe the pin muxing in the Device Tree. Cc'ing Maxime Ripard, who is the mach-sunxi maintainer in the mainline kernel. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time

Re: [PATCH 10/10] arm: add basic support for Rockchip RK3066a boards

does have a Makefile.boot, even though I believe it is not needed. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCH -next] pci: mvebu: fix return value check in mvebu_pcie_probe()

-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn Acked-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Jason, this needs to be in the mvebu/pcie branch, so I'll guess you would have to rebase mvebu/pcie_bridge on top of it. Thanks! Thomas -- Thomas Petazzoni, Free Electrons Kernel

Re: [PATCHv9 5/9] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370

Dear Mike Turquette, On Wed, 15 May 2013 14:41:54 -0700, Mike Turquette wrote: Quoting Thomas Petazzoni (2013-05-15 06:25:19) The Armada 370 has two gatable clocks for each PCIe interface, and we want both of them to be enabled. We therefore make one of the two clocks a child of the other

Re: [PATCHv9 7/9] pci: PCIe driver for Marvell Armada 370/XP systems

the warning, since I'm building CONFIG_MODULES=y). The two other functions are more cosmetic, but good to have as well. It would already been sent if git hadn't decided to do a 'git gc' right after my rebase. It's been gc-ing for quite some time now... Thomas -- Thomas Petazzoni, Free Electrons Kernel

[PATCHv10 0/9] PCIe support for the Armada 370 and Armada XP SoCs

on Armada 370 Thanks, Thomas Andrew Murray (1): of/pci: Provide support for parsing PCI DT ranges property Thierry Reding (2): of/pci: Add of_pci_get_devfn() function of/pci: Add of_pci_parse_bus_range() function Thomas Petazzoni (6): arm: mvebu: fix the 'ranges' property to handle PCIe clk

[PATCHv10 1/9] arm: mvebu: fix the 'ranges' property to handle PCIe

. However, beyond just the register areas, there are also PCIe I/O and memory regions, whose addresses should be properly translated. This patch fixes the Armada 370 and XP ranges property to take PCIe into account properly. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com

[PATCHv10 2/9] of/pci: Provide support for parsing PCI DT ranges property

them into a single range (as was the case with powerpc and microblaze). Signed-off-by: Andrew Murray andrew.mur...@arm.com Signed-off-by: Liviu Dudau liviu.du...@arm.com Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Reviewed-by: Rob Herring rob.herr...@calxeda.com Tested

[PATCHv10 3/9] of/pci: Add of_pci_get_devfn() function

Reding thierry.red...@avionic-design.de Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- drivers/of/of_pci.c| 34 +- include/linux/of_pci.h |1 + 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/drivers/of/of_pci.c b

[PATCHv10 8/9] arm: mvebu: PCIe support is now available on mvebu

Now that the PCIe driver for mvebu has been integrated and all its relevant dependencies, we can mark the ARCH_MVEBU platform has MIGHT_HAVE_PCI, which allows to select the PCI bus support if needed. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/mach-mvebu

[PATCHv10 7/9] pci: PCIe driver for Marvell Armada 370/XP systems

bridge, with one PCI-to-PCI bridge as child for each hardware PCIe interface. In addition, this driver enumerates the different PCIe slots, and for those having a device plugged in, it sets up the necessary address decoding windows, using the mvebu-mbus driver. Signed-off-by: Thomas Petazzoni

[PATCHv10 9/9] arm: mvebu: update defconfig with PCI and USB support

-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/configs/mvebu_defconfig |3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index f3e8ae0..966281e 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch

[PATCHv10 4/9] of/pci: Add of_pci_parse_bus_range() function

From: Thierry Reding thierry.red...@avionic-design.de This function can be used to parse a bus-range property as specified by device nodes representing PCI bridges. Signed-off-by: Thierry Reding thierry.red...@avionic-design.de --- drivers/of/of_pci.c| 25 +

Re: [PATCHv9 7/9] pci: PCIe driver for Marvell Armada 370/XP systems

on which to do my kernel work. Thanks, Kranky Kernel Developer hehehe... Adding boss in the Cc list :-) Thanks! Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

[PATCHv9 1/9] arm: mvebu: fix the 'ranges' property to handle PCIe

. However, beyond just the register areas, there are also PCIe I/O and memory regions, whose addresses should be properly translated. This patch fixes the Armada 370 and XP ranges property to take PCIe into account properly. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com

[PATCHv9 2/9] of/pci: Provide support for parsing PCI DT ranges property

them into a single range (as was the case with powerpc and microblaze). Signed-off-by: Andrew Murray andrew.mur...@arm.com Signed-off-by: Liviu Dudau liviu.du...@arm.com Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Reviewed-by: Rob Herring rob.herr...@calxeda.com Tested

[PATCHv9 0/9] PCIe support for the Armada 370 and Armada XP SoCs

() function Thomas Petazzoni (6): arm: mvebu: fix the 'ranges' property to handle PCIe clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 clk: mvebu: add more PCIe clocks for Armada XP pci: PCIe driver for Marvell Armada 370/XP systems arm: mvebu: PCIe support

[PATCHv9 3/9] of/pci: Add of_pci_get_devfn() function

Reding thierry.red...@avionic-design.de Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- drivers/of/of_pci.c| 34 +- include/linux/of_pci.h |1 + 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/drivers/of/of_pci.c b

[PATCHv9 4/9] of/pci: Add of_pci_parse_bus_range() function

From: Thierry Reding thierry.red...@avionic-design.de This function can be used to parse a bus-range property as specified by device nodes representing PCI bridges. Signed-off-by: Thierry Reding thierry.red...@avionic-design.de --- drivers/of/of_pci.c| 25 +

[PATCHv9 5/9] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370

The Armada 370 has two gatable clocks for each PCIe interface, and we want both of them to be enabled. We therefore make one of the two clocks a child of the other, as we did for the sataX and sataXlnk clocks on Armada XP. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc

[PATCHv9 6/9] clk: mvebu: add more PCIe clocks for Armada XP

for those PCIe interfaces. It also changes the name of the previously existing PCIe gatable clocks, in order to match the naming using the datasheets. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc: Mike Turquette mturque...@linaro.org --- drivers/clk/mvebu/clk-gating-ctrl.c

[PATCHv9 7/9] pci: PCIe driver for Marvell Armada 370/XP systems

bridge, with one PCI-to-PCI bridge as child for each hardware PCIe interface. In addition, this driver enumerates the different PCIe slots, and for those having a device plugged in, it sets up the necessary address decoding windows, using the mvebu-mbus driver. Signed-off-by: Thomas Petazzoni

[PATCHv9 8/9] arm: mvebu: PCIe support is now available on mvebu

Now that the PCIe driver for mvebu has been integrated and all its relevant dependencies, we can mark the ARCH_MVEBU platform has MIGHT_HAVE_PCI, which allows to select the PCI bus support if needed. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/mach-mvebu

[PATCHv9 9/9] arm: mvebu: update defconfig with PCI and USB support

-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/configs/mvebu_defconfig |3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index f3e8ae0..966281e 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch

Re: [PATCH v3 5/7] ARM: kirkwood: remove legacy mv643xx_eth board setup

! Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https

Re: [PATCH v6 0/3] of/pci: Provide common support for PCI DT parsing

just sent a new version v7 of the patch set addressing those issues, as well as the missing include. Also, please note that Andrew's patch set contains three patches, but the Marvell PCIe driver only requires PATCH 1/3 and PATCH 2/3. Best regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel

Re: [PATCH 0/5 v2] mv643xx_eth: device tree bindings

, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https

Re: [PATCH v6 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

...@calxeda.com Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/microblaze/include/asm/pci-bridge.h |5 +- arch/microblaze/pci/pci-common.c | 192 arch/powerpc/include/asm/pci-bridge.h|5 +- arch/powerpc/kernel/pci-common.c

Re: [PATCHv8 00/19] PCIe support for the Armada 370 and Armada XP SoCs

of my PCIe patch set based on the v6 of Andrew, or you can directly use PATCH 1,2,3 from Andrew series to replace PATCH 1,2,3 from my series. Andrew v6 has quite a number of changes compared to v5, so I really recommend using those ones. Thanks! Thomas -- Thomas Petazzoni, Free Electrons Kernel

Re: [PATCHv8 00/19] PCIe support for the Armada 370 and Armada XP SoCs

PATCH 1,2,3 from my series. Andrew v6 has quite a number of changes compared to v5, so I really recommend using those ones. No need to mess with v9, I'll pull AndrewM's v6. Excellent, thanks. Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux

Re: [PATCH 0/5 v2] mv643xx_eth: device tree bindings

merge it into mach-mvebu without any problem. So let's continue the cleanup work, conversion to DT, usage of drivers in drivers/, improvement of pinmux to support orion5x/mv78xx0, and do the move per-platform, once they are ready. What do you think? Thomas -- Thomas Petazzoni, Free Electrons Kernel

Re: [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

to be consistent with the rest of the file. Right, sounds good. Do we have some news from the PowerPC and Microblaze maintainers about their acceptance of PATCH 1/3 ? This of/pci thing is the only last remaining patch for which I need a Ack to get the Marvell PCIe merged. Thanks! Thomas -- Thomas Petazzoni

Re: [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

. Thanks a lot for your feedback, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list devicetree-discuss

Re: [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

, + struct device_node *dev, int primary); + #endif But otherwise, for PATCH 1/3 and 2/3, Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http

Re: [PATCHv7 08/17] pci: PCIe driver for Marvell Armada 370/XP systems

() so that we guarantee we don't have an I/O region that goes beyond IO_SPACE_LIMIT? Thanks, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

[PATCHv8 00/19] PCIe support for the Armada 370 and Armada XP SoCs

of/pci: mips: convert to common of_pci_range_parser Thierry Reding (2): of/pci: Add of_pci_get_devfn() function of/pci: Add of_pci_parse_bus_range() function Thomas Petazzoni (14): pci: infrastructure to add drivers in drivers/pci/host arm: pci: add a align_resource hook clk: mvebu

[PATCHv8 01/19] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

. Signed-off-by: Andrew Murray andrew.mur...@arm.com Signed-off-by: Liviu Dudau liviu.du...@arm.com Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc: mon...@monstr.eu Cc: b...@kernel.crashing.org Cc: pau...@samba.org Cc: Ralf Baechle r...@linux-mips.org --- arch/microblaze/include

[PATCHv8 02/19] of/pci: Provide support for parsing PCI DT ranges property

into a single range (as was the case with powerpc and microblaze). Signed-off-by: Andrew Murray andrew.mur...@arm.com Signed-off-by: Liviu Dudau liviu.du...@arm.com Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc: mon...@monstr.eu Cc: b...@kernel.crashing.org Cc: pau

[PATCHv8 03/19] of/pci: mips: convert to common of_pci_range_parser

From: Andrew Murray andrew.mur...@arm.com This patch converts the pci_load_of_ranges function to use the new common of_pci_range_parser. Signed-off-by: Andrew Murray andrew.mur...@arm.com Signed-off-by: Liviu Dudau liviu.du...@arm.com Signed-off-by: Thomas Petazzoni thomas.petazz...@free

[PATCHv8 04/19] of/pci: Add of_pci_get_devfn() function

Reding thierry.red...@avionic-design.de Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- drivers/of/of_pci.c| 34 +- include/linux/of_pci.h |1 + 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/drivers/of/of_pci.c b

[PATCHv8 06/19] pci: infrastructure to add drivers in drivers/pci/host

As agreed by the community, PCI host drivers will now be stored in drivers/pci/host. This commit adds this directory and the related Kconfig/Makefile changes to allow new drivers to be added in this directory. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Acked-by: Bjorn

[PATCHv8 07/19] arm: pci: add a align_resource hook

a align_resource() hook, and do its own specific alignement, depending on the specific constraints of the underlying hardware. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc: Russell King li...@arm.linux.org.uk --- arch/arm/include/asm/mach/pci.h | 11 +++ arch/arm/kernel/bios32

[PATCHv8 08/19] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370

The Armada 370 has two gatable clocks for each PCIe interface, and we want both of them to be enabled. We therefore make one of the two clocks a child of the other, as we did for the sataX and sataXlnk clocks on Armada XP. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc

[PATCHv8 09/19] clk: mvebu: add more PCIe clocks for Armada XP

for those PCIe interfaces. It also changes the name of the previously existing PCIe gatable clocks, in order to match the naming using the datasheets. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc: Mike Turquette mturque...@linaro.org --- drivers/clk/mvebu/clk-gating-ctrl.c

[PATCHv8 10/19] pci: PCIe driver for Marvell Armada 370/XP systems

-mvebu/addr-map.c. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Acked-by: Bjorn Helgaas bhelg...@google.com --- .../devicetree/bindings/pci/mvebu-pci.txt | 220 + drivers/pci/host/Kconfig |4 + drivers/pci/host/Makefile

[PATCHv8 11/19] arm: mvebu: PCIe support is now available on mvebu

Now that the PCIe driver for mvebu has been integrated and all its relevant dependencies, we can mark the ARCH_MVEBU platform has MIGHT_HAVE_PCI, which allows to select the PCI bus support if needed. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/mach-mvebu

[PATCHv8 12/19] arm: mvebu: add PCIe Device Tree informations for Armada 370

The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the necessary Device Tree informations to make these interfaces availabel. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/boot/dts/armada-370.dtsi | 51 + 1 file

[PATCHv8 13/19] arm: mvebu: add PCIe Device Tree informations for Armada XP

informations to make those PCIe interfaces usable. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 104 + arch/arm/boot/dts/armada-xp-mv78260.dtsi | 122 +++ arch/arm/boot/dts/armada-xp-mv78460.dtsi | 188

[PATCHv8 14/19] arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4

The PlatHome OpenBlocks AX3-4 has an internal mini-PCIe slot that can be used to plug mini-PCIe devices. We therefore enable the PCIe interface that corresponds to this slot. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts

[PATCHv8 15/19] arm: mvebu: PCIe Device Tree informations for Armada XP DB

The Marvell evaluation board (DB) for the Armada XP SoC has 6 physicals full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/boot/dts/armada-xp-db.dts | 33

[PATCHv8 16/19] arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox

The Globalscale Mirabox platform uses one PCIe interface for an available mini-PCIe slot, and the other PCIe interface for an internal USB 3.0 controller. We add the necessary Device Tree informations to enable those two interfaces. Signed-off-by: Thomas Petazzoni thomas.petazz...@free

[PATCHv8 17/19] arm: mvebu: PCIe Device Tree informations for Armada 370 DB

The Marvell evaluation board (DB) for the Armada 370 SoC has 2 physical full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/boot/dts/armada-370-db.dts | 17 + 1

[PATCHv8 18/19] arm: mvebu: PCIe Device Tree informations for Armada XP GP

The Marvell Armada XP GP board has 3 physical full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/boot/dts/armada-xp-gp.dts | 21 + 1 file changed, 21

[PATCHv8 19/19] arm: mvebu: update defconfig with PCI and USB support

-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- arch/arm/configs/mvebu_defconfig |3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index 2ec8119..071a5b1 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch

Re: [PATCHv8 10/19] pci: PCIe driver for Marvell Armada 370/XP systems

Dear Bjorn Helgaas, On Tue, 9 Apr 2013 15:12:58 -0600, Bjorn Helgaas wrote: On Tue, Apr 9, 2013 at 3:06 PM, Thomas Petazzoni thomas.petazz...@free-electrons.com wrote: This driver implements the support for the PCIe interfaces on the Marvell Armada 370/XP ARM SoCs. In the future, it might

Re: [PATCHv7 08/17] pci: PCIe driver for Marvell Armada 370/XP systems

Dear Bjorn Helgaas, On Mon, 8 Apr 2013 14:29:59 -0600, Bjorn Helgaas wrote: Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Acked-by: Bjorn Helgaas bhelg...@google.com A few trivial comments below; it's up to you whether you do anything with them or not. It's OK

Re: [PATCHv7 08/17] pci: PCIe driver for Marvell Armada 370/XP systems

, they are unneeded. Sorry for this. Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list devicetree-discuss

Re: [PATCHv7 08/17] pci: PCIe driver for Marvell Armada 370/XP systems

. 0x1 to 0x1. Then I guess it should work with the code I'm proposing here, no? Note: this pcie-realio region is global: it will be shared by all PCIe interfaces. Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training

Re: [PATCHv7 06/17] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370

Mike, Could we have your opinion on this patch, and possibly a Acked-by to pass it through arm-soc? Thanks! Thomas On Wed, 27 Mar 2013 15:40:23 +0100, Thomas Petazzoni wrote: The Armada 370 has two gatable clocks for each PCIe interface, and we want both of them to be enabled. We therefore

Re: [PATCHv7 07/17] clk: mvebu: add more PCIe clocks for Armada XP

Mike, Could we have your opinion on the below patch, and possibly an Acked-by to carry it through the arm-soc tree? Thanks, Thomas On Wed, 27 Mar 2013 15:40:24 +0100, Thomas Petazzoni wrote: The current revision of the datasheet only mentions the gatable clocks for the PCIe 0.0, 0.1, 0.2

Re: [RFCv1 00/11] MSI support for Marvell EBU PCIe driver

later today and I'll send it. Thanks for the suggestion! Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ___ devicetree-discuss mailing list

Re: [RFC PATCHv1 2/5] bus: mvebu: fix mistake in PCIe window target attribute for Kirkwood

19:05:01 +0100, Thomas Petazzoni wrote: The target and attributes for the PCIe address decoding windows were not correct on Kirkwood for the second PCIe interface. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- Note: this patch should be merged with the existing

Re: [RFC PATCHv1 2/5] bus: mvebu: fix mistake in PCIe window target attribute for Kirkwood

of the kirkwood PCIe branch in order to be able to submit a version that hopefully should be acceptable. Thanks, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com

Re: [PATCHv7 00/17] PCIe support for the Armada 370 and Armada XP SoCs

to request for additional ones as needed. Thanks a lot for your support, Thomas On Wed, 27 Mar 2013 15:40:17 +0100, Thomas Petazzoni wrote: Hello, This series of patches introduces PCIe support for the Marvell Armada 370 and Armada XP. In the future, we plan to extend the driver to cover Kirkwood

Re: [PATCHv7 04/17] pci: infrastructure to add drivers in drivers/pci/host

Dear Neil Greatorex, On Thu, 28 Mar 2013 00:28:02 +, Neil Greatorex wrote: Surely this patch should include the drivers/pci/host/Makefile or it will not build? Ah, correct. I'll fix that up in the v8. Thank you for noticing! Best regards, Thomas -- Thomas Petazzoni, Free Electrons

Re: [RFC PATCH v2] of/pci: Provide support for parsing PCI DT ranges property

... Yes, I'm planning on testing RFC v3 from Andrew right now, and send a new version of the Marvell PCIe patch set that includes it. If all goes well, should happen this afternoon. Thanks, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development

[PATCHv7 00/17] PCIe support for the Armada 370 and Armada XP SoCs

Thomas Petazzoni (14): pci: infrastructure to add drivers in drivers/pci/host arm: pci: add a align_resource hook clk: mvebu: create parent-child relation for PCIe clocks on Armada 370 clk: mvebu: add more PCIe clocks for Armada XP pci: PCIe driver for Marvell Armada 370/XP systems

[PATCHv7 01/17] of/pci: Provide support for parsing PCI DT ranges property

into a single range (as was the case with powerpc and microblaze). The modifications to microblaze, mips and powerpc have not been tested. Signed-off-by: Andrew Murray andrew.mur...@arm.com Signed-off-by: Liviu Dudau liviu.du...@arm.com Signed-off-by: Thomas Petazzoni thomas.petazz...@free

[PATCHv7 02/17] of/pci: Add of_pci_get_devfn() function

From: Thierry Reding thierry.red...@avionic-design.de This function can be used to parse the device and function number from a standard 5-cell PCI resource. PCI_SLOT() and PCI_FUNC() can be used on the returned value obtain the device and function numbers respectively. Signed-off-by: Thierry

[PATCHv7 03/17] of/pci: Add of_pci_parse_bus_range() function

From: Thierry Reding thierry.red...@avionic-design.de This function can be used to parse a bus-range property as specified by device nodes representing PCI bridges. Signed-off-by: Thierry Reding thierry.red...@avionic-design.de --- drivers/of/of_pci.c| 25 +

[PATCHv7 04/17] pci: infrastructure to add drivers in drivers/pci/host

As agreed by the community, PCI host drivers will now be stored in drivers/pci/host. This commit adds this directory and the related Kconfig/Makefile changes to allow new drivers to be added in this directory. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- drivers/pci

[PATCHv7 05/17] arm: pci: add a align_resource hook

a align_resource() hook, and do its own specific alignement, depending on the specific constraints of the underlying hardware. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc: Russell King li...@arm.linux.org.uk --- arch/arm/include/asm/mach/pci.h | 11 +++ arch/arm/kernel/bios32

[PATCHv7 06/17] clk: mvebu: create parent-child relation for PCIe clocks on Armada 370

The Armada 370 has two gatable clocks for each PCIe interface, and we want both of them to be enabled. We therefore make one of the two clocks a child of the other, as we did for the sataX and sataXlnk clocks on Armada XP. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Cc

[PATCHv7 07/17] clk: mvebu: add more PCIe clocks for Armada XP

for those PCIe interfaces. It also changes the name of the previously existing PCIe gatable clocks, in order to match the naming using the datasheets. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com --- drivers/clk/mvebu/clk-gating-ctrl.c | 14 ++ 1 file changed, 10

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