On Mon, Jan 7, 2013 at 4:50 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Le 07/01/2013 00:46, Linus Walleij a écrit :
or similar, as you see 2 mA for each added driver stage. The driver can
convert to any internal representation...
Ok, I will do it.
Do you have other comments
Hi Linus,
Le 07/01/2013 00:46, Linus Walleij a écrit :
On Wed, Dec 19, 2012 at 9:18 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
The Allwinner SoCs have an IP module that handle both the muxing and the
GPIOs.
Sorry for very slow review :-( :-(
That's fine, at that time of
On Wed, Dec 19, 2012 at 9:18 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
The Allwinner SoCs have an IP module that handle both the muxing and the
GPIOs.
Sorry for very slow review :-( :-(
include/linux/pinctrl/pinconf-generic.h|1 +
Can you break this into a
Hi Linus,
Le 11/12/2012 01:28, Linus Walleij a écrit :
On Mon, Dec 10, 2012 at 11:08 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
This IP has 8 banks of 32 bits, with a number of pins actually useful
for each of these banks varying from one to another, and depending on
the SoC
The Allwinner SoCs have an IP module that handle both the muxing and the
GPIOs.
This IP has 8 banks of 32 bits, with a number of pins actually useful
for each of these banks varying from one to another, and depending on
the SoC used on the board.
This driver only implements the pinctrl part, the
On Mon, Dec 10, 2012 at 11:08 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
This IP has 8 banks of 32 bits, with a number of pins actually useful
for each of these banks varying from one to another, and depending on
the SoC used on the board.
This driver only implements the
