Hi Gerlando,
On Wed, Jul 17, 2013 at 08:35:38AM +0200, Gerlando Falauto wrote:
On 07/16/2013 02:56 PM, Ezequiel Garcia wrote:
[...]
Also, speaking of device bus this nand node should be behind a devicebus
node.
ranges = MBUS_ID(0xf0, 0x01) 0 0 0xf100 0x10 /*
Gerlando,
On Tue, Jul 16, 2013 at 08:51:37PM +0200, Gerlando Falauto wrote:
[...]
Also, speaking of device bus this nand node should be behind a devicebus
node.
ranges = MBUS_ID(0xf0, 0x01) 0 0 0xf100 0x10 /*
internal-regs */
Hi Gerlando,
On Tue, Jul 16, 2013 at 11:37:30AM +0200, Gerlando Falauto wrote:
apologies in advance for commenting on an already-merged patch.
Sure, no problem.
On 06/18/2013 05:31 PM, Ezequiel Garcia wrote:
Although the internal register window size is 1 MiB, the previous
ranges
On Tue, Jun 18, 2013 at 04:47:57PM -0300, Ezequiel Garcia wrote:
On Tue, Jun 18, 2013 at 09:42:48PM +0200, Sebastian Hesselbarth wrote:
On 06/18/2013 05:31 PM, Ezequiel Garcia wrote:
Although the internal register window size is 1 MiB, the previous
ranges translation for the internal
On Wed, Jun 19, 2013 at 3:36 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Tue, Jun 18, 2013 at 04:47:57PM -0300, Ezequiel Garcia wrote:
On Tue, Jun 18, 2013 at 09:42:48PM +0200, Sebastian Hesselbarth wrote:
On 06/18/2013 05:31 PM, Ezequiel Garcia wrote:
Although the internal register
On Wed, Jun 19, 2013 at 03:42:27PM -0300, Ezequiel Garcia wrote:
On Wed, Jun 19, 2013 at 3:36 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Tue, Jun 18, 2013 at 04:47:57PM -0300, Ezequiel Garcia wrote:
On Tue, Jun 18, 2013 at 09:42:48PM +0200, Sebastian Hesselbarth wrote:
On 06/18/2013
On 06/18/2013 05:31 PM, Ezequiel Garcia wrote:
Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x400. This was done to allow the crypto and nand node to access
the corresponding 'sram' and 'nand' decoding
On Tue, Jun 18, 2013 at 09:42:48PM +0200, Sebastian Hesselbarth wrote:
On 06/18/2013 05:31 PM, Ezequiel Garcia wrote:
Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x400. This was done to allow the