A few posts deep in the discussion on std.parallelism have prompted me to
double-check an assumption that I made previously. Is writing to adjacent but
non-overlapping memory addresses concurrently from different threads safe on
all hardware we care about supporting?
I know this isn't safe on
dsimcha:
Is writing to adjacent but
non-overlapping memory addresses concurrently from different threads safe on
all hardware we care about supporting?
Aren't some problems caused by writing on the same cache line?
Bye,
bearophile
== Quote from bearophile (bearophileh...@lycos.com)'s article
dsimcha:
Is writing to adjacent but
non-overlapping memory addresses concurrently from different threads safe on
all hardware we care about supporting?
Aren't some problems caused by writing on the same cache line?
Bye,
Hello all,
dsimcha dsim...@yahoo.com wrote in message
news:im8d3b$j78$1...@digitalmars.com...
A few posts deep in the discussion on std.parallelism have prompted me to
double-check an assumption that I made previously. Is writing to adjacent
but
non-overlapping memory addresses concurrently
On 3/21/2011 7:55 PM, nedbrek wrote:
Hello all,
dsimchadsim...@yahoo.com wrote in message
news:im8d3b$j78$1...@digitalmars.com...
A few posts deep in the discussion on std.parallelism have prompted me to
double-check an assumption that I made previously. Is writing to adjacent
but
dsimcha dsim...@yahoo.com wrote in message
news:im8pu5$1921$1...@digitalmars.com...
On 3/21/2011 7:55 PM, nedbrek wrote:
The main architectures (x86 and ARM) are both byte granular. Most
embedded
platforms are also byte granular. Alpha is the only architecture I am
aware
of that had
Excellent. I highly doubt we care about std.parallelism working on
embedded platforms. (Who the heck has a multicore embedded CPU
anyway?)
I KNOW!!
64k ought to be enough for anybody, right?
