Matt, Bob McGwier (N4HY) and I spent last week working on GNU Radio
face to face. We got an incredible amount of stuff done, and not much
sleep!
Below are some of the highlights:
(1) Brand new GMSK implementation that is running on the air at 768kb/sec
with no errors! This was tested unidirecti
Eric Blossom wrote:
Matt, Bob McGwier (N4HY) and I spent last week working on GNU Radio
face to face. We got an incredible amount of stuff done, and not much
sleep!
Below are some of the highlights:
-- snip --
You left out why it was possible to work this hard
I have 2 questions pertaining to the USRP hardware and the BASIC RX
boards. I've searched the forum archives with no good answers.
1)
Using the standard usrp_rx_cfile.py to receive and store IQ data from a
certain frequency, how do I determine the following parameters from the
software so I can
Robert McGwier wrote:
> What else did we forget?
We did a proper squelch on the nbfm demod.
Matt
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Right. We did the "standard squelch" where we compare a "pitch
frequency" bandpass filter's output to a high frequency band pass
filter's output (same Q), and then compare the differences in the mean
square output. If the power levels are nearly the same, it is
squelched. If the low freq f
Got the scope to work without a droop in the signle. Thanks Eric.
I disabled the automatic DC offset as follows:
self.u = usrp.source_c()# usrp is data source
mail2web - Check your email from the web a
oops program mail have sent my email without finishing it
I got ride of the droop in my low frequency square wave input by disabling
the automatic DC offset by doing the following:
self.u = usrp.source_c()# usrp is data source
self.u.set_dc_offset_cl_enable(0x0, 0xf)
When I use the usrp_scope.py example (with small modification), I only see
a trace for part of the time scale for low sweep rate. I am guessing that
it has to do with how long the usrp send data per X window update. How can
I change the event duration so that I get a sweep for a longer period of
On Fri, 11 Nov 2005 11:42:18 -0800, Eric responded:
>>On Fri, Nov 11, 2005 at 12:09:13PM -0500, [EMAIL PROTECTED] wrote:
>> I would like to reduce the ADC sample rate from the default 62.5 MS/s. I
>> have found the set_adc_clk_div in the usrp0_rx class. Is this still
>> usable. I tried to use i
On Mon, Nov 14, 2005 at 06:17:16PM -0500, [EMAIL PROTECTED] wrote:
> On Fri, 11 Nov 2005 11:42:18 -0800, Eric responded:
>
> I just saw that in the schematic that the AD9862 gets its clock dirrectly
> from the VCTCXO.
>
> Is there any other way to decrease the sample rate beside the decim_rate?
> Is there any other way to decrease the sample rate beside the decim_rate?
Why would you want to do that?
Matt
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> Matt Ettus wrote:
Is there any other way to decrease the sample rate beside the decim_rate?
Why would you want to do that?
Matt
It may not be easy to do hardware wise, but just shifting the sample
rate to fit ones bandwiidth (FFT size and resolution, ...) of interest
seems ideal
The reason Matt, Eric, and I are questioning this is that the resampling
done in software, is quite nice and completely adequate for this task.
Bob
Alfred A. Aburto Jr. wrote:
> Matt Ettus wrote:
Is there any other way to decrease the sample rate beside the
decim_rate?
Why would you
Hi, EricThanks for your effort and I'd like to share the happiness with you. I can't wait to read your code. A couple of questions:1. Are all the codes available on CVS now?2. When will be the Flex 400 available to purchase?
3. Why to remove the FSK code? Is there any better alternative?ThanksDawei
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