Re: [Discuss-gnuradio] FPGA utilization

2005-05-06 Thread Damien B.
Hi, From my measures: Bit stream 0.8 original : logic elements 56%, Memory bits 27% One cordic unit is 6% of the logic elements Damien On 5/7/05, Rahul Dhar [EMAIL PROTECTED] wrote: Are there any numbers on FPGA utilization? Some folks at NTT built an SDR platform with 3 boards that each

[Discuss-gnuradio] DC component and daughter-boards

2005-04-28 Thread Damien B.
Hi, Matt in a previous thread you were talking about making d/b that let DC component pass: If there is enough interest, I might make such a set of boards. If someone else is interested in the design, the BasicRX/TX are a great starting point, and I can offer guidance. When i'm inspecting

Re: [Discuss-gnuradio] DC component and daughter-boards

2005-04-28 Thread Damien B.
Hi, thanks for the solution, maybe i'll try with a different transformer to shift the cutoff. When i'm inspecting the my FIR output, it's really difficult to measure a 30ns (one sample) delay if the signal is not clean. This is unrelated to the DC component issue. Blame it on my bad

[Discuss-gnuradio] Send parameters to the FPGA

2005-04-25 Thread Damien B.
Hi Eric, I need for my project (channel simulator) to send parameters to the FPGA. This issue was raised in this mail: http://lists.gnu.org/archive/html/discuss-gnuradio/2005-03/msg00127.html Is it possible to send parameter to the 'serial_io' module from Python code? Here speed is not a

Re: [Discuss-gnuradio] pipes for today

2005-04-20 Thread Damien B.
Hi, i think i just hit the same issue From this simple code (no display what so ever): fg = gr.flow_graph () u = usrp.source_c (0, 64, 1, 0xf0f0f0f0, 0) n = gr.null_sink(gr.sizeof_gr_complex); fg.connect(u, n); dest = usrp.sink_c (0, 64) siggen = gr.sig_source_c

Re: [Discuss-gnuradio] Using -B ports on daughter cards

2005-04-14 Thread Damien B.
Hi, correct me if i'm wrong, but I think the only way to do it is to go through the PC with the official Bitstream. At least i didn't see anything to do it in the verilog code. I'm trying to do it (with a FIR in between) for my channel simulator project. But it's still far from working. BTW,

Re: [Discuss-gnuradio] cic_int_shifter.v not in usrp-0.8 tarball.

2005-04-14 Thread Damien B.
Good day, this file is missing in the 0.8 tarballs, I got mine browsing the CVS. The path is : usrp-0.8\fpga\sdr_lib\cic_int_shifter.v Damien On 4/14/05, Lamar Owen [EMAIL PROTECTED] wrote: Is there a particular reason cic_int_shifter.v is not in the tarballed verilog in the 0.8 tarball?

[Discuss-gnuradio] Using USRP as a DTV channel simulator

2005-03-31 Thread Damien B.
Hi everyone, Our project is to use the USRP as a DTV channel simulator to test the respective quality of DTV set boxes. That means to be able to attenuate the signal, add noise and simulate echos from reflexions on mountains for example. The biggest question is how to do it. One way would be to

[Discuss-gnuradio] _submit_urb failed error

2005-03-07 Thread Damien B.
Hi, i'm setting a system for gnu-radio, managed to install software (make check ok), the USRP is correctly detected and i flashed the daughterboards. When i try to run basic TX examples i receive an error from _submit_urb (listing at the end). I tried CVS and tarballs with no luck. I'm running a

Re: [Discuss-gnuradio] Debian Segmentation fault during make check

2005-02-23 Thread Damien B.
Hi, I managed to install Gnu-radio project on ubuntu (based on debian) without the 'make check' error message. Here is a small walk-though. I'll add a Wiki entry if you think it's worth it. (Sorry for my english) Add this repository to your /etc/apt/sources.list deb