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From: "Johnathan Corgan"
To: "Markus Kern"
Cc:
Sent: Tuesday, February 09, 2010 6:26
Subject: Re: [Discuss-gnuradio] free USRP (has a new home)
On Tue, 2010-02-09 at 03:01 +0100, Markus Kern wrote:
Great choice! I have used the USRP to receive NOAA APT signals
On 09.02.2010, 05:26 Johnathan Corgan wrote:
> On Tue, 2010-02-09 at 03:01 +0100, Markus Kern wrote:
>> Great choice! I have used the USRP to receive NOAA APT signals before
>> (with one of Jerry's antenna designs it seems, incidentally). Very
>> curious what he is going to do with it :)
> BTW
On Tue, 2010-02-09 at 03:01 +0100, Markus Kern wrote:
> Great choice! I have used the USRP to receive NOAA APT signals before
> (with one of Jerry's antenna designs it seems, incidentally). Very
> curious what he is going to do with it :)
BTW, the (newish) gr-noaa component in GNU Radio can recei
Great choice! I have used the USRP to receive NOAA APT signals before
(with one of Jerry's antenna designs it seems, incidentally). Very
curious what he is going to do with it :)
Best,
Markus
On 08.02.2010, 22:21 Jamie Morken wrote:
> Hi,
> Congratulations Jerry KD6JDJ as we discussed you wi
Hi,
Congratulations Jerry KD6JDJ as we discussed you will be receiving my USRP for
your
NOAA satellite project! To all those 30+ people who wrote me an email, thanks
for sharing
your project proposals, it was very nice to be able to read them all, I wish
you all can have
a free USRP! ;)
c
Hi,
I am giving my USRP v1 away, it is serial# 17 and works fine. Also included
will be an RX and TX daughterboard as well as AC adapter and USB cord.
If you want it please send me an email saying what you plan on using it for.
Please only email me if you don't already have a USRP and otherwi
On 4/22/07, Eng. Firas <[EMAIL PROTECTED]> wrote:
Dear Matt,
Dear All,
Is the DDC decimate by 2 half band filter built inside the FPGA ? If it is
so, then how much the free available FPGA resources left after building all
the present USPR circuits in it? I mean, is there a free space to modify
Brian Padalino wrote:
>
> On 4/22/07, Eng. Firas <[EMAIL PROTECTED]> wrote:
>>
>> Dear Matt,
>> Dear All,
>>
>>
>> Is the DDC decimate by 2 half band filter built inside the FPGA ? If it
>> is
>> so, then how much the free available FPGA resources left after building
>> all
>> the present USPR
Dear Matt,
Dear All,
Is the DDC decimate by 2 half band filter built inside the FPGA ? If it is
so, then how much the free available FPGA resources left after building all
the present USPR circuits in it? I mean, is there a free space to modify the
CIC + HBF circuit and to build a complete DDC
