[PATCH] drm/qxl: use ttm_tt

qxl device will not dma, so we don't need ttm_dma_tt. Go use ttm_tt instead, to avoid wasting resources (swiotlb bounce buffers for example). Signed-off-by: Gerd Hoffmann --- drivers/gpu/drm/qxl/qxl_ttm.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu

[Bug 108685] Raven Ridge: VMC page fault on resume from suspend

https://bugs.freedesktop.org/show_bug.cgi?id=108685 Bug ID: 108685 Summary: Raven Ridge: VMC page fault on resume from suspend Product: DRI Version: XOrg git Hardware: Other OS: All Status: NEW Severity: n

RE: [radeon-alex:amd-staging-drm-next 12/15] drivers/gpu//drm/amd/amdgpu/amdgpu_xgmi.c:117:1: warning: the frame size of 1040 bytes is larger than 1024 bytes

Fixed and pushed. Thanks. Regards, Hawking -Original Message- From: kbuild test robot Sent: 2018年11月7日 5:20 To: Zhang, Hawking Cc: kbuild-...@01.org; dri-devel@lists.freedesktop.org; Deucher, Alexander ; Liu, Shaoyun Subject: [radeon-alex:amd-staging-drm-next 12/15] drivers/gpu//drm

Re: [v7 2/4] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

On Tue, Nov 06, 2018 at 04:31:20PM -0800, Anusha Srivatsa wrote: > If the panel supports FEC, the driver has to > set the FEC_READY bit in the dpcd register: > FEC_CONFIGURATION. > > This has to happen before link training. > > v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready >- chang

Re: [v7 1/4] i915/dp/fec: Add fec_enable to the crtc state.

On Tue, Nov 06, 2018 at 04:31:19PM -0800, Anusha Srivatsa wrote: > For DP 1.4 and above, Display Stream compression can be > enabled only if Forward Error Correctin can be performed. > > Add a crtc state for FEC. Currently, the state > is determined by platform, DP and DSC being > enabled. Moving

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 --- Comment #8 from drigohighlander (drigos...@gmail.com) --- Yesterday (05/11/2018 DD/MM/) I upgraded again my system to kernel 4.19.1 and the other packages: xorg-server-1.20.3-x86_64-1, mesa-18.2.4-x86_64-1, xf86-video-amdgpu-18.1.0-x86_64-

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 --- Comment #7 from drigohighlander (drigos...@gmail.com) --- Created attachment 279365 --> https://bugzilla.kernel.org/attachment.cgi?id=279365&action=edit Glxinfo from the old system (the fast viewport one) > kernel 4.9.50 -- You are receivi

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 drigohighlander (drigos...@gmail.com) changed: What|Removed |Added Attachment #279361|Xorg from the old system|Xorg from the old

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 --- Comment #6 from drigohighlander (drigos...@gmail.com) --- Created attachment 279363 --> https://bugzilla.kernel.org/attachment.cgi?id=279363&action=edit Dmesg from the old system (the fast viewport one) > kernel 4.9.50 -- You are receiving

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 --- Comment #5 from drigohighlander (drigos...@gmail.com) --- Created attachment 279361 --> https://bugzilla.kernel.org/attachment.cgi?id=279361&action=edit Xorg from the old system (the fast viewport one) >kernel 4.9.50 -- You are receiving t

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 --- Comment #4 from drigohighlander (drigos...@gmail.com) --- Created attachment 279359 --> https://bugzilla.kernel.org/attachment.cgi?id=279359&action=edit Glxinfo from the new system > kernel 4.19.1 -- You are receiving this mail because: Yo

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 drigohighlander (drigos...@gmail.com) changed: What|Removed |Added Attachment #279357|Dmesg from the new system |Dmesg from the new

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 --- Comment #3 from drigohighlander (drigos...@gmail.com) --- Created attachment 279357 --> https://bugzilla.kernel.org/attachment.cgi?id=279357&action=edit Dmesg from the new system -> kernel 4.19. -- You are receiving this mail because: You

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 --- Comment #2 from drigohighlander (drigos...@gmail.com) --- Created attachment 279355 --> https://bugzilla.kernel.org/attachment.cgi?id=279355&action=edit Xorg from the new system -> kernel 4.19.1 -- You are receiving this mail because: You

[PATCH RESEND v3 4/5] drm/nouveau: Use atomic VCPI helpers for MST

Currently, nouveau uses the yolo method of setting up MST displays: it uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the display configuration. These helpers don't take care to make sure they take a reference to the mstb port that they're checking, and additionally don't actual

[PATCH RESEND v3 5/5] drm/dp_mst: Stop unsetting mstc->port, check connector registration

Same thing we did in i915, but for nouveau now. Signed-off-by: Lyude Paul Cc: Daniel Vetter --- drivers/gpu/drm/nouveau/dispnv50/disp.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50

[PATCH RESEND v3 1/5] drm/dp_mst: Add some atomic state iterator macros

Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter --- include/drm/drm_dp_mst_helper.h | 77 + 1 file changed, 77 insertions(+) diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 59f005b419cf..3faceb66f5cb 100644 --- a/include/

[PATCH RESEND v3 3/5] drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()

It occurred to me that we never actually check this! So let's start doing that. Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_dp_mst_topology.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/dri

[PATCH RESEND v3 0/5] drm/dp_mst: Improve VCPI helpers, use in nouveau

[sorry about the resend-copy pasted the wrong header and I want to make sure this doesn't get missed!] This patchset does some cleaning up of the atomic VCPI helpers for MST, and converts nouveau over to using them. I would have included amdgpu in this patch as well, but at the moment moving them

[PATCH RESEND v3 2/5] drm/dp_mst: Start tracking per-port VCPI allocations

There has been a TODO waiting for quite a long time in drm_dp_mst_topology.c: /* We cannot rely on port->vcpi.num_slots to update * topology_state->avail_slots as the port may not exist if the parent * branch device was unplugged. This should be fixed by tracking

[PATCH v3 1/5] drm/dp_mst: Add some atomic state iterator macros

Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter --- include/drm/drm_dp_mst_helper.h | 77 + 1 file changed, 77 insertions(+) diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 59f005b419cf..3faceb66f5cb 100644 --- a/include/

[PATCH v3 3/5] drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()

It occurred to me that we never actually check this! So let's start doing that. Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_dp_mst_topology.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/dri

[PATCH v3 4/5] drm/nouveau: Use atomic VCPI helpers for MST

Currently, nouveau uses the yolo method of setting up MST displays: it uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the display configuration. These helpers don't take care to make sure they take a reference to the mstb port that they're checking, and additionally don't actual

[PATCH v3 2/5] drm/dp_mst: Start tracking per-port VCPI allocations

There has been a TODO waiting for quite a long time in drm_dp_mst_topology.c: /* We cannot rely on port->vcpi.num_slots to update * topology_state->avail_slots as the port may not exist if the parent * branch device was unplugged. This should be fixed by tracking

[PATCH v3 5/5] drm/dp_mst: Stop unsetting mstc->port, check connector registration

Same thing we did in i915, but for nouveau now. Signed-off-by: Lyude Paul Cc: Daniel Vetter --- drivers/gpu/drm/nouveau/dispnv50/disp.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50

[PATCH v3 0/5] drm/dp_mst: Add some atomic state iterator macros

This patchset does some cleaning up of the atomic VCPI helpers for MST, and converts nouveau over to using them. I would have included amdgpu in this patch as well, but at the moment moving them over to the atomic helpers is nontrivial. Cc: Daniel Vetter Lyude Paul (5): drm/dp_mst: Add some at

[v7 3/4] i915/dp/fec: Configure the Forward Error Correction bits.

If FEC is supported, the corresponding DP_TP_CTL register bits have to be configured. The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register and wait till FEC_STATUS in DP_TP_CTL[28] is 1. Also add the warn message to make sure that the control register is already active while enabling

[v7 1/4] i915/dp/fec: Add fec_enable to the crtc state.

For DP 1.4 and above, Display Stream compression can be enabled only if Forward Error Correctin can be performed. Add a crtc state for FEC. Currently, the state is determined by platform, DP and DSC being enabled. Moving forward we can use the state to have error correction on other scenarios too

[v7 4/4] drm/i915/fec: Disable FEC state.

Set the suitable bits in DP_TP_CTL to stop bit correction when DSC is disabled. v2: - rebased. - Add additional check for compression state. (Gaurav) v3: rebased. v4: - Move the code to the proper spot according to spec (Ville) - Use proper checks (manasi) v5: Remove unnecessary checks (Ville)

[v7 2/4] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

If the panel supports FEC, the driver has to set the FEC_READY bit in the dpcd register: FEC_CONFIGURATION. This has to happen before link training. v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready - change commit message. (Gaurav) v3: rebased. (r-b Manasi) v4: Use fec crtc state, be

Re: [PATCH v4 2/3] arm64: dts: sdm845: Add dsi pinctrl nodes

Hi (sending again since I screwed up my previous reply), On Fri, Nov 2, 2018 at 3:26 PM Jeykumar Sankaran wrote: > > Add dsi active/suspend pinctrl nodes to sdm845 SoC dts. > > Changes in v4: > - patch introduced in the series > > Signed-off-by: Jeykumar Sankaran > --- > arch/arm64/boot

Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-intel tree

On Tue, Nov 06, 2018 at 04:00:34PM -0800, Rodrigo Vivi wrote: > On Wed, Nov 07, 2018 at 06:59:29AM +1100, Stephen Rothwell wrote: > > Hi all, > > > > Commit > > > > 35b876db4a42 ("drm/i915/dsc: Add slice_row_per_frame in DSC PPS > > programming") > > > > is missing a Signed-off-by from its co

Re: [Intel-gfx] linux-next: Signed-off-by missing for commit in the drm-intel tree

On Wed, Nov 07, 2018 at 06:59:29AM +1100, Stephen Rothwell wrote: > Hi all, > > Commit > > 35b876db4a42 ("drm/i915/dsc: Add slice_row_per_frame in DSC PPS > programming") > > is missing a Signed-off-by from its committer. It seems the tag "Suggested-by:" tricked out our maintainer tools. fr

RE: [v6 3/4] i915/dp/fec: Configure the Forward Error Correction bits.

>-Original Message- >From: Navare, Manasi D >Sent: Tuesday, November 6, 2018 2:42 PM >To: Srivatsa, Anusha >Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Singh, >Gaurav K ; Jani Nikula ; >Ville Syrjala >Subject: Re: [v6 3/4] i915/dp/fec: Configure the Forward Err

Re: [PATCH v2 5/5] drm/msm: subclass work object for vblank events

On Tue, Nov 06, 2018 at 02:36:30PM -0800, Jeykumar Sankaran wrote: > msm maintains a separate structure to define vblank > work definitions and a list to track events submitted > to the workqueue. We can avoid this redundant list > and its protection mechanism, if we subclass the > work object to e

Re: [PATCH v8 07/19] drm/i915/dp: Compute DSC pipe config in atomic check

On Tue, Nov 06, 2018 at 02:41:01PM -0800, Srivatsa, Anusha wrote: > > > >-Original Message- > >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > >Sent: Tuesday, November 6, 2018 6:43 AM > >To: Navare, Manasi D > >Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop

RE: [PATCH v8 07/19] drm/i915/dp: Compute DSC pipe config in atomic check

>-Original Message- >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] >Sent: Tuesday, November 6, 2018 6:43 AM >To: Navare, Manasi D >Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Jani >Nikula >; Srivatsa, Anusha ; >Singh, Gaurav K >Subject: Re: [PATCH

Re: [v6 3/4] i915/dp/fec: Configure the Forward Error Correction bits.

On Mon, Nov 05, 2018 at 03:31:49PM -0800, Anusha Srivatsa wrote: > If FEC is supported, the corresponding > DP_TP_CTL register bits have to be configured. > > The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register > and wait till FEC_STATUS in DP_TP_CTL[28] is 1. > Also add the warn me

[PATCH v2 1/5] drm/msm: destroy msm threads after config cleanup

To avoid any possible work queues to msm threads, clean up the threads after the CRTC objects are released in config cleanup. changes in v2: - fix race condition before kthread flush and stop (Sean Paul) - use kthread_destroy_worker for cleaning up kthread (Sean Paul) Signed-off-b

[PATCH v2 5/5] drm/msm: subclass work object for vblank events

msm maintains a separate structure to define vblank work definitions and a list to track events submitted to the workqueue. We can avoid this redundant list and its protection mechanism, if we subclass the work object to encapsulate vblank event parameters. changes in v2: - subclass optimi

[PATCH v2 4/5] drm/msm: clean up display thread

Since there are no clients using these threads, cleaning it up. changes in v2: - switch all the dependent clients to use system wq before removing the disp_threads (Sean Paul) Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/msm_drv.c | 35 +

[PATCH v2 2/5] drm/msm/dpu: use system wq for vblank events

DPU was using one thread per display to dispatch async commits and vblank requests. Since clean up already happened in msm to use the common thread for all the display commits, display threads are only used to cater vblank requests. Since a single thread is sufficient to do the job without any perf

[PATCH v2 3/5] drm/msm/dpu: use system wq for idle power collapse

msm is using system wq for dispatching commit and vblank events. Switch idle power collapse feature also to use system wq to handle delayed work handlers so that msm can get rid of redundant display threads. changes in v2: - patch introduced in v2 Signed-off-by: Jeykumar Sankaran --- dr

Re: [v6 4/4] drm/i915/fec: Disable FEC state.

On Mon, Nov 05, 2018 at 03:31:50PM -0800, Anusha Srivatsa wrote: > Set the suitable bits in DP_TP_CTL to stop > bit correction when DSC is disabled. > > v2: > - rebased. > - Add additional check for compression state. (Gaurav) > > v3: rebased. > > v4: > - Move the code to the proper spot accordi

Re: [PATCH v2] drm: Convert to using %pOFn instead of device_node.name

On Tue, Nov 06, 2018 at 03:57:16PM -0600, Rob Herring wrote: > On Mon, Oct 1, 2018 at 3:17 AM Daniel Vetter wrote: > > > > On Fri, Sep 28, 2018 at 05:50:44PM -0500, Rob Herring wrote: > > > In preparation to remove the node name pointer from struct device_node, > > > convert printf users to use th

Re: [PATCH v2] drm: Convert to using %pOFn instead of device_node.name

On Mon, Oct 1, 2018 at 3:17 AM Daniel Vetter wrote: > > On Fri, Sep 28, 2018 at 05:50:44PM -0500, Rob Herring wrote: > > In preparation to remove the node name pointer from struct device_node, > > convert printf users to use the %pOFn format specifier. > > > > For drm_modes.c, the full node path i

Re: [PATCH] drm/framebuffer: Expose only modifiers that support at least a format

On Tue, 2018-11-06 at 22:21 +0200, Ville Syrjälä wrote: > On Tue, Nov 06, 2018 at 11:54:45AM -0800, Dhinakaran Pandiyan wrote: > > On Tue, 2018-11-06 at 16:13 +0200, Ville Syrjälä wrote: > > > On Mon, Nov 05, 2018 at 06:44:34PM -0800, Dhinakaran Pandiyan > > > wrote: > > > > Allows drivers to pass

Re: [PATCH] drm: rcar-du: Fix external clock error checks

Hi Laurent, Thank you for the patch, On 06/11/2018 15:39, Laurent Pinchart wrote: > The rcar-du driver supports probe deferral for external clocks, but > implements it badly by checking the wrong pointer due to a bad copy and > paste. Fix it. > > While at it, reject invalid clocks outright for D

[Bug 108577] Black X laptop screen with cursor if HDMI not plugged in, bisected

https://bugs.freedesktop.org/show_bug.cgi?id=108577 --- Comment #30 from Alex Deucher --- Can you try this patch set? https://patchwork.freedesktop.org/series/52117/ -- You are receiving this mail because: You are the assignee for the bug.___ dri-deve

[PATCH] drm/msm: Set dma maximum segment size for mdss

From: Sean Paul Turning on CONFIG_DMA_API_DEBUG_SG results in the following error: [ 12.078665] msm ae0.mdss: DMA-API: mapping sg segment longer than device claims to support [len=3526656] [max=65536] [ 12.089870] WARNING: CPU: 6 PID: 334 at /mnt/host/source/src/third_party/kernel/v4.1

[PATCH v5 3/5] drm/i915: Fix threshold check in intel_hpd_irq_storm_detect()

Currently in intel_hpd_irq_storm_detect() when we detect that the last recorded hotplug wasn't within the period defined by HPD_STORM_DETECT_DELAY, we make the mistake of resetting the HPD count to 0 without incrementing it. This results in us only enabling storm detection when we go +2 above the t

[PATCH v5 4/5] drm/i915: Clarify flow for disabling IRQs on storms

This is rather confusing to look at as-is: dev_priv->display.hpd_irq_setup(dev_priv); in intel_hpd_irq_handler() handles disabling the actual HPD IRQ, while intel_hpd_irq_storm_disable() handles moving the HPD pin state over from MARK_DISABLED to DISABLED along with enabling polling for it. Change

[PATCH v5 0/5] drm/i915: HPD IRQ storm detection fixes

This series contains a fix for a problem which is very difficult to reproduce under normal circumstances without specialized testing hardware, along with a fix that seems to be required for some especially rebellious GM45 laptops. Lyude Paul (5): drm/i915: Fix possible race in intel_dp_add_mst_c

[PATCH v5 5/5] drm/i915: Add short HPD IRQ storm detection for non-MST systems

Unfortunately, it seems that the HPD IRQ storm problem from the early days of Intel GPUs was never entirely solved, only mostly. Within the last couple of days, I got a bug report from one of our customers who had been having issues with their machine suddenly booting up very slowly after having up

[PATCH v5 2/5] drm/i915: Fix NULL deref when re-enabling HPD IRQs on systems with MST

Turns out that if you trigger an HPD storm on a system that has an MST topology connected to it, you'll end up causing the kernel to eventually hit a NULL deref: [ 332.339041] BUG: unable to handle kernel NULL pointer dereference at 00ec [ 332.340906] PGD 0 P4D 0 [ 332.342750] Oops

[PATCH v5 1/5] drm/i915: Fix possible race in intel_dp_add_mst_connector()

This hasn't caused any issues yet that I'm aware of, but as Ville Syrjälä pointed out - we need to make sure that intel_connector->mst_port is set before initializing MST connectors, since in theory we could potentially check intel_connector->mst_port in i915_hpd_poll_init_work() after registering

[radeon-alex:amd-staging-drm-next 12/15] drivers/gpu//drm/amd/amdgpu/amdgpu_xgmi.c:117:1: warning: the frame size of 1040 bytes is larger than 1024 bytes

tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next head: 3902c0af567d658245ac01f2e33b39b2ff1ddd75 commit: 08dda26796ddd8a83e3b3568dc44e65a3108c56f [12/15] drm/amdgpu/psp: update topology info structures config: i386-randconfig-s2-201844 (attached as .config) compiler: gcc

Re: [PATCH v2] backlight: pwm_bl: Fix brightness levels for non-DT case.

On Tue, Oct 30, 2018 at 11:34:41AM +0100, Enric Balletbo i Serra wrote: > Commit '88ba95bedb79 ("backlight: pwm_bl: Compute brightness of LED > linearly to human eye")' allows the possibility to compute a default > brightness table when there isn't the brightness-levels property in the > DT. Unfort

Re: [PATCH v8 07/19] drm/i915/dp: Compute DSC pipe config in atomic check

On Tue, Nov 06, 2018 at 04:42:56PM +0200, Ville Syrjälä wrote: > On Fri, Nov 02, 2018 at 07:09:03PM -0700, Manasi Navare wrote: > > On Fri, Nov 02, 2018 at 02:31:26PM -0700, Manasi Navare wrote: > > > DSC params like the enable, compressed bpp, slice count and > > > dsc_split are added to the intel

Re: [PATCH v8 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC

On Tue, Nov 06, 2018 at 12:14:50PM -0800, Manasi Navare wrote: > On Tue, Nov 06, 2018 at 07:00:50PM +0200, Ville Syrjälä wrote: > > On Tue, Nov 06, 2018 at 08:52:41AM -0800, Manasi Navare wrote: > > > On Tue, Nov 06, 2018 at 04:33:38PM +0200, Ville Syrjälä wrote: > > > > On Fri, Nov 02, 2018 at 02:

[PATCH v6 1/5] drm: Add vrr_capable property to the drm connector

Modern display hardware is capable of supporting variable refresh rates. This patch introduces the "vrr_capable" property on the connector to allow userspace to query support for variable refresh rates. Atomic drivers should attach this property to connectors that are capable of driving variable r

[PATCH v6 5/5] drm/amdgpu: Set FreeSync state using drm VRR properties

Support for AMDGPU specific FreeSync properties and ioctls are dropped from amdgpu_dm in favor of supporting drm variable refresh rate properties. The notify_freesync and set_freesync_property functions are dropped from amdgpu_display_funcs. The drm vrr_capable property is now attached to any DP/

[PATCH v6 4/5] drm/amdgpu: Correct get_crtc_scanoutpos behavior when vpos >= vtotal

When variable refresh rate is active the hardware counter can return a position >= vtotal. This results in a vpos being returned from amdgpu_display_get_crtc_scanoutpos that's a positive value. The positive value indicates to the caller that the display is currently in scanout when the display is a

[PATCH v6 3/5] drm: Document variable refresh properties

These include the drm_connector 'vrr_capable' and the drm_crtc 'vrr_enabled' properties. Signed-off-by: Nicholas Kazlauskas Cc: Harry Wentland Cc: Manasi Navare Cc: Pekka Paalanen Cc: Ville Syrjälä Cc: Michel Dänzer --- Documentation/gpu/drm-kms.rst | 7 drivers/gpu/drm/drm_connecto

[PATCH v6 2/5] drm: Add vrr_enabled property to drm CRTC

This patch introduces the 'vrr_enabled' CRTC property to allow dynamic control over variable refresh rate support for a CRTC. This property should be treated like a content hint to the driver - if the hardware or driver is not capable of driving variable refresh timings then this is not considered

[PATCH v6 0/5] A DRM API for adaptive sync and variable refresh rate support

These patches are part of a proposed new interface for supporting variable refresh rate via DRM properties. === Changes from v5 === drm changes: * Updated documentation to define userspace expectations when variable refresh rate is enabled amd changes: * Added patch to fix vblank timestamp c

Re: [PATCH] drm/framebuffer: Expose only modifiers that support at least a format

On Tue, Nov 06, 2018 at 11:54:45AM -0800, Dhinakaran Pandiyan wrote: > On Tue, 2018-11-06 at 16:13 +0200, Ville Syrjälä wrote: > > On Mon, Nov 05, 2018 at 06:44:34PM -0800, Dhinakaran Pandiyan wrote: > > > Allows drivers to pass a larger modifier array, thereby avoiding > > > declarations of static

Re: [PATCH v8 04/19] drm/dsc: Add helpers for DSC picture parameter set infoframes

On Mon, Nov 05, 2018 at 05:38:19PM -0800, Srivatsa, Anusha wrote: > > > >-Original Message- > >From: Navare, Manasi D > >Sent: Friday, November 2, 2018 2:31 PM > >To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org > >Cc: Navare, Manasi D ; Jani Nikula > >; Ville Syrjala

Re: [PATCH v8 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC

On Tue, Nov 06, 2018 at 07:00:50PM +0200, Ville Syrjälä wrote: > On Tue, Nov 06, 2018 at 08:52:41AM -0800, Manasi Navare wrote: > > On Tue, Nov 06, 2018 at 04:33:38PM +0200, Ville Syrjälä wrote: > > > On Fri, Nov 02, 2018 at 02:31:29PM -0700, Manasi Navare wrote: > > > > From: Gaurav K Singh > > >

linux-next: Signed-off-by missing for commit in the drm-intel tree

Hi all, Commit 35b876db4a42 ("drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming") is missing a Signed-off-by from its committer. -- Cheers, Stephen Rothwell pgpS8_YJUjABc.pgp Description: OpenPGP digital signature ___ dri-devel mailing

Re: [PATCH] drm/framebuffer: Expose only modifiers that support at least a format

On Tue, 2018-11-06 at 16:13 +0200, Ville Syrjälä wrote: > On Mon, Nov 05, 2018 at 06:44:34PM -0800, Dhinakaran Pandiyan wrote: > > Allows drivers to pass a larger modifier array, thereby avoiding > > declarations of static modifier arrays that are only slight > > different > > for each plane. > >

[PATCH v2 3/3] drm/atomic: Use explicit old/new state in drm_atomic_plane_check()

From: Ville Syrjälä Convert drm_atomic_plane_check() over to using explicit old vs. new plane states. Avoids the confusion of "what does plane->state mean again?". v2: Stick to the multi-stage logic in plane_switching_crtc() (Daniel) Signed-off-by: Ville Syrjälä Reviewed-by: Daniel Vetter ---

[Bug 107928] Screen regularly turns black, reboot needed

https://bugs.freedesktop.org/show_bug.cgi?id=107928 --- Comment #15 from Vik-T --- Someone might find this helpful: I managed to reduce the number of driver crashes considerably by disabling "suspend" and "off" mode in X. Section "ServerFlags" Option "SuspendTime" "0" Option "Of

Re: [PATCH DRM] drm: msm: disp: dpu1: Use DRM_DEV_* instead of DPU_*

On Sat, Oct 20, 2018 at 11:33:54PM +0530, Mamta Shukla wrote: > Use DRM_DEV_ERROR/DEBUG instead of DPU_ERROR/DEBUG to generate > drm-formatted specific log messages in the Kernel log in case of > multiple instances. > > Signed-off-by: Mamta Shukla Hi Mamta, Thanks for sending this patch, but I

[Bug 108649] On Vega GPU Project CARS 2 Demo cause broke fonts in gnome-shell

https://bugs.freedesktop.org/show_bug.cgi?id=108649 --- Comment #3 from Hin-Tak Leung --- I think I may have a similar problem, though not as bad as the reporter's. After upgrading to fedora 29 from fedora 28, I found a few gnome applications are not working correctly. The symptom is that some te

[Bug 200645] 4.18-rc regression bisected to e03fd3f30: amdgpu polaris11/rx460 only activates on one output/monitor of two

https://bugzilla.kernel.org/show_bug.cgi?id=200645 --- Comment #15 from postmas...@amd.com --- Delivery has failed to these recipients or groups: mikita.lip...@amd.com The e-mail address you entered couldn't be found. Please check the recipient's e-mail address and t

Re: [PATCH] drm/lease: look at ->universal_planes only once

On Mon, Nov 05, 2018 at 11:12:11AM +0100, Daniel Vetter wrote: > It's lockless, and userspace might chance it underneath us. That's not > really a problem, all userspace gets is a slightly dysfunctional > lease with the current code. But this might change, and gcc might > decide to reload a few too

Re: [PATCH 2/2] drm/msm/a6xx: Fix a typo in a6xx gpu crash state

On Tue, Nov 06, 2018 at 12:38:29PM +0530, Sharat Masetty wrote: > This patch simply fixes a typo for the name of an indexed register. > CP_MEMPOOOL -> CP_MEMPOOL. > > Signed-off-by: Sharat Masetty Reviewed by: Jordan Crouse > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 2 +- > 1 file

Re: [PATCH 1/2] drm/msm/a6xx: Build a6xx_gpu_state under the right conditionals

On Tue, Nov 06, 2018 at 12:38:28PM +0530, Sharat Masetty wrote: > Build a6xx_gpu_state.c only if either of CONFIG_DEBUG_FS, CONFIG_DEV_COREDUMP > is defined. Can you do the same for the other targets too? With that, Reviewed-by: Jordan Crouse > Signed-off-by: Sharat Masetty > --- > drivers/g

Re: [PATCH 3/3] drm/msm: Optimize adreno_show_object()

On Tue, Nov 06, 2018 at 11:40:06AM +0530, Sharat Masetty wrote: > When the userspace tries to read the crashstate dump, the read side > implementation in the driver currently ascii85 encodes all the binary > buffers and it does this each time the read system call is called. > A userspace tool like

Re: [PATCH v8 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC

On Tue, Nov 06, 2018 at 08:52:41AM -0800, Manasi Navare wrote: > On Tue, Nov 06, 2018 at 04:33:38PM +0200, Ville Syrjälä wrote: > > On Fri, Nov 02, 2018 at 02:31:29PM -0700, Manasi Navare wrote: > > > From: Gaurav K Singh > > > > > > This computation of RC params happens in the atomic commit phas

[Bug 108668] drm/amd/display: set backlight level limit to 1: breaks userspace programs assuming 0 is the minimum brightness

https://bugs.freedesktop.org/show_bug.cgi?id=108668 --- Comment #2 from Harry Wentland --- This should fix it: https://patchwork.freedesktop.org/patch/260537/ -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel maili

Re: [PATCH 1/3] drm/msm: use kvmalloc for ring data in gpu crashstate

On Tue, Nov 06, 2018 at 11:40:04AM +0530, Sharat Masetty wrote: > The ringbuffer data to capture at crashtime can end up being large > sometimes, and the size can vary from being less than a page to the > full size of 32KB. So use the kvmalloc variant that perfectly fits the bill. > > Signed-off-b

Re: [PATCH v8 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC

On Tue, Nov 06, 2018 at 04:33:38PM +0200, Ville Syrjälä wrote: > On Fri, Nov 02, 2018 at 02:31:29PM -0700, Manasi Navare wrote: > > From: Gaurav K Singh > > > > This computation of RC params happens in the atomic commit phase > > during compute_config() to validate if display stream compression >

Re: [PATCH v8 13/19] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling

On Tue, Nov 06, 2018 at 04:36:08PM +0200, Ville Syrjälä wrote: > On Fri, Nov 02, 2018 at 02:31:32PM -0700, Manasi Navare wrote: > > After encoder->pre_enable() hook, after link training sequence is > > completed, PPS registers for DSC encoder are configured using the > > DSC state parameters in int

Re: [v6 2/4] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

On Tue, Nov 06, 2018 at 04:51:22PM +0200, Ville Syrjälä wrote: > On Mon, Nov 05, 2018 at 04:48:57PM -0800, Manasi Navare wrote: > > On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote: > > > If the panel supports FEC, the driver has to > > > set the FEC_READY bit in the dpcd register: >

Re: [PATCH] drm/nouveau: tegra: Initialize mode configuration

On Tue, Nov 06, 2018 at 05:24:15PM +0100, Thierry Reding wrote: > From: Thierry Reding > > Irrespective of whether or not the device has any usable outputs, the > modesetting helpers will try to register all the resources such as CRTCs > and planes. Unfortunately, the helpers rely on drm_mode_con

[Bug 108652] I suspect that in kernel 4.19 power limit decreased in 4 times on Vega GPU

https://bugs.freedesktop.org/show_bug.cgi?id=108652 --- Comment #4 from mikhail.v.gavri...@gmail.com --- Created attachment 142390 --> https://bugs.freedesktop.org/attachment.cgi?id=142390&action=edit Shadow of the Tomb Raider - screenshot with FPS counter -- You are receiving this mail becaus

[GIT PULL] etnaviv-fixes for 4.19-rc2

Hi Dave, a single fix that has been around for a while. Fixes GPU recovery after job timeout not working in some cases due to a bogus comparison of fences on different timelines. Regards, Lucas The following changes since commit 84df9525b0c27f3ebc2ebb1864fa62a97fdedb7d: Linux 4.19 (2018-10-22

[Bug 108652] I suspect that in kernel 4.19 power limit decreased in 4 times on Vega GPU

https://bugs.freedesktop.org/show_bug.cgi?id=108652 --- Comment #3 from mikhail.v.gavri...@gmail.com --- Created attachment 142389 --> https://bugs.freedesktop.org/attachment.cgi?id=142389&action=edit Project CARS 2 - screenshot with FPS counter -- You are receiving this mail because: You are

[Bug 108652] I suspect that in kernel 4.19 power limit decreased in 4 times on Vega GPU

https://bugs.freedesktop.org/show_bug.cgi?id=108652 --- Comment #2 from mikhail.v.gavri...@gmail.com --- I would welcome any increase of FPS since I play on a 4K monitor. 1) Project CARS 2 GFX Clocks and Power: 700 MHz (MCLK) 984 MHz (SCLK) 1269 MHz (PSTATE_SCLK)

[PATCH] drm/nouveau: tegra: Initialize mode configuration

From: Thierry Reding Irrespective of whether or not the device has any usable outputs, the modesetting helpers will try to register all the resources such as CRTCs and planes. Unfortunately, the helpers rely on drm_mode_config_init() to properly set up internal data structures. Since the Tegra GP

[PATCH v2] drm: Rename crtc_idr as object_idr to KMS cleanups

This patch solves this TODO task: drm_mode_config.crtc_idr is misnamed, since it contains all KMS object. Should be renamed to drm_mode_config.object_idr. Signed-off-by: Shayenne da Luz Moura --- Changes in v2: - Make commit message more clear and change header file drivers/gpu/drm/drm_leas

Re: [PATCH 11/11] drm/msm/dpu: Clean up dpu_media_info.h static inline functions

Hi Jordan. > case COLOR_FMT_P010_UBWC: > - alignment = 256; > - stride = MSM_MEDIA_ALIGN(width * 2, alignment); > + stride = MSM_MEDIA_ALIGN(width * 2, 256); > break; > case COLOR_FMT_P010: > - alignment = 128; > -

[Bug 200695] Blank screen on RX 580 with amdgpu.dc=1 enabled (no displays detected)

https://bugzilla.kernel.org/show_bug.cgi?id=200695 Claude Heiland-Allen (cla...@mathr.co.uk) changed: What|Removed |Added Kernel Version|4.17.19, 4.18.0-rc7,|4.17.19, 4.18.

Re: [PATCH v3 2/2] drm/sun4i: tcon: prevent tcon->panel dereference if NULL

On Mon, Nov 05, 2018 at 09:23:08PM +0800, Icenowy Zheng wrote: > 在 2018-10-08一的 11:21 +0200，Maxime Ripard写道： > > On Fri, Oct 05, 2018 at 11:59:51PM +0200, Giulio Benetti wrote: > > > If tcon->panel pointer is NULL, trying to dereference from it > > > (i.e. tcon->panel->connector) will cause a null

Re: [PATCH 02/10] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection

On Mon, Nov 05, 2018 at 04:56:35PM +0530, Jagan Teki wrote: > On Mon, Nov 5, 2018 at 4:09 PM Maxime Ripard > wrote: > > > > On Sat, Nov 03, 2018 at 03:38:52PM +0530, Jagan Teki wrote: > > > Instruction loop selection would require before writing > > > loop number registers, so enable idle, LP11 b

[PATCH][drm-next] drm/panel: s6d16d0: fix spelling mistake "enble" -> "enable"

From: Colin Ian King Trivial fix to spelling mistake in DRM_DEV_ERROR error message Signed-off-by: Colin Ian King --- drivers/gpu/drm/panel/panel-samsung-s6d16d0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c b/drivers/gpu/d

[PATCH] drm: rcar-du: Fix external clock error checks

The rcar-du driver supports probe deferral for external clocks, but implements it badly by checking the wrong pointer due to a bad copy and paste. Fix it. While at it, reject invalid clocks outright for DU channels that have a display PLL, as the external clock is mandatory in that case. This avoi

[Bug 201625] Amd RX560D VERY slow after upgrade.

https://bugzilla.kernel.org/show_bug.cgi?id=201625 Alex Deucher (alexdeuc...@gmail.com) changed: What|Removed |Added CC||alexdeuc...@gmail.c

  1   2   >