Hi Tom,
On 2019-12-21 8:03 a.m., Tom Murphy wrote:
> This patchset converts the intel iommu driver to the dma-iommu api.
Just wanted to note that I've rebased your series on recent kernels and
have done some testing on my old Sandybridge machine (without the DO NOT
MERGE patch) and have found no
Ok, thanks!
Gerd Hoffmann 于2020年5月28日周四 下午4:25写道：
>
> On Thu, May 28, 2020 at 03:57:05PM +0800, Dongyang Zhan wrote:
> > Hi,
> > My name is Dongyang Zhan, I am a security researcher.
> > Currently, I found two possible memory bugs in
> > drivers/gpu/drm/virtio/virtgpu_vq.c (Linux 5.6).
> > I hope
Hi Matthias,
Thanks for your comment.
On Thu, 2020-05-28 at 23:08 +0200, Matthias Brugger wrote:
>
> On 28/05/2020 19:04, Dennis YC Hsieh wrote:
> > add write_s function in cmdq helper functions which
> > writes value contains in internal register to address
> > with large dma access support.
>
On Thu, May 28, 2020 at 11:54 PM Luben Tuikov wrote:
>
> On 2020-05-12 4:59 a.m., Daniel Vetter wrote:
> > Design is similar to the lockdep annotations for workers, but with
> > some twists:
> >
> > - We use a read-lock for the execution/worker/completion side, so that
> > this explicit annotati
Hi Rob,
On Thu, May 28, 2020 at 01:59:14PM -0600, Rob Herring wrote:
> On Fri, May 15, 2020 at 03:12:12PM +0200, Guido Günther wrote:
> > No need to encode the SoC specifics in the bridge driver. For the
> > imx8mq we can use the mux-input-bridge.
>
> You can't just change bindings like this. You'
Hey,
Apologies for previous PR, I did build it locally, I just don't build
EXPERT kernels, I expect if I ever get a new builder I should add a
few more configs to my list.
I've just dropped the i915 PR from this completely, I'm sure when they
wake up they'll be able to tell us what we are missing
On Fri, 29 May 2020 at 12:02, Dave Airlie wrote:
>
> On Fri, 29 May 2020 at 11:49, Linus Torvalds
> wrote:
> >
> > On Thu, May 28, 2020 at 5:21 PM Dave Airlie wrote:
> > >
> > > Seems to have wound down nicely, a couple of i915 fixes, amdgpu fixes
> > > and minor ingenic fixes.
> >
> > Dave, thi
On 2020-05-28 18:24, Colin King wrote:
From: Colin Ian King
Currently pointer pdd is being dereferenced when assigning pointer
dpm and then pdd is being null checked. Fix this by checking if
pdd is null before the dereference of pdd occurs.
Addresses-Coverity: ("Dereference before null check"
On Fri, 29 May 2020 at 11:49, Linus Torvalds
wrote:
>
> On Thu, May 28, 2020 at 5:21 PM Dave Airlie wrote:
> >
> > Seems to have wound down nicely, a couple of i915 fixes, amdgpu fixes
> > and minor ingenic fixes.
>
> Dave, this doesn't even build. WTF?
>
> In drivers/gpu/drm/i915/gt/selftest_lrc
On Thu, May 28, 2020 at 5:21 PM Dave Airlie wrote:
>
> Seems to have wound down nicely, a couple of i915 fixes, amdgpu fixes
> and minor ingenic fixes.
Dave, this doesn't even build. WTF?
In drivers/gpu/drm/i915/gt/selftest_lrc.c, there's a
engine_heartbeat_disable() function that takes two argu
Hey Linus,
Seems to have wound down nicely, a couple of i915 fixes, amdgpu fixes
and minor ingenic fixes.
Should be it until the merge window.
Dave.
drm-fixes-2020-05-29:
drm fixes for 5.7 final
i915:
- gcc 9 compile warning fix
- timeslicing fixes
amdgpu:
- display atomic test fix
- Fix soft
Hi Rob,
On Thu, May 28, 2020 at 12:52:44PM -0600, Rob Herring wrote:
> On Fri, May 15, 2020 at 03:33:40AM +0300, Laurent Pinchart wrote:
> > Convert the Renesas R-Car DU text binding to YAML.
> >
> > Signed-off-by: Laurent Pinchart
> > ---
> > .../bindings/display/renesas,du.txt | 139
Hi Rob,
On Thu, May 28, 2020 at 01:48:04PM -0600, Rob Herring wrote:
> On Fri, May 15, 2020 at 03:12:10PM +0200, Guido Günther wrote:
> > The bridge allows to select the input source via a mux controller.
> >
> > Signed-off-by: Guido Günther
> > ---
> > .../display/bridge/mux-input-bridge.yaml
Hi Daniel,
On Wed, May 27, 2020 at 05:15:12PM +0800, Daniel Drake wrote:
> On Wed, May 27, 2020 at 5:13 PM Maxime Ripard wrote:
> > I'm about to send a v3 today or tomorrow, I can Cc you (and Jian-Hong) if
> > you
> > want.
>
> That would be great, although given the potentially inconsistent
>
Hi Macro,
On Thu, 2020-05-28 at 11:34 +0200, Marco Felsch wrote:
> Hi Liu,
>
> pls check [1], I already send patches for it. Those stuck because we
> need to verify Philipp's proposal.
Yeah, '[PATCH 09/17] drm/imx: imx-ldb: remove useless enum' in your
patch series does the same thing as this pa
Hi Marco,
On Thu, 2020-05-28 at 11:31 +0200, Marco Felsch wrote:
> Hi Liu
>
> On 20-05-28 10:58, Liu Ying wrote:
> > Gentle ping...
>
> Please check my "spring cleanup series" [1] which do the split:
It looks that your series doesn't disable both lvds channels in the
encoder disablement callbac
add write_s function in cmdq helper functions which
writes value contains in internal register to address
with large dma access support.
Signed-off-by: Dennis YC Hsieh
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 21 -
include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
includ
Add set event function in cmdq helper functions to set specific event.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 15 +++
include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
include/linux/soc/mediatek/mtk-cmdq.h| 9 +
3
Simon Ser 於 2020年5月25日 週一 上午3:25寫道：
> On Sunday, May 24, 2020 8:53 PM, Daniel Vetter wrote:
> > On Sat, May 23, 2020 at 5:44 PM Mauro Rossi issor.or...@gmail.com wrote:
> >
> > > OpenByFB is introduced to overcome GPU driver loading order issue
> > > on a device with multiple GPUs, e.g. Intel iGP
This patch introduces fragmentation in the address range
and measures time taken by 10k insertions for each modes.
ig_frag() will fail if one of the mode takes more than 1 sec.
Output:
[ 37.326723] drm_mm: igt_sanitycheck - ok!
[ 37.326727] igt_debug 0x-0x0200: 51
Do success callback in channel when shutdown. For those task not finish,
callback with error code thus client has chance to cleanup or reset.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/mailbox/mtk-cmdq-mailbox.c | 38 ++
1 file changed, 38 insertio
Export finalize function to client which helps append eoc and jump
command to pkt. Let client decide call finalize or not.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
Acked-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 1 +
drivers/soc/mediatek/mtk-cmdq-helper.c | 7 ++
ERR_PTR() is used in the kernel to encode an usual *negative* errno code
into a pointer. Passing a positive value (ENOMEM) to it will break the
following IS_ERR() check.
Though memory allocation is unlikely to fail, it's still worth fixing.
And grepping shows that this is the only misuse of ERR_P
Add gce v4 hardware support with different thread number and shift.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
Reviewed-by: Matthias Brugger
---
drivers/mailbox/mtk-cmdq-mailbox.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox
This patch support gce on mt6779 platform.
Change since v5:
- spearate address shift code in client helper and mailbox controller
- separate write_s/write_s_mask and write_s_value/write_s_mask_value so that
client can decide use mask or not
- fix typo in header
Change since v4:
- do not clear d
This patch support gce on mt6779 platform.
Change since v5:
- spearate address shift code in client helper and mailbox controller
- separate write_s/write_s_mask and write_s_value/write_s_mask_value so that
client can decide use mask or not
- fix typo in header
Change since v4:
- do not clear d
Add address shift when compose jump instruction
to compatible with 35bit format.
Signed-off-by: Dennis YC Hsieh
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c
b/drivers/soc/mediatek/mtk-cmdq
Add read_s function in cmdq helper functions which support read value from
register or dma physical address into gce internal register.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 15 +++
include/linux/mailbox/mtk-cmdq-mailbox.h |
Add clear parameter to let client decide if
event should be clear to 0 after GCE receive it.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
drivers/soc/mediatek/mtk-cmdq-helper.c | 5 +++--
include/linux/mailbox/mtk-cmdq-mailbox.h | 3 +-
Add jump function so that client can jump to any address which
contains instruction.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 13 +
include/linux/soc/mediatek/mtk-cmdq.h | 11 +++
2 files changed, 24 insertions(+)
diff
add write_s_mask_value function in cmdq helper functions which
writes a constant value to address with mask and large dma
access support.
Signed-off-by: Dennis YC Hsieh
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 21 +
include/linux/soc/mediatek/mtk-cmdq.h | 15
add write_s_mask function in cmdq helper functions which
writes value contains in internal register to address
with mask and large dma access support.
Signed-off-by: Dennis YC Hsieh
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 23 +++
include/linux/mailbox/mtk-cmdq-mailbox.
Add assign function in cmdq helper which assign constant value into
internal register by index.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 24 +++-
include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
include/linux/soc/mediat
Add documentation for the mt6779 gce.
Add gce header file defined the gce hardware event,
subsys number and constant for mt6779.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: Rob Herring
Reviewed-by: CK Hu
---
.../devicetree/bindings/mailbox/mtk-gce.txt | 8 +-
include/dt-bindings/gce/mt677
Hi Krishna,
On 2020-05-28 14:08, Krishna Manikandan wrote:
Define shutdown callback for display drm driver,
so as to disable all the CRTCS when shutdown
notification is received by the driver.
Would be nice to add some more context for adding this shutdown callback
something like below:
If t
Hi Dave, Daniel,
Here's this week drm-misc-fixes PR.
Thanks!
Maxime
drm-misc-fixes-2020-05-28:
Two ingenic fixes, one for a wrong cast, the other for a typo in a
comparison
The following changes since commit c54a8f1f329197d83d941ad84c4aa38bf282cbbd:
drm/meson: pm resume add return errno branc
Hi,
My name is Dongyang Zhan, I am a security researcher.
Currently, I found two possible memory bugs in
drivers/gpu/drm/virtio/virtgpu_vq.c (Linux 5.6).
I hope you can help me to confirm them. Thank you.
The first one is resp_buf will not be release in
virtio_gpu_cmd_get_display_info() with the c
add write_s function in cmdq helper functions which
writes a constant value to address with large dma
access support.
Signed-off-by: Dennis YC Hsieh
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 14 ++
include/linux/soc/mediatek/mtk-cmdq.h | 13 +
2 files changed, 27 inse
Some gce hardware shift pc and end address in register to support
large dram addressing.
Implement gce address shift when write or read pc and end register.
And add shift bit in platform definition.
Signed-off-by: Dennis YC Hsieh
---
drivers/mailbox/mtk-cmdq-mailbox.c | 61
Define shutdown callback for display drm driver,
so as to disable all the CRTCS when shutdown
notification is received by the driver.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/msm_drv.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_drv
Quoting Krishna Manikandan (2020-05-28 01:38:23)
> diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> index e4b750b..7a8953f 100644
> --- a/drivers/gpu/drm/msm/msm_drv.c
> +++ b/drivers/gpu/drm/msm/msm_drv.c
> @@ -1322,6 +1322,18 @@ static int msm_pdev_remove(struct platfo
From: Qiushi Wu
kobject_init_and_add() takes reference even when it fails.
If this function returns an error, kobject_put() must be called to
properly clean up the memory associated with the object.
Because function omap_dss_put_device() doesn't handle dssdev->kobj,
thus we need insert kobject_pu
In the current implementation, mutex initialization
for encoder mutex locks are done during encoder
setup. This can lead to scenarios where the lock
is used before it is initialized. Move mutex_init
to dpu_encoder_init to avoid this.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp
Hi all,
After merging the drm-intel-fixes tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from drivers/gpu/drm/i915/gt/intel_lrc.c:5472:
drivers/gpu/drm/i915/gt/selftest_lrc.c: In function 'live_timeslice_nopreempt':
drivers/gpu/drm/i915/gt/selftest_lrc.c:1
From: Colin Ian King
Currently pointer pdd is being dereferenced when assigning pointer
dpm and then pdd is being null checked. Fix this by checking if
pdd is null before the dereference of pdd occurs.
Addresses-Coverity: ("Dereference before null check")
Fixes: 522b89c63370 ("drm/amdkfd: Track
On 2020-05-12 4:59 a.m., Daniel Vetter wrote:
> Design is similar to the lockdep annotations for workers, but with
> some twists:
>
> - We use a read-lock for the execution/worker/completion side, so that
> this explicit annotation can be more liberally sprinkled around.
> With read locks lock
Hi Ricardo,
Thank you for the patch.
On Thu, May 14, 2020 at 04:36:12PM +0200, Ricardo Cañuelo wrote:
> The tfp410 has a data de-skew feature that allows the user to compensate
> the skew between IDCK and the pixel data and control signals.
>
> In the driver, the setup and hold times are calcula
Hi Ricardo,
Thank you for the patch.
On Thu, May 14, 2020 at 04:36:11PM +0200, Ricardo Cañuelo wrote:
> Convert the DT binding documentation for the TI TFP410 DPI-to-DVI
> encoder to json-schema.
>
> The 'ti,deskew' is now an unsigned value from 0 to 7 instead of a signed
> value from -4 to 3. T
Hi,
On Tue, May 12, 2020 at 1:26 PM Stephen Boyd wrote:
>
> The subject is not specific enough. I'd expect it to be something like:
>
> drm/bridge: ti-sn65dsi86: ensure bridge suspend happens during PM sleep
>
> Quoting Harigovindan P (2020-04-22 02:04:43)
> > ti-sn65dsi86 bridge is enumerated as
On Wed, May 27, 2020 at 7:32 AM Arnd Bergmann wrote:
>
> The vexpress_config code fails to link in some configurations:
>
> drivers/gpu/drm/pl111/pl111_versatile.o: in function `pl111_versatile_init':
> (.text+0x1f0): undefined reference to `devm_regmap_init_vexpress_config'
>
> Add a dependency t
On 5/27/20 4:25 PM, Daniel Vetter wrote:
On Wed, May 27, 2020 at 9:44 PM Christian König
wrote:
Am 27.05.20 um 17:23 schrieb Andrey Grodzovsky:
On 5/27/20 10:39 AM, Daniel Vetter wrote:
On Wed, May 27, 2020 at 3:51 PM Andrey Grodzovsky
wrote:
On 5/27/20 2:44 AM, Pekka Paalanen wrote:
On T
Hi Rob,
On Thu, May 28, 2020 at 11:37:55AM -0600, Rob Herring wrote:
> On Thu, May 14, 2020 at 04:36:09PM +0200, Ricardo Cañuelo wrote:
> > Define a 'ports' node for 'dvi: video@39' and use the proper naming for
> > the powerdown-gpios property to make it compliant with the ti,tfp410
> > binding.
On 28/05/2020 19:04, Dennis YC Hsieh wrote:
> add write_s function in cmdq helper functions which
> writes value contains in internal register to address
> with large dma access support.
>
> Signed-off-by: Dennis YC Hsieh
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 21 +
On Mon, 18 May 2020 19:09:22 +0800, dillon.min...@gmail.com wrote:
> From: dillon min
>
> Add documentation for "ilitek,ili9341" panel.
>
> Signed-off-by: dillon min
> ---
> .../bindings/display/panel/ilitek,ili9341.yaml | 69
> ++
> 1 file changed, 69 insertions(+)
>
On Sat, 16 May 2020 23:50:46 +0200, Paul Cercueil wrote:
> Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
>
> In the process, the new ingenic,jz4780-lcd compatible string has been
> added.
>
> Signed-off-by: Paul Cercueil
> ---
>
> Notes:
> This patch comes from a different pat
On Fri, May 15, 2020 at 03:12:12PM +0200, Guido Günther wrote:
> No need to encode the SoC specifics in the bridge driver. For the
> imx8mq we can use the mux-input-bridge.
You can't just change bindings like this. You'd still have to support
the "old" way. But IMO, this way is the right way.
>
On Fri, May 15, 2020 at 03:12:13PM +0200, Guido Günther wrote:
> This will be handled via the mux-input-bridge.
You can't do this. What happens booting a kernel with this change and an
un-modified dtb? You just broke it.
>
> Signed-off-by: Guido Günther
> ---
> drivers/gpu/drm/bridge/Kconfig
On Fri, May 15, 2020 at 03:12:10PM +0200, Guido Günther wrote:
> The bridge allows to select the input source via a mux controller.
>
> Signed-off-by: Guido Günther
> ---
> .../display/bridge/mux-input-bridge.yaml | 123 ++
> 1 file changed, 123 insertions(+)
> create mode
Hi Dave and Daniel,
Here goes drm-intel-fixes-2020-05-28:
couple compilation fixes for gcc-9+, and couple fixes for timeslicing,
one to respect I915_REQUEST_NOPREEMPT flag and another to incorporate
virtual engine into timeslicing.
Thanks,
Rodrigo.
The following changes since commit 9cb1fd0efd1
https://bugzilla.kernel.org/show_bug.cgi?id=206987
--- Comment #19 from Alex Deucher (alexdeuc...@gmail.com) ---
Do these patches help?
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=59dfb0c64d3853d20dc84f4561f28d4f5a2ddc7d
https://git.kernel.org/pub/scm/linux/kernel
On Fri, May 15, 2020 at 03:33:40AM +0300, Laurent Pinchart wrote:
> Convert the Renesas R-Car DU text binding to YAML.
>
> Signed-off-by: Laurent Pinchart
> ---
> .../bindings/display/renesas,du.txt | 139 ---
> .../bindings/display/renesas,du.yaml | 915 ++
A
Am 28.05.20 um 15:05 schrieb Nirmoy Das:
This patch introduces fragmentation in the address range
and measures time taken by 10k insertions for each modes.
ig_frag() will fail if one of the mode takes more than 1 sec.
Output:
[ 37.326723] drm_mm: igt_sanitycheck - ok!
[ 37.326727] igt_debu
On Thu, May 28, 2020 at 10:06 AM Rohan Garg wrote:
>
> DRM_IOCTL_HANDLE_SET_LABEL lets you label buffers associated
> with a handle, making it easier to debug issues in userspace
> applications.
>
> DRM_IOCTL_HANDLE_GET_LABEL lets you read the label associated
> with a buffer.
>
> Changes in v2:
>
On Fri, 15 May 2020 00:42:11 +0300, Laurent Pinchart wrote:
> Convert the Renesas R-Car LVDS encoder text binding to YAML.
>
> Signed-off-by: Laurent Pinchart
> Acked-by: Maxime Ripard
> ---
> Changes since v1:
>
> - Mention RZ/G1 and R2/G2 explicitly
> - Drop the part numbers in comments, only
On 17/05/2020 22.01, Sam Ravnborg wrote:
> The backlight support has two properties that express the state:
> - power
> - state
>
> It is un-documented and easy to get wrong.
> Add backlight_is_blank() helper to make it simpler for drivers
> to get the check of the state correct.
>
> A lot of d
On 28/05/2020 16.39, Peter Ujfalusi wrote:
> Hi Sam,
>
> On 17/05/2020 22.01, Sam Ravnborg wrote:
>> Replaces the open-coded checks of the state etc.,
>> with the backlight_is_blank() helper.
>> This increases readability of the code and align
>> the functionality across the drivers.
>
> Thanks
Hi Sam,
On 17/05/2020 22.01, Sam Ravnborg wrote:
> Replaces the open-coded checks of the state etc.,
> with the backlight_is_blank() helper.
> This increases readability of the code and align
> the functionality across the drivers.
Thanks for the cleanup in with the series!
Checked gpio/pwm/led
On Thu, May 14, 2020 at 04:36:09PM +0200, Ricardo Cañuelo wrote:
> Define a 'ports' node for 'dvi: video@39' and use the proper naming for
> the powerdown-gpios property to make it compliant with the ti,tfp410
> binding.
>
> This fills the minimum requirements to meet the binding requirements,
> p
Change wrong function name drm_modest_lock_all() to drm_modeset_lock_all()
Signed-off-by: Sidong Yang
---
Documentation/gpu/todo.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 658b52f7ffc6..436489b53fea 100644
DRM_IOCTL_HANDLE_SET_LABEL lets you label buffers associated
with a handle, making it easier to debug issues in userspace
applications.
DRM_IOCTL_HANDLE_GET_LABEL lets you read the label associated
with a buffer.
Changes in v2:
- Hoist the IOCTL up into the drm_driver framework
Changes in v3:
Hi Daniel,
I'm newbie in linux kernel and interested in drm module.
Please check this patch and give some advice for me.
I want to participate in developing kernel and community.
Thanks,
Sidong
Optimize looping pixels in compute_crc() and blend(). Calculate
src_offset in start of looping horizo
On Tue, 5 May 2020 at 17:05, Emil Velikov wrote:
>
> Currently the function heap allocates when we have any payload. Where in
> many case the payload is 1 byte - ouch.
>
> From casual observation, vast majority of the payloads are smaller than
> 8 bytes - so use a stack array tx[8] to avoid the se
Quoting Nirmoy Das (2020-05-28 14:05:56)
> This patch introduces fragmentation in the address range
> and measures time taken by 10k insertions for each modes.
>
> ig_frag() will fail if one of the mode takes more than 1 sec.
If you cc intel-...@lists.freedesktop.org, the test case will be run
by
https://bugzilla.kernel.org/show_bug.cgi?id=206987
--- Comment #18 from Petteri Aimonen (j...@kernelbug.mail.kapsi.fi) ---
As best as I can tell, the crash seems to be caused by some floating point
exception (such as underflow/overflow) in this function call in dcn_calc_auto.c
line 176:
dcn_bw_ce
https://bugzilla.kernel.org/show_bug.cgi?id=206987
--- Comment #17 from Petteri Aimonen (j...@kernelbug.mail.kapsi.fi) ---
Created attachment 289381
--> https://bugzilla.kernel.org/attachment.cgi?id=289381&action=edit
dmesg from kernel 5.4.0-31
--
You are receiving this mail because:
You are w
Quoting Nirmoy Das (2020-05-28 14:05:56)
> This patch introduces fragmentation in the address range
> and measures time taken by 10k insertions for each modes.
>
> ig_frag() will fail if one of the mode takes more than 1 sec.
>
> Output:
>
> [ 37.326723] drm_mm: igt_sanitycheck - ok!
> [ 37.
Hi Maxime,
Have you considered splitting the series into several parts and
focusing on merging one at a time?
IIRC this the longest series _ever_ submitted to dri-devel, plus it
seems to be growing with each revision.
Due to the sheer volume, it's likely to miss various points - large or
small (l
On most hardware, there is a minimum pitch alignment for linear and any
greater multiple of the alignment is fine.
On Navi, the pitch in bytes for linear must be align(width * bpp / 8, 256).
That's because the hw computes the pitch from the width and doesn't allow
setting a custom pitch. For that
Hi Niklas,
On Fri, 22 May 2020 at 07:56, Niklas Söderlund
wrote:
>
> Bayer formats are used with cameras and contain green, red and blue
> components, with alternating lines of red and green, and blue and green
> pixels in different orders. For each block of 2x2 pixels there is one
> pixel with a
On Sun, 24 May 2020 at 19:35, Daniel Vetter wrote:
>
> On Sun, May 24, 2020 at 7:46 PM Noralf Trønnes wrote:
> >
> >
> >
> > Den 24.05.2020 18.13, skrev Paul Cercueil:
> > > Hi list,
> > >
> > > I'd like to open a discussion about the current support of MIPI DSI and
> > > DBI panels.
> > >
> > >
Hi Brian,
On 2020-05-26 15:52, Brian Starkey wrote:
> Hi Jonas,
>
> On Mon, May 25, 2020 at 11:08:11AM +, Jonas Karlman wrote:
>> Hi,
>>
>> On 2020-05-15 15:37, Brian Starkey wrote:
>>> Hi Ben,
>>>
>>> On Wed, May 06, 2020 at 03:41:26PM +0100, Ben Davis wrote:
Hi all, any feedback on thi
On Thu, 14 May 2020 16:24:19 +0530, Sharat Masetty wrote:
> Update documentation to list the gpu opp table bindings including the
> newly added "opp-peak-kBps" needed for GPU-DDR bandwidth scaling.
>
> Signed-off-by: Sharat Masetty
> ---
> .../devicetree/bindings/display/msm/gpu.txt| 28
On Thu, 14 May 2020 12:12:35 +0200, Ricardo Cañuelo wrote:
> This converts the Analogix ANX7814 bridge DT binding to yaml. Port
> definitions and descriptions were expanded, apart from that it's a
> direct translation from the original binding.
>
> Signed-off-by: Ricardo Cañuelo
> Acked-by: Sam R
On Thu, May 28, 2020 at 03:27:57PM +0300, Pekka Paalanen wrote:
> On Mon, 25 May 2020 17:09:55 +0200
> Daniel Vetter wrote:
>
> > On Mon, May 25, 2020 at 05:55:19PM +0300, Pekka Paalanen wrote:
> > > On Mon, 25 May 2020 16:28:04 +0200
> > > Daniel Vetter wrote:
> > >
> > > > On Wed, May 20, 2
Hi Dave & Daniel,
Two bigger fixes to corner case kernel access faults
and three workload scheduling fixups this week.
CI_DINF_191 at:
https://intel-gfx-ci.01.org/tree/drm-intel-next-fixes/combined-alt.html?
I got gvt-next-fixes pull today, I'll pull it next week so it
has time to run through CI
There have suggestions to bake pitch alignment, address alignement,
contiguous memory or other placement (hidden VRAM, GTT/BAR, etc)
constraints into modifiers. Last time this was brought up it seemed
like the consensus was to not allow this. Document this in drm_fourcc.h.
There are several reason
On Mon, 25 May 2020 at 13:41, Thomas Zimmermann wrote:
>
> Hi Emil
>
> Am 22.05.20 um 20:11 schrieb Emil Velikov:
> > Hi Thomas,
> >
> > On Fri, 22 May 2020 at 14:53, Thomas Zimmermann wrote:
> >>
> >> The kirin driver uses the default implementation for CMA functions; except
> >> for the .dumb_c
Hi Rohan,
On Thu, 28 May 2020 at 14:38, Rohan Garg wrote:
>
> Introduce tests to cover the new generic labeling ioctl's
> being reviewed here [1].
>
> Signed-off-by: Rohan Garg
>
> [1] https://patchwork.freedesktop.org/series/77267/
>
> Signed-off-by: Rohan Garg
> ---
> include/drm-uapi/drm.h
On Thu, May 28, 2020 at 3:37 PM Thomas Hellström (Intel)
wrote:
>
> On 2020-05-12 10:59, Daniel Vetter wrote:
> > Design is similar to the lockdep annotations for workers, but with
> > some twists:
> >
> > - We use a read-lock for the execution/worker/completion side, so that
> >this explicit
https://bugzilla.kernel.org/show_bug.cgi?id=206987
Petteri Aimonen (j...@kernelbug.mail.kapsi.fi) changed:
What|Removed |Added
CC||j...@kern
Hi all,
I realise this has landed, so a small FYI comment.
On Sat, 9 May 2020 at 15:16, Noralf Trønnes wrote:
> +int drm_client_framebuffer_flush(struct drm_client_buffer *buffer, struct
> drm_rect *rect)
> +{
> + if (!buffer || !buffer->fb || !buffer->fb->funcs->dirty)
Hmm cannot think
On 2020-05-12 10:59, Daniel Vetter wrote:
Design is similar to the lockdep annotations for workers, but with
some twists:
- We use a read-lock for the execution/worker/completion side, so that
this explicit annotation can be more liberally sprinkled around.
With read locks lockdep isn't go
Introduce tests to cover the new generic labeling ioctl's
being reviewed here [1].
Signed-off-by: Rohan Garg
[1] https://patchwork.freedesktop.org/series/77267/
Signed-off-by: Rohan Garg
---
include/drm-uapi/drm.h| 23 ++-
tests/meson.build | 1 +
tests/panfrost_bo_label.c
On 10/05/2020 17:55, Clément Péron wrote:
Later we will introduce devfreq probing regulator if they
are present. As regulator should be probe only one time we
need to get this logic in the device_init().
panfrost_device is already taking care of devfreq_resume()
and devfreq_suspend(), so it's no
On 10/05/2020 17:55, Clément Péron wrote:
Introduce a boolean to know if opp table has been added.
With this, we can call panfrost_devfreq_fini() in case of error
and release what has been initialised.
Signed-off-by: Clément Péron
LGTM:
Reviewed-by: Steven Price
---
drivers/gpu/drm/pan
On 10/05/2020 17:55, Clément Péron wrote:
Some OPP tables specify voltage for each frequency. Devfreq can
handle these regulators but they should be get only 1 time to avoid
issue and know who is in charge.
If OPP table is probe don't init regulator.
Signed-off-by: Clément Péron
This looks l
On 10/05/2020 17:55, Clément Péron wrote:
We will later introduce regulators managed by OPP.
Only alloc regulators when it's needed. This also help use
to release the regulators only when they are allocated.
Signed-off-by: Clément Péron
LGTM:
Reviewed-by: Steven Price
---
drivers/gpu/d
On 10/05/2020 17:55, Clément Péron wrote:
Instead of expecting an error from dev_pm_opp_of_add_table()
do a simple device_property_present() check.
Signed-off-by: Clément Péron
I'm not sure I understand why this is better. We seem to have more code
to do roughly the same thing just with the
On 10/05/2020 17:55, Clément Péron wrote:
Some SoCs have several clocks defined and the OPP core
needs to know the exact name of the clk to use.
Set the clock name to "core".
Signed-off-by: Clément Péron
This is unfortunately a regression for the RK3288. The device tree
binding doesn't req
On 10/05/2020 17:55, Clément Péron wrote:
This use devfreq variable that will be lock with spinlock in future
patches. We should either introduce a function to access this one
but as devfreq is optional let's just remove it.
Signed-off-by: Clément Péron
As far as I can tell this should be saf
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