On Fri, 04 Jun 2021 16:08:26 +0800,
Christian König wrote:
>
>
>
> Am 04.06.21 um 09:53 schrieb Chen Li:
> > I met a gpu addr bug recently and the kernel log
> > tells me the pc is memcpy/memset and link register is
> > radeon_uvd_resume.
> >
> > As we know, in some architectures, optimized mem
> From: Dexuan Cui
> Sent: Friday, June 4, 2021 11:17 AM
> > >> ...
> > > I've heard a similar report from Vineeth but we didn't get to the bottom
> > > of this.
> > I have just tried reverting the commit mentioned above and it solves the
> > GUI freeze
> > I was also seeing. Previously, login scre
Also fix some coding issues reported from sparse.
Signed-off-by: Chen Li
Acked-by: Christian König
---
drivers/gpu/drm/radeon/radeon_uvd.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
b/drivers/gpu/drm/rade
changelog:
v1->v2: split sparse and memcp/memset fix
v2->v3: fix coding issue and misuse of le32_to_cpu
v3->v4: merge memcpy_toio's arguments to one line
Chen Li (2):
radeon: fix coding issues reported from sparse
radeon: use memcpy_to/fromio for UVD fw upload
drivers/gpu/drm/ra
> From: Vineeth Pillai
> Sent: Friday, June 4, 2021 8:47 AM
> To: Wei Liu ; vkuznets
> Cc: Matthew Wilcox ; dri-devel@lists.freedesktop.org;
> linux-hyp...@vger.kernel.org; linux-fb...@vger.kernel.org;
> linux-ker...@vger.kernel.org; Michael Kelley ;
> Dexuan Cui
> Subject: Re: [bug report] Comm
I met a gpu addr bug recently and the kernel log
tells me the pc is memcpy/memset and link register is
radeon_uvd_resume.
As we know, in some architectures, optimized memcpy/memset
may not work well on device memory. Trival memcpy_toio/memset_io
can fix this problem.
BTW, amdgpu has already don
Also fix some coding issues reported from sparse.
Signed-off-by: Chen Li
Acked-by: Christian König
---
drivers/gpu/drm/radeon/radeon_uvd.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
b/drivers/gpu/drm/rade
I met a gpu addr bug recently and the kernel log
tells me the pc is memcpy/memset and link register is
radeon_uvd_resume.
As we know, in some architectures, optimized memcpy/memset
may not work well on device memory. Trival memcpy_toio/memset_io
can fix this problem.
BTW, amdgpu has already don
changelog:
v1->v2: split sparse and memcp/memset fix
v2->v3: fix coding issue and misuse of le32_to_cpu
Chen Li (2):
radeon: fix coding issues reported from sparse
radeon: use memcpy_to/fromio for UVD fw upload
drivers/gpu/drm/radeon/radeon_uvd.c | 30 -
On Fri, 04 Jun 2021 16:31:28 +0800,
Christian König wrote:
>
>
>
> Am 04.06.21 um 10:28 schrieb Chen Li:
> > On Fri, 04 Jun 2021 16:08:26 +0800,
> > Christian König wrote:
> >>
> >>
> >> Am 04.06.21 um 09:53 schrieb Chen Li:
> >>> I met a gpu addr bug recently and the kernel log
> >>> tells me
On 6/4/2021 9:00 AM, Wei Liu wrote:
On Fri, Jun 04, 2021 at 02:25:01PM +0200, Vitaly Kuznetsov wrote:
Hi,
Commit ccf953d8f3d6 ("fb_defio: Remove custom address_space_operations")
seems to be breaking Hyper-V framebuffer
(drivers/video/fbdev/hyperv_fb.c) driver for me: Hyper-V guest boots
well
Hi,
Sorry to post usage questions here, but I didn't find a better place.
I used libdrm for my wayland based compositor, it generally works but
I've been experiencing hiccups here and there. I have a few questions.
Most of them are generic and one of them is specific.
1. Is there any way to debu
Add LS7A DC vsync interrupt enable and close function, and
register irq_handler function interface.
Add vbrank event processing flow.
Signed-off-by: lichenyang
---
drivers/gpu/drm/loongson/Makefile| 3 +-
drivers/gpu/drm/loongson/loongson_crtc.c | 43 +-
drivers/gpu/drm/loo
Implement use GPIO and I2C driver to detect connector
and fetch EDID via DDC.
Signed-off-by: lichenyang
---
drivers/gpu/drm/loongson/Makefile | 3 +-
drivers/gpu/drm/loongson/loongson_connector.c | 70 -
drivers/gpu/drm/loongson/loongson_drv.c | 16 +-
drivers/gpu/dr
From: Chenyang Li
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM drive
* Shakeel Butt [210604 20:41]:
> On Fri, Jun 4, 2021 at 1:49 PM Liam Howlett wrote:
> >
> > * Shakeel Butt [210525 19:45]:
> > > On Tue, May 25, 2021 at 11:40 AM Liam Howlett
> > > wrote:
> > > >
> > > [...]
> > > > >
> > > > > +/*
> > > > > + * Walks the vma's mapping a page and mlocks the pa
Hi Mark,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on tegra-drm/drm/tegra/for-next]
[also build test WARNING on linus/master v5.13-rc4 next-20210604]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
Fix the following coccicheck warning:
./drivers/gpu/drm/i915/display/intel_display_power.c:3081:1-28:
duplicated argument to & or |
This commit fixes duplicate argument. It might be a typo.
But what I can do is to remove it now.
Signed-off-by: Wan Jiabing
---
drivers/gpu/drm/i915/display/inte
kfd_svm.h is included duplicately in commit 42de677f7
("drm/amdkfd: register svm range").
After checking possible related header files,
remove the former one to make the code format more reasonable.
Signed-off-by: Wan Jiabing
---
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 1 -
1 file chang
Hi, Bjorn,
On Sat, Jun 5, 2021 at 3:56 AM Bjorn Helgaas wrote:
>
> On Fri, Jun 04, 2021 at 12:50:03PM +0800, Huacai Chen wrote:
> > On Thu, Jun 3, 2021 at 2:31 AM Bjorn Helgaas wrote:
> > >
> > > [+cc linux-pci]
> > >
> > > On Wed, Jun 2, 2021 at 11:22 AM Daniel Vetter wrote:
> > > > On Wed, Ju
https://bugzilla.kernel.org/show_bug.cgi?id=213145
--- Comment #5 from m...@binary-kitchen.de ---
https://gitlab.freedesktop.org/mesa/mesa/-/issues/4866
seems exactly same Problem, same config as another guy.
seems to be introduced with removing some check from mesa to test size of
drawbuffer aga
Commit 0c6b522abc2a ("dma-buf: cleanup dma-resv shared fence debugging a bit
v2")
turned dma_resv_reset_shared_max() into a function when
CONFIG_DEBUG_MUTEXES is set, but forgot to export it. That resulted in a
broken build:
ERROR: modpost: "dma_resv_reset_shared_max"
[drivers/gpu/drm/vg
Hi Mark,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on tegra-drm/drm/tegra/for-next]
[also build test WARNING on linus/master v5.13-rc4 next-20210604]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
On Tue, Jun 1, 2021 at 11:31 PM Doug Anderson wrote:
> Still hoping that this can work atop DBI so we can avoid the raw SPI
> writes. You said you're trying for it for v3 so I'm looking forward to
> checking it out there.
Struggling with this. The DBI bus is only used by tiny DRM
for the panel d
Quoting abhin...@codeaurora.org (2021-05-28 16:40:32)
> On 2021-05-10 21:20, Bjorn Andersson wrote:
> > The eDP controller found in SC8180x is at large compatible with the
> > current implementation, but has its register blocks at slightly
> > different offsets.
> >
> > Add the compatible and the n
On Fri, Jun 4, 2021 at 10:01 AM Maxime Ripard wrote:
> On Fri, May 28, 2021 at 01:57:56AM +0200, Linus Walleij wrote:
> > On Mon, May 24, 2021 at 3:19 PM Maxime Ripard wrote:
> >
> > > The new gpiod interface takes care of parsing the GPIO flags and to
> > > return the logical value when accessin
On Mon, May 24, 2021 at 3:19 PM Maxime Ripard wrote:
> If the of_get_named_gpio_flags call fails in vc4_hdmi_bind, we jump to
> the err_unprepare_hsm label. That label will then call
> pm_runtime_disable and put_device on the DDC device.
>
> We just retrieved the DDC device, so the latter is defi
https://bugzilla.kernel.org/show_bug.cgi?id=213145
Tomas Gayoso (tgay...@gmail.com) changed:
What|Removed |Added
Kernel Version|5.10.37 and 5.10.38 |5.10.37 until 5.10.42
https://bugzilla.kernel.org/show_bug.cgi?id=213145
--- Comment #4 from Tomas Gayoso (tgay...@gmail.com) ---
Created attachment 297161
--> https://bugzilla.kernel.org/attachment.cgi?id=297161&action=edit
5.10.42 dmesg output with crash aftrer reset
Bug is still present on 5.10.42. Locking and cr
tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
head: 84bdf4571d4dc36207bbc4b0fb2711723ee313d4
commit: 1fb12c5871521eab5fa428bf265841b1a3827a97 [1/19] drm/i915/guc: skip
disabling CTBs before sanitizing the GuC
config: x86_64-randconfig-r012-20210604 (attached as .config
On 2021-05-15 12:09, Dmitry Baryshkov wrote:
The code does not really use dpu_hw_blk fields, so drop them, making
dpu_hw_blk empty structure.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/disp/dpu1/dp
If the VMM's (Qemu) memory backend is backed up by memfd + Hugepages
(hugetlbfs and not THP), we have to first find the hugepage(s) where
the Guest allocations are located and then extract the regular 4k
sized subpages from them.
v2: Ensure that the subpage and hugepage offsets are calculated corr
On 2021-05-15 12:09, Dmitry Baryshkov wrote:
Use struct dpu_hw_merge_3d pointer in struct dpu_hw_pingpong rather
than using struct dpu_hw_blk. This is the only user of dpu_hw_blk.id,
which will be cleaned in the next patch.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
driv
On 2021-05-15 12:09, Dmitry Baryshkov wrote:
The dpu_hw_blk_destroy() function is empty, so we can drop it now.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 13 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
On 2021-05-15 12:09, Dmitry Baryshkov wrote:
Remove all unused dpu_hw_blk features and functions:
- dpu_hw_blk_get()/_put() and respective refcounting,
- global list of all dpu_hw_blk instances,
- dpu_hw_blk_ops and empty implementation inside each hw_blk subdriver.
This leaves dpu_hw_blk as a p
On Fri, Jun 4, 2021 at 7:11 AM Christian König
wrote:
>
> Am 03.06.21 um 18:09 schrieb Liam Howlett:
> > Use vma_lookup() to find the VMA at a specific address. As vma_lookup()
> > will return NULL if the address is not within any VMA, the start address
> > no longer needs to be validated.
> >
>
* Shakeel Butt [210525 19:45]:
> On Tue, May 25, 2021 at 11:40 AM Liam Howlett wrote:
> >
> [...]
> > >
> > > +/*
> > > + * Walks the vma's mapping a page and mlocks the page if any locked
> > > vma's are
> > > + * found. Once one is found the page is locked and the scan can be
> > > terminated
On Tue, May 25, 2021 at 01:31:02PM +0200, Konrad Dybcio wrote:
> Add bindings for the SONY Synaptics JDI panel used in
> Xperia X, X Performance, X Compact, XZ and XZs smartphones.
>
> Due to the nature of phone manufacturing and lack of any docs
> whatsoever, replacement names have been used to i
On 2021-06-04 1:01 p.m., Mark Yacoub wrote:
> From: Mark Yacoub
>
> For each CRTC state, check the size of Gamma and Degamma LUTs so
> unexpected and larger sizes wouldn't slip through.
>
> TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes
>
> Signed-off-by: Mark Yacoub
> Change-Id: I9d513
On Fri, Jun 04, 2021 at 02:03:46PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > The schedule function should be in the schedule object.
> >
> > Signed-off-by: Matthew Brost
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_wait.c | 4 ++--
> > d
On Fri, Jun 04, 2021 at 02:26:38PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > The submission tasklet operates on i915_sched_engine, thus it is the
> > correct place for it.
> >
> > Signed-off-by: Matthew Brost
> > ---
> > drivers/gpu/drm/i915/gt/in
On Fri, Jun 04, 2021 at 12:50:03PM +0800, Huacai Chen wrote:
> On Thu, Jun 3, 2021 at 2:31 AM Bjorn Helgaas wrote:
> >
> > [+cc linux-pci]
> >
> > On Wed, Jun 2, 2021 at 11:22 AM Daniel Vetter wrote:
> > > On Wed, Jun 02, 2021 at 06:36:03PM +0800, Huacai Chen wrote:
> > > > On Wed, Jun 2, 2021 at
Use the new drm_connector_oob_hotplug_event() functions to let drm/kms
drivers know about DisplayPort over Type-C hotplug events.
Reviewed-by: Heikki Krogerus
Tested-by: Heikki Krogerus
Signed-off-by: Hans de Goede
---
Changes in v3:
- Only call drm_connector_oob_hotplug_event() on hpd status b
Make dp_altmode_notify() handle the dp->data.conf == 0 case too,
rather then having separate code-paths for this in various places
which call it.
Reviewed-by: Heikki Krogerus
Tested-by: Heikki Krogerus
Signed-off-by: Hans de Goede
---
drivers/usb/typec/altmodes/displayport.c | 35 +
On some Cherry Trail devices, DisplayPort over Type-C is supported through
a USB-PD microcontroller (e.g. a fusb302) + a mux to switch the superspeed
datalines between USB-3 and DP (e.g. a pi3usb30532). The kernel in this
case does the PD/alt-mode negotiation itself, rather then everything being
ha
From: Heikki Krogerus
On Intel platforms we know that the ACPI connector device
node order will follow the order the driver (i915) decides.
The decision is made using the custom Intel ACPI OpRegion
(intel_opregion.c), though the driver does not actually know
that the values it sends to ACPI there
Add a new drm_connector_oob_hotplug_event() function and
oob_hotplug_event drm_connector_funcs member.
On some hardware a hotplug event notification may come from outside the
display driver / device. An example of this is some USB Type-C setups
where the hardware muxes the DisplayPort data and aux
Add a function to find a connector based on a fwnode.
This will be used by the new drm_connector_oob_hotplug_event()
function which is added by the next patch in this patch-set.
Changes in v2:
- Complete rewrite to use a global connector list in drm_connector.c
rather then using a class-dev-ite
Add a fwnode pointer to struct drm_connector and register an acpi_bus_type
for the connectors with the ACPI subsystem (when CONFIG_ACPI is enabled).
The adding of the fwnode pointer allows drivers to associate a fwnode
that represents a connector with that connector.
When the new fwnode pointer p
Give connector sysfs devices there own device_type, this allows us to
check if a device passed to functions dealing with generic devices is
a drm_connector or not.
A check like this is necessary in the drm_connector_acpi_bus_match()
function added in the next patch in this series.
Tested-by: Heik
Here is v3 of my patchset making DP over Type-C work on devices where the
Type-C controller does not drive the HPD pin on the GPU, but instead
we need to forward HPD events from the Type-C controller to the DRM driver.
Changes in v4:
- Rebase on top of latest drm-tip
- Add forward declaration for
On Sat, 5 Jun 2021 at 03:39, Daniel Vetter wrote:
>
> On Wed, May 26, 2021 at 04:33:56PM -0700, Matthew Brost wrote:
> > Add entry for i915 GuC submission / DRM scheduler integration plan.
> > Follow up patch with details of new parallel submission uAPI to come.
> >
> > v2:
> > (Daniel Vetter)
>
The __assign_str macro has an unusual ending semicolon but the vast
majority of uses of the macro already have semicolon termination.
$ git grep -P '\b__assign_str\b' | wc -l
551
$ git grep -P '\b__assign_str\b.*;' | wc -l
480
Add semicolons to the __assign_str() uses without semicolon terminatio
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> The submission tasklet operates on i915_sched_engine, thus it is the
> correct place for it.
>
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/i915/gt/intel_engine.h| 14 ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c |
On Fri, Jun 04, 2021 at 02:09:46PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Rather than touching execlist specific structures in the generic
> > scheduling code, add a callback function in the backend.
>
> Seems reasonable but why does the functio
On Fri, Jun 04, 2021 at 02:17:58PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Rather passing around an intel_engine_cs in the scheduling code, pass
> > around a i915_sched_engine.
>
> 👍
>
> > Signed-off-by: Matthew Brost
> > ---
> > .../drm/i915/
On Fri, Jun 04, 2021 at 02:00:33PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Move active request tracking and its lock to i915_sched_engine. This
> > lock is also the submission lock so having it in the i915_sched_engine
> > is the correct place.
>
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Rather passing around an intel_engine_cs in the scheduling code, pass
> around a i915_sched_engine.
👍
> Signed-off-by: Matthew Brost
> ---
> .../drm/i915/gt/intel_execlists_submission.c | 11 +++--
> .../gpu/drm/i915/gt/uc/intel_guc_subm
The __assign_str macro has an unusual ending semicolon but the vast
majority of uses of the macro already have semicolon termination.
$ git grep -P '\b__assign_str\b' | wc -l
551
$ git grep -P '\b__assign_str\b.*;' | wc -l
480
Add semicolons to the __assign_str() uses without semicolon terminatio
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Rather than touching execlist specific structures in the generic
> scheduling code, add a callback function in the backend.
Seems reasonable but why does the function that's there today do
nothing for the ringbuffer and current GuC back-ends
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> The schedule function should be in the schedule object.
>
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/i915/gem/i915_gem_wait.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_engine_cs.c| 3 ---
> drivers/gpu/drm/i915
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Move active request tracking and its lock to i915_sched_engine. This
> lock is also the submission lock so having it in the i915_sched_engine
> is the correct place.
>
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/i915/gt/intel_eng
On Fri, Jun 04, 2021 at 01:31:42PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Rather than touching schedule state in the generic PM code, reset the
> > priolist allocation when empty in the submission code. Add a wrapper
> > function to do this and u
https://bugzilla.kernel.org/show_bug.cgi?id=212333
Timo Valtoaho (timo.valto...@gmail.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
On Fri, Jun 04, 2021 at 06:37:49PM +, Dexuan Cui wrote:
> > From: Dexuan Cui
> > Sent: Friday, June 4, 2021 11:17 AM
> > > >> ...
> > > > I've heard a similar report from Vineeth but we didn't get to the bottom
> > > > of this.
> > > I have just tried reverting the commit mentioned above and it
On 2021-06-01 6:41 a.m., Uma Shankar wrote:
> Modern hardwares have multi segmented lut approach to prioritize
> the darker regions of the spectrum. This series introduces a new
> UAPI to define the lut ranges supported by the respective hardware.
>
> This also enables Pipe Color Management Suppor
On Fri, Jun 04, 2021 at 10:33:07AM +0200, Daniel Vetter wrote:
> On Wed, Jun 02, 2021 at 10:16:23PM -0700, Matthew Brost wrote:
> > From: Michal Wajdeczko
> >
> > In upcoming patch we will allow more CTB requests to be sent in
> > parallel to the GuC for processing, so we shouldn't assume any mor
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Rather than touching schedule state in the generic PM code, reset the
> priolist allocation when empty in the submission code. Add a wrapper
> function to do this and update the backends to call it in the correct
> place.
Seems reasonable, I
On 2021-06-01 6:51 a.m., Uma Shankar wrote:
> Add Plane Degamma Mode as an enum property. Create a helper
> function for all plane color management features.
>
> This is an enum property with values as blob_id's and exposes
> the various gamma modes supported and the lut ranges. Getting
> the blob
On Fri, Jun 04, 2021 at 10:44:31AM +0200, Daniel Vetter wrote:
> On Wed, Jun 02, 2021 at 10:16:30PM -0700, Matthew Brost wrote:
> > From: Daniele Ceraolo Spurio
> >
> > GuC has its own defines for the engine classes. They're currently
> > mapping 1:1 to the defines used by the driver, but there i
On Fri, Jun 4, 2021 at 12:59 PM Matthew Brost wrote:
>
> On Fri, Jun 04, 2021 at 12:51:43PM -0500, Jason Ekstrand wrote:
> > On Fri, Jun 4, 2021 at 12:42 PM Matthew Brost
> > wrote:
> > >
> > > On Fri, Jun 04, 2021 at 12:38:22PM -0500, Jason Ekstrand wrote:
> > > > On Thu, Jun 3, 2021 at 4:09 PM
On Fri, Jun 04, 2021 at 10:16:14AM +0200, Daniel Vetter wrote:
> On Fri, Jun 4, 2021 at 5:25 AM Matthew Brost wrote:
> >
> > On Wed, Jun 02, 2021 at 03:33:43PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 06/05/2021 20:14, Matthew Brost wrote:
> > > > Reset implementation for new GuC interface. Thi
On Wed, May 26, 2021 at 04:33:57PM -0700, Matthew Brost wrote:
> Add entry for i915 new parallel submission uAPI plan.
>
> v2:
> (Daniel Vetter):
> - Expand logical order explaination
> - Add dummy header
> - Only allow N BBs in execbuf IOCTL
> - Configure parallel submission per slot not
On Fri, Jun 04, 2021 at 12:51:43PM -0500, Jason Ekstrand wrote:
> On Fri, Jun 4, 2021 at 12:42 PM Matthew Brost wrote:
> >
> > On Fri, Jun 04, 2021 at 12:38:22PM -0500, Jason Ekstrand wrote:
> > > On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost
> > > wrote:
> > > >
> > > > Introduce i915_sched_engi
On Fri, Jun 4, 2021 at 12:42 PM Matthew Brost wrote:
>
> On Fri, Jun 04, 2021 at 12:38:22PM -0500, Jason Ekstrand wrote:
> > On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost
> > wrote:
> > >
> > > Introduce i915_sched_engine object which is lower level data structure
> > > that i915_scheduler / gene
Reviewed-by: Jason Ekstrand
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Add wrapper function around RB tree to determine if i915_sched_engine is
> empty.
>
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 +-
> drivers/gpu/drm/i915/gt/
Hi Claire,
On Thu, May 27, 2021 at 08:58:30PM +0800, Claire Chang wrote:
> This series implements mitigations for lack of DMA access control on
> systems without an IOMMU, which could result in the DMA accessing the
> system memory at unexpected times and/or unexpected addresses, possibly
> leadin
On Fri, Jun 04, 2021 at 12:38:22PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Introduce i915_sched_engine object which is lower level data structure
> > that i915_scheduler / generic code can operate on without touching
> > execlist specific structur
On Wed, May 26, 2021 at 04:33:56PM -0700, Matthew Brost wrote:
> Add entry for i915 GuC submission / DRM scheduler integration plan.
> Follow up patch with details of new parallel submission uAPI to come.
>
> v2:
> (Daniel Vetter)
> - Expand explaination of why bonding isn't supported for GuC
>
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Introduce i915_sched_engine object which is lower level data structure
> that i915_scheduler / generic code can operate on without touching
> execlist specific structures. This allows additional submission backends
> to be added without break
On Fri, Jun 04, 2021 at 12:20:36PM -0500, Jason Ekstrand wrote:
> On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
> >
> > Signed-off-by: Matthew Brost
> > ---
> > Documentation/gpu/i915.rst | 6
> > drivers/gpu/drm/i915/i915_scheduler_types.h | 37 ++---
On Fri, Jun 04, 2021 at 07:17:23PM +0200, Werner Sembach wrote:
> This commits implements the "active bpc" drm property for the Intel GPU
> driver.
>
> Signed-off-by: Werner Sembach
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 13 +
> drivers/gpu/drm/i915/display/intel_dp.
On Fri, Jun 04, 2021 at 07:17:21PM +0200, Werner Sembach wrote:
> Add a new general drm property "active bpc" which can be used by graphic
> drivers
> to report the applied bit depth per pixel back to userspace.
>
> While "max bpc" can be used to change the color depth, there was no way to
> che
The pull request you sent on Fri, 4 Jun 2021 11:54:28 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-06-04-1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/3a3c5ab3d6988afdcd63f3fc8e33d157ca1d9c67
Thank you!
--
Deet-doot-dot, I am a bot.
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Applied with the RB fixed.
Thanks!
Alex
On Fri, Jun 4, 2021 at 7:53 AM Chen Li wrote:
>
>
> I met a gpu addr bug recently and the kernel log
> tells me the pc is memcpy/memset and link register is
> radeon_uvd_resume.
>
> As we know, in some architectures, optimized memcpy/memset
> may not work
On Thu, Jun 3, 2021 at 4:09 PM Matthew Brost wrote:
>
> Signed-off-by: Matthew Brost
> ---
> Documentation/gpu/i915.rst | 6
> drivers/gpu/drm/i915/i915_scheduler_types.h | 37 ++---
> 2 files changed, 38 insertions(+), 5 deletions(-)
>
> diff --git a/Docum
Applied. Thanks!
Alex
On Fri, Jun 4, 2021 at 7:53 AM Chen Li wrote:
>
>
> Also fix some coding issues reported from sparse.
>
> Signed-off-by: Chen Li
> Acked-by: Christian König
> ---
> drivers/gpu/drm/radeon/radeon_uvd.c | 24 +---
> 1 file changed, 13 insertions(+), 11
convert_dc_color_depth_into_bpc() that converts the enum dc_color_depth to an
integer had the casses for COLOR_DEPTH_999 and COLOR_DEPTH_11 missing.
Signed-off-by: Werner Sembach
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
1 file changed, 4 insertions(+)
diff --git a/dri
This commits implements the "active bpc" drm property for the AMD GPU driver.
Signed-off-by: Werner Sembach
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.c| 4 +++-
2 files changed, 20 insertions(+), 2 deletions(-)
dif
Add a new general drm property "active bpc" which can be used by graphic drivers
to report the applied bit depth per pixel back to userspace.
While "max bpc" can be used to change the color depth, there was no way to check
which one actually got used. While in theory the driver chooses the best/hi
This commits implements the "active bpc" drm property for the Intel GPU driver.
Signed-off-by: Werner Sembach
---
drivers/gpu/drm/i915/display/intel_display.c | 13 +
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +++-
d
I started work on my proposal for better color handling in Linux display
drivers: https://lkml.org/lkml/2021/5/12/764
Since the first read-only property is now implemented for amdgpu and i915 I
wanted to collect some feedback, since the other two read-only properties will
be quite similar, I hope.
On Thu, Jun 3, 2021 at 11:51 PM Linus Walleij wrote:
>
> Hi Qiang,
Hey Linus,
> I am using Lima on the ST-Ericsson U8500 SoC. It is one
> of the very earliest versions of MALI 400 MP. It mostly works
> on the mobile phones I have using PostmarkeOS and
> the Phosh UI (Wayland with MESA), but now
Ignore this patch, in favor of (
https://patchwork.freedesktop.org/series/91023/), which appends the commit
title with drm/amd/display.
On Fri, Jun 4, 2021 at 12:59 PM Mark Yacoub wrote:
> From: Mark Yacoub
>
> For each CRTC state, check the size of Gamma and Degamma LUTs so
> unexpected and
From: Mark Yacoub
For each CRTC state, check the size of Gamma and Degamma LUTs so
unexpected and larger sizes wouldn't slip through.
TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes
Signed-off-by: Mark Yacoub
Change-Id: I9d513a38e8ac2af1b4bf802e1feb1a4d726fba4c
---
.../gpu/drm/amd/display/
From: Mark Yacoub
For each CRTC state, check the size of Gamma and Degamma LUTs so
unexpected and larger sizes wouldn't slip through.
TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes
Signed-off-by: Mark Yacoub
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++
.../gpu/drm/amd/displa
Applied. Thanks!
Alex
On Fri, Jun 4, 2021 at 3:03 AM Christian König
wrote:
>
> Am 03.06.21 um 05:28 schrieb Wan Jiabing:
> > Fix following coccicheck warning:
> > ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1726:2-3: Unneeded semicolon
> >
> > Signed-off-by: Wan Jiabing
>
> Reviewed-by: Christia
Applied. Thanks!
Alex
On Fri, Jun 4, 2021 at 1:05 AM Gustavo A. R. Silva
wrote:
>
> In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning
> by explicitly adding a break statement instead of letting the code fall
> through to the next case.
>
> Link: https://github.com/KSPP/li
> Repeated word ;) But I've fixed that up and pushed it to drm-misc-next.
Whoops! Thanks. Next up would be v2 of the cycle counter series, which
means adding timestamp queries to the GL driver so I can test new UABI
for a TIMESTAMP parameter...
On 2021-06-04 03:44, Dmitry Baryshkov wrote:
In order to ease debugging of DSI host registration issues, print
return
code of dsi_mgr_setup_components().
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 4 ++--
1 file changed, 2 inserti
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